452 lines
13 KiB
ArmAsm
452 lines
13 KiB
ArmAsm
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// TITLE("Interprocessor Interrupt support routines")
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//++
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//
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// Copyright (c) 1993 Microsoft Corporation
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//
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// Module Name:
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//
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// x4mpipi.s
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//
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// Abstract:
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//
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// This module implements the MIPS specific functions required to
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// support multiprocessor systems.
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//
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// Author:
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//
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// David N. Cutler (davec) 22-Apr-1993
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "ksmips.h"
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SBTTL("Interprocess Interrupt Processing")
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//++
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//
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// VOID
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// KeIpiInterrupt (
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// IN PKTRAP_FRAME TrapFrame
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// );
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interprocessor interrupt.
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// It's function is to process all interprocess immediate and packet
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// requests.
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//
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// Arguments:
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//
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// TrapFrame (s8) - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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NESTED_ENTRY(KeIpiInterrupt, ExceptionFrameLength, zero)
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subu sp,sp,ExceptionFrameLength // allocate exception frame
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sw ra,ExIntRa(sp) // save return address
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PROLOGUE_END
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//
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// Process all interprocessor requests.
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//
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jal KiIpiProcessRequests // process requests
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andi v1,v0,IPI_FREEZE // check if freeze is requested
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beq zero,v1,10f // if eq, no freeze requested
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//
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// Save the floating state.
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//
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SAVE_VOLATILE_FLOAT_STATE // save volatile floating state
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sdc1 f20,ExFltF20(sp) // save floating registers f20 - f31
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sdc1 f22,ExFltF22(sp) //
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sdc1 f24,ExFltF24(sp) //
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sdc1 f26,ExFltF26(sp) //
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sdc1 f28,ExFltF28(sp) //
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sdc1 f30,ExFltF30(sp) //
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//
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// Freeze the execution of the current processor.
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//
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move a0,s8 // set address of trap frame
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move a1,sp // set address of exception frame
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jal KiFreezeTargetExecution // freeze current processor execution
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//
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// Restore the volatile floating state.
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//
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RESTORE_VOLATILE_FLOAT_STATE // restore volatile floating state
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ldc1 f20,ExFltF20(sp) // restore floating registers f20 - f31
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ldc1 f22,ExFltF22(sp) //
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ldc1 f24,ExFltF24(sp) //
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ldc1 f26,ExFltF26(sp) //
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ldc1 f28,ExFltF28(sp) //
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ldc1 f30,ExFltF30(sp) //
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10: lw ra,ExIntRa(sp) // restore return address
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addu sp,sp,ExceptionFrameLength // deallocate exception frame
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j ra // return
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.end KeIpiInterrupt
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SBTTL("Processor Request")
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//++
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//
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// ULONG
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// KiIpiProcessRequests (
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// VOID
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// );
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//
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// Routine Description:
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//
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// This routine processes interprocessor requests and returns a summary
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// of the requests that were processed.
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// The request summary is returned as the function value.
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//
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//--
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.struct 0
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.space 4 * 4 // argument save area
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PrS0: .space 4 // saved integer register s0
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PrS1: .space 4 // saved integer register s1
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.space 4 // fill
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PrRa: .space 4 // saved return address
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PrFrameLength: // frame length
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NESTED_ENTRY(KiIpiProcessRequests, PrFrameLength, zero)
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subu sp,sp,PrFrameLength // allocate exception frame
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sw s0,PrS0(sp) // save integer register s0
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#if NT_INST
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sw s1,PrS1(sp) // save integer register s1
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#endif
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sw ra,PrRa(sp) // save return address
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PROLOGUE_END
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//
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// Read request summary and write a zero result interlocked.
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//
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lw t0,KiPcr + PcPrcb(zero) // get current processor block address
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10: lld t1,PbRequestSummary(t0) // get request summary and entry address
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move t2,zero // set zero value for store
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scd t2,PbRequestSummary(t0) // zero request summary
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beq zero,t2,10b // if eq, store conditional failed
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dsra a0,t1,32 // shift entry address to low 32-bits
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move s0,t1 // copy request summary
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//
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// Check for Packet ready.
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//
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// If a packet is ready, then get the address of the requested function
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// and call the function passing the address of the packet address as a
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// parameter.
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//
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and t1,s0,IPI_PACKET_READY // check for packet ready
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beq zero,t1,20f // if eq, packet not ready
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lw t2,PbWorkerRoutine(a0) // get address of worker function
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lw a1,PbCurrentPacket(a0) // get request parameters
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lw a2,PbCurrentPacket + 4(a0) //
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lw a3,PbCurrentPacket + 8(a0) //
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jal t2 // call work routine
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#if NT_INST
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lw s1,PbIpiCounts(t0) // get interrupt count structure
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lw t1,IcPacket(s1) // increment number of packet requests
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addu t1,t1,1 //
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sw t1,IcPacket(s1) //
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#endif
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//
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// Check for APC interrupt request.
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//
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// If an APC interrupt is requested, then request a software interrupt at
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// APC level on the current processor.
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//
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20: and t1,s0,IPI_APC // check for APC interrupt request
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beq zero,t1,25f // if eq, no APC interrupt requested
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DISABLE_INTERRUPTS(t0) // disable interrupts
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.set noreorder
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.set noat
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mfc0 t1,cause // get exception cause register
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or t1,t1,APC_INTERRUPT // set dispatch interrupt request
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mtc0 t1,cause // set exception cause register
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.set at
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.set reorder
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ENABLE_INTERRUPTS(t0) // enable interrupts
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#if NT_INST
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lw t1,IcAPC(s1) // increment number of APC requests
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addu t1,t1,1 //
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sw t1,IcAPC(s1) //
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#endif
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//
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// Check for DPC interrupt request.
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//
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// If an DPC interrupt is requested, then request a software interrupt at
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// DPC level on the current processor.
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//
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25: and t1,s0,IPI_DPC // check for DPC interrupt request
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beq zero,t1,30f // if eq, no DPC interrupt requested
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DISABLE_INTERRUPTS(t0) // disable interrupts
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.set noreorder
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.set noat
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mfc0 t1,cause // get exception cause register
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or t1,t1,DISPATCH_INTERRUPT // set dispatch interrupt request
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mtc0 t1,cause // set exception cause register
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.set at
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.set reorder
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ENABLE_INTERRUPTS(t0) // enable interrupts
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#if NT_INST
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lw t1,IcDPC(s1) // increment number of DPC requests
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addu t1,t1,1 //
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sw t1,IcDPC(s1) //
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#endif
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//
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// Set function return value, restores registers, and return.
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//
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30: move v0,s0 // set funtion return value
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lw s0,PrS0(sp) // restore integer register s0
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#if NT_INST
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and t1,v0,IPI_FREEZE // check if freeze requested
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beq zero,t1,40f // if eq, no freeze request
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lw t1,IcFreeze(s1) // increment number of freeze requests
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addu t1,t1,1 //
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sw t1,IcFreeze(s1) //
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40: lw s1,PrS1(sp) // restore integer register s1
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#endif
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lw ra,PrRa(sp) // restore return address
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addu sp,sp,PrFrameLength // deallocate stack frame
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j ra // return
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.end KiIpiProcessRequests
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SBTTL("Send Interprocess Request")
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//++
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//
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// VOID
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// KiIpiSend (
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// IN KAFINITY TargetProcessors,
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// IN KIPI_REQUEST IpiRequest
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// );
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//
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// Routine Description:
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//
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// This routine requests the specified operation on the target set of
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// processors.
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//
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// Arguments:
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//
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// TargetProcessors (a0) - Supplies the set of processors on which the
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// specified operation is to be executed.
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//
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// IpiRequest (a1) - Supplies the request operation mask.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiIpiSend)
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#if !defined(NT_UP)
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move v0,a0 // copy target processor set
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la v1,KiProcessorBlock // get processor block array address
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//
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// Loop through the target processors and send the request to the specified
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// recipients.
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//
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10: and t1,v0,1 // check if target bit set
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srl v0,v0,1 // shift out target processor
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beq zero,t1,30f // if eq, target not specified
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lw t1,0(v1) // get target processor block address
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20: lld t3,PbRequestSummary(t1) // get request summary of target
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or t3,t3,a1 // merge current request with summary
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scd t3,PbRequestSummary(t1) // store request summary and entry address
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beq zero,t3,20b // if eq, store conditional failed
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30: add v1,v1,4 // advance to next array element
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bne zero,v0,10b // if ne, more targets requested
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lw t0,__imp_HalRequestIpi // request IPI interrupt on targets
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j t0 //
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#else
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j ra // return
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#endif
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.end KiIpiSend
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SBTTL("Send Interprocess Request Packet")
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//++
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//
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// VOID
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// KiIpiSendPacket (
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// IN KAFINITY TargetProcessors,
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// IN PKIPI_WORKER WorkerFunction,
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// IN PVOID Parameter1,
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// IN PVOID Parameter2,
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// IN PVOID Parameter3
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// );
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//
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// Routine Description:
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//
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// This routine executes the specified worker function on the specified
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// set of processors.
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//
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// Arguments:
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//
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// TargetProcessors (a0) - Supplies the set of processors on which the
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// specified operation is to be executed.
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//
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// WorkerFunction (a1) - Supplies the address of the worker function.
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//
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// Parameter1 - Parameter3 (a2, a3, 4 * 4(sp)) - Supplies worker
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// function specific parameters.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiIpiSendPacket)
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#if !defined(NT_UP)
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lw t0,KiPcr + PcPrcb(zero) // get current processor block address
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move v0,a0 // copy target processor set
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la v1,KiProcessorBlock // get processor block array address
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//
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// Store function address and parameters in the packet area of the PRCB on
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// the current processor.
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//
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lw t9,4 * 4(sp) // get parameter3 value
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sw a0,PbTargetSet(t0) // set target processor set
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sw a1,PbWorkerRoutine(t0) // set worker function address
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sw a2,PbCurrentPacket(t0) // store worker function parameters
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sw a3,PbCurrentPacket + 4(t0) //
|
|||
|
|
sw t9,PbCurrentPacket + 8(t0) //
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
// Loop through the target processors and send the packet to the specified
|
|||
|
|
// recipients.
|
|||
|
|
//
|
|||
|
|
|
|||
|
|
10: and t1,v0,1 // check if target bit set
|
|||
|
|
srl v0,v0,1 // shift out target processor
|
|||
|
|
beq zero,t1,30f // if eq, target not specified
|
|||
|
|
lw t1,0(v1) // get target processor block address
|
|||
|
|
dsll t3,t0,32 // shift entry address to upper 32-bits
|
|||
|
|
or t3,t3,IPI_PACKET_READY // set packet ready in lower 32-bits
|
|||
|
|
20: lld t4,PbRequestSummary(t1) // get request summary of target
|
|||
|
|
and t5,t4,IPI_PACKET_READY // check if target packet busy
|
|||
|
|
or t4,t4,t3 // set entry address in request summary
|
|||
|
|
bne zero,t5,20b // if ne, target packet busy
|
|||
|
|
scd t4,PbRequestSummary(t1) // store request summary and entry address
|
|||
|
|
beq zero,t4,20b // if eq, store conditional failed
|
|||
|
|
30: addu v1,v1,4 // advance to get array element
|
|||
|
|
bne zero,v0,10b // if ne, more targets requested
|
|||
|
|
lw t0,__imp_HalRequestIpi // request IPI interrupt on targets
|
|||
|
|
j t0 //
|
|||
|
|
|
|||
|
|
#else
|
|||
|
|
|
|||
|
|
j ra // return
|
|||
|
|
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
.end KiIpiSendPacket
|
|||
|
|
|
|||
|
|
SBTTL("Signal Packet Done")
|
|||
|
|
//++
|
|||
|
|
//
|
|||
|
|
// VOID
|
|||
|
|
// KeIpiSignalPacketDone (
|
|||
|
|
// IN PVOID SignalDone
|
|||
|
|
// );
|
|||
|
|
//
|
|||
|
|
// Routine Description:
|
|||
|
|
//
|
|||
|
|
// This routine signals that a processor has completed a packet by
|
|||
|
|
// clearing the calling processor's set member of the requesting
|
|||
|
|
// processor's packet.
|
|||
|
|
//
|
|||
|
|
// Arguments:
|
|||
|
|
//
|
|||
|
|
// SignalDone (a0) - Supplies a pointer to the processor block of the
|
|||
|
|
// sending processor.
|
|||
|
|
//
|
|||
|
|
// Return Value:
|
|||
|
|
//
|
|||
|
|
// None.
|
|||
|
|
//
|
|||
|
|
//--
|
|||
|
|
|
|||
|
|
LEAF_ENTRY(KiIpiSignalPacketDone)
|
|||
|
|
|
|||
|
|
lw a1,KiPcr + PcNotMember(zero) // get processor set member
|
|||
|
|
10: ll a2,PbTargetSet(a0) // get request target set
|
|||
|
|
and a2,a2,a1 // clear processor set member
|
|||
|
|
sc a2,PbTargetSet(a0) // store target set
|
|||
|
|
beq zero,a2,10b // if eq, store conditional failed
|
|||
|
|
j ra // return
|
|||
|
|
|
|||
|
|
.end KiIpiSignalPacketDone
|