74 lines
3.0 KiB
C
74 lines
3.0 KiB
C
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/****************************************************************************
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* *
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* The following enumeration is ordered to match the exception context *
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* record. Enumerations after REGDBAT7 are enumerated for numerical *
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* equivalents only and are not part of the exception context record. *
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* *
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* CR0-7, SR0-15, SPRMQ-DEC, PREGEA-PREGU9 may be moved as a group only. *
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* *
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* *
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****************************************************************************/
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enum {
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FPR0=0, FPR1=2, FPR2=4, FPR3=6, FPR4=8, FPR5=10,
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FPR6=12, FPR7=14, FPR8=16, FPR9=18, FPR10=20, FPR11=22,
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FPR12=24, FPR13=26, FPR14=28, FPR15=30, FPR16=32, FPR17=34,
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FPR18=36, FPR19=38, FPR20=40, FPR21=42, FPR22=44, FPR23=46,
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FPR24=48, FPR25=50, FPR26=52, FPR27=54, FPR28=56, FPR29=58,
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FPR30=60, FPR31=62, SPRFPSCR=64,
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GPR0=66,GPR1, GPR2, GPR3, GPR4, GPR5, GPR6, GPR7,
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GPR8, GPR9, GPR10, GPR11, GPR12, GPR13, GPR14, GPR15,
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GPR16, GPR17, GPR18, GPR19, GPR20, GPR21, GPR22, GPR23,
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GPR24, GPR25, GPR26, GPR27, GPR28, GPR29, GPR30, GPR31,
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REGCR, SPRXER, SPRMSR, REGIP, SPRLR, SPRCTR, // REGIP = SPRSRR0
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SPRDSISR, SPRDAR, SPRSDR1,
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SPRSRR1, SPRSPRG0, SPRSPRG1, SPRSPRG2, SPRSPRG3,
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REGIBAT0, REGIBAT1, REGIBAT2, REGIBAT3,
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REGIBAT4, REGIBAT5, REGIBAT6, REGIBAT7,
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REGDBAT0, REGDBAT1, REGDBAT2, REGDBAT3,
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REGDBAT4, REGDBAT5, REGDBAT6, REGDBAT7,
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REGHID0, REGHID1, REGHID2, REGHID5,
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// 603 only SPRs
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SPRDMISS, SPRDCMP, SPRHASH1, SPRHASH2, SPRIMISS, SPRICMP, SPRRPA, SPRIABR,
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// end of 603 only registers
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SPRMQ, SPREAR, SPRPVR, SPRRTCUF, SPRRTCLF, SPRRTCUT, SPRRTCLT, SPRDECF, SPRDECT,
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CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
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SR0, SR1, SR2, SR3, SR4, SR5, SR6, SR7,
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SR8, SR9, SR10, SR11, SR12, SR13, SR14, SR15,
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PREGEA, PREGEXP, PREGRA, PREGP,
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PREGU0, PREGU1, PREGU2, PREGU3, PREGU4,
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PREGU5, PREGU6, PREGU7, PREGU8, PREGU9,
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FPSCRFX, FPSCRFEX, FPSCRVX, FPSCROX, FPSCRUX, FPSCRZX, FPSCRXX,
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FPSCRSNAN, FPSCRISI, FPSCRIDI, FPSCRZDZ, FPSCRIMZ, FPSCRVC, FPSCRFR,
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FPSCRFI, FPSCRPRF, FPSCRSFT, FPSCRSQT, FPSCRCVI, FPSCRVE, FPSCROE,
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FPSCRUE, FPSCRZE, FPSCRXE, FPSCRRN,
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MSREE, MSRPR, MSRFP, MSRME, MSRFE0, MSRSE, MSRFE1, MSREP, MSRIT, MSRDT,
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XERSO, XEROV, XERCA
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};
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#define FLTBASE FPR0
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#define REGBASE GPR0
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#define SRBASE SR0
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#define CRBASE CR0
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#define BATBASE REGIBAT0
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#define SPRBASE SPRXER
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#define SPREND (SPRDECT+1)
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//#define FLAGBASE FPSCRFX
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#define FLAGBASE SPRDSISR // Temporary
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#define PREGBASE PREGEA
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#define REGDUMPEND SPRDSISR-GPR0
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