113 lines
2.9 KiB
C
113 lines
2.9 KiB
C
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/*
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* Copyright (c) 1995 FirmWorks, Mountain View CA USA. All rights reserved.
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* Copyright (c) 1996 FirePower, Inc.
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*
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* $RCSfile: vrbat.h $
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* $Revision: 1.2 $
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* $Date: 1996/01/16 18:05:24 $
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* $Locker: $
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*/
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#ifndef VRBAT_H
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#define VRBAT_H
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/*
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***********************************************************************
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*
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* MSR bit definitions
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*
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***********************************************************************
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*/
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#define INSTR_ADDR_XLATE 0x00000020 // Instruction Addr xlate
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#define DATA_ADDR_XLATE 0x00000010 // Data Addr xlate
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#define EXTRNL_INT_ENABL 0x00008000 // EE bit
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#define PRIVILEDGES 0x00004000 // PR bit for supervisor/user
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// mode. Setting this bit to 1
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// restricts access to user only
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#define XCPT_LE_MODE 0x00010000 // take exceptions in little
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// endian mode.
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#define LITTLE_ENDIAN 0x00000001 // run little endian mode
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#define MCHNE_CHK_EN 0x00001000 // Machine Check Enable
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#define FLOAT_PNT_EN 0x00002000
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/*
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************************************************************************
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**
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** Block Address Translation registers
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**
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************************************************************************
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*/
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//
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// Here are defines for the UPPER 32 bit bat register:
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//
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#define PAGE_INDEX_BITS 0xfffe0000
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#define BEPI(x) ( x & PAGE_INDEX_BITS )
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#define A_128K_BLOCK_SIZE 0x00000000
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#define A_256K_BLOCK_SIZE 0x00000004
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#define A_512K_BLOCK_SIZE 0x0000000c
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#define A_1MEG_BLOCK_SIZE 0x0000001c
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#define A_2MEG_BLOCK_SIZE 0x0000003c
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#define A_4MEG_BLOCK_SIZE 0x0000007c
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#define AN_8MEG_BLOCK_SIZE 0x000000fc
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#define A_16MB_BLOCK_SIZE 0x000001fc
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#define A_32MB_BLOCK_SIZE 0x000003fc
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#define A_64MB_BLOCK_SIZE 0x000007fc
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#define A_128M_BLOCK_SIZE 0x00000ffc
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#define A_256M_BLOCK_SIZE 0x00001ffc
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#define SUPERVISOR_ONLY 0x00000002
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#define USER_ACCESS 0x00000001
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//
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// The Lower BAT Register
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//
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#define BRPN(x) ( (x >> 8) & PAGE_INDEX_BITS)
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//
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// WIMG: VIMVENDERS BITS:
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//
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#define WRITE_THROUGH 0x00000040
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#define CACHE_INHIBIT 0x00000020
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#define MEMORY_COHRNCY 0x00000010
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#define GUARDED_BLOCK 0x00000008 // for IBAT use only....
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#define PAGE_RW_ACCESS 0x00000002
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#define PAGE_RO_ACCESS 0x00000001
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#define PAGE_UNAVAILBL 0x00000000
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//
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// define the special purpose register values for
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// use with the "mfspr, mtspr" instructions
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//
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#define SDR1 25
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#define IBAT0_UPPER 528
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#define IBAT0_LOWER 529
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#define IBAT1_UPPER 530
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#define IBAT1_LOWER 531
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#define IBAT2_UPPER 532
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#define IBAT2_LOWER 533
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#define IBAT3_UPPER 534
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#define IBAT3_LOWER 535
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#define DBAT0_UPPER 536
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#define DBAT0_LOWER 537
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#define DBAT1_UPPER 538
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#define DBAT1_LOWER 539
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#define DBAT2_UPPER 540
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#define DBAT2_LOWER 541
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#define DBAT3_UPPER 542
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#define DBAT3_LOWER 543
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//
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// data which written to the BAT's upper register
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// will turn off it's translation abilities
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//
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#define INVALIDATE 0x00000000
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#define KSEG0 0x80000000
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#define LDW(x,y) addi x, 0, (y&0xffff) ;\
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addis x, 0, (y>>16)
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#endif //VRBAT_H
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