363 lines
14 KiB
C
363 lines
14 KiB
C
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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//;;;;;
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//;; Filename: 68800.asm
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//;; Copyright (c) 1989, ATI Technologies Inc.
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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//;;;;;;
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// $Revision: 1.2 $
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// $Date: 20 Jul 1989 16:19:06 $
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// $Author: Peter Liepa $
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// $Log: J:\video\vga1\inc\vcs\68800.asv
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//
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// Rev 1.2 20 Jul 1989 16:19:06 Pet
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// cosmetic changes to conform to project
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//*************************************************************************
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//** **
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//** 68800.INC **
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//** **
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//** Copyright (c) 1989, ATI Technologies Inc. **
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//*************************************************************************
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//
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//
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// $Revision: 1.0 $
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// $Date: 01 Jul 1992 10:28:58 $
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// $Author: 8514GRP $
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// $Log: D:/mach32/vcs/68800.inv $
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//
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// Rev 1.0 01 Jul 1992 10:28:58 8514GRP
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// Build 30:
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// - created the 68800.inc file which includes equates, macros, etc
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// from the following include files: - 8514vesa.inc
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// - vga1regs.inc
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// - m32regs.inc
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// - 8514.inc
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// (these include files are no longer required)
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// - the 8514regs.inc file is now eliminated
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// - the makefile has been updated accordingly
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//
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//
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//-------------------------------------------------------------------------
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// REGISTER PORT ADDRESSES
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//
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#define SETUP_ID1 0x0100 // Setup Mode Identification (Byte 1)
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#define SETUP_ID2 0x0101 // Setup Mode Identification (Byte 2)
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#define SETUP_OPT 0x0102 // Setup Mode Option Select
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#define ROM_SETUP 0x0103 //
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#define SETUP_1 0x0104 //
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#define SETUP_2 0x0105 //
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#define DISP_STATUS 0x02E8 // Display Status
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#define H_TOTAL 0x02E8 // Horizontal Total
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#define DAC_MASK 0x02EA // DAC Mask
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#define DAC_R_INDEX 0x02EB // DAC Read Index
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#define DAC_W_INDEX 0x02EC // DAC Write Index
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#define DAC_DATA 0x02ED // DAC Data
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#define OVERSCAN_COLOR_8 0x02EE
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#define OVERSCAN_BLUE_24 0x02EF
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#define H_DISP 0x06E8 // Horizontal Displayed
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#define OVERSCAN_GREEN_24 0x06EE
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#define OVERSCAN_RED_24 0x06EF
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#define H_SYNC_STRT 0x0AE8 // Horizontal Sync Start
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#define CURSOR_OFFSET_LO 0x0AEE
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#define H_SYNC_WID 0x0EE8 // Horizontal Sync Width
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#define CURSOR_OFFSET_HI 0x0EEE
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#define V_TOTAL 0x12E8 // Vertical Total
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#define CONFIG_STATUS_1 0x12EE // Read only equivalent to HORZ_CURSOR_POSN
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#define HORZ_CURSOR_POSN 0x12EE
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#define V_DISP 0x16E8 // Vertical Displayed
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#define CONFIG_STATUS_2 0x16EE // Read only equivalent to VERT_CURSOR_POSN
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#define VERT_CURSOR_POSN 0x16EE
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#define V_SYNC_STRT 0x1AE8 // Vertical Sync Start
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#define CURSOR_COLOR_0 0x1AEE
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#define FIFO_TEST_DATA 0x1AEE
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#define CURSOR_COLOR_1 0x1AEF
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#define V_SYNC_WID 0x1EE8 // Vertical Sync Width
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#define HORZ_CURSOR_OFFSET 0x1EEE
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#define VERT_CURSOR_OFFSET 0x1EEF
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#define DISP_CNTL 0x22E8 // Display Control
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#define CRT_PITCH 0x26EE
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#define CRT_OFFSET_LO 0x2AEE
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#define CRT_OFFSET_HI 0x2EEE
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#define LOCAL_CONTROL 0x32EE
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#define FIFO_OPT 0x36EE
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#define MISC_OPTIONS 0x36EE
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#define EXT_CURSOR_COLOR_0 0x3AEE
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#define FIFO_TEST_TAG 0x3AEE
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#define EXT_CURSOR_COLOR_1 0x3EEE
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#define SUBSYS_CNTL 0x42E8 // Subsystem Control
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#define SUBSYS_STAT 0x42E8 // Subsystem Status
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#define MEM_BNDRY 0x42EE
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#define SHADOW_CTL 0x46EE
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#define ROM_PAGE_SEL 0x46E8 // ROM Page Select (not in manual)
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#define ADVFUNC_CNTL 0x4AE8 // Advanced Function Control
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#define CLOCK_SEL 0x4AEE
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#define SCRATCH_PAD_0 0x52EE
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#define SCRATCH_PAD_1 0x56EE
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#define SHADOW_SET 0x5AEE
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#define MEM_CFG 0x5EEE
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#define EXT_GE_STATUS 0x62EE
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#define HORZ_OVERSCAN 0x62EE
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#define VERT_OVERSCAN 0x66EE
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#define MAX_WAITSTATES 0x6AEE
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#define GE_OFFSET_LO 0x6EEE
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#define BOUNDS_LEFT 0x72EE
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#define GE_OFFSET_HI 0x72EE
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#define BOUNDS_TOP 0x76EE
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#define GE_PITCH 0x76EE
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#define BOUNDS_RIGHT 0x7AEE
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#define EXT_GE_CONFIG 0x7AEE
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#define BOUNDS_BOTTOM 0x7EEE
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#define MISC_CNTL 0x7EEE
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#define CUR_Y 0x82E8 // Current Y Position
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#define PATT_DATA_INDEX 0x82EE
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#define CUR_X 0x86E8 // Current X Position
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#define SRC_Y 0x8AE8 //
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#define DEST_Y 0x8AE8 //
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#define AXSTP 0x8AE8 // Destination Y Position
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// Axial Step Constant
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#define SRC_X 0x8EE8 //
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#define DEST_X 0x8EE8 //
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#define DIASTP 0x8EE8 // Destination X Position
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// Diagonial Step Constant
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#define PATT_DATA 0x8EEE
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#define R_EXT_GE_CONFIG 0x8EEE
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#define ERR_TERM 0x92E8 // Error Term
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#define R_MISC_CNTL 0x92EE
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#define MAJ_AXIS_PCNT 0x96E8 // Major Axis Pixel Count
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#define BRES_COUNT 0x96EE
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#define CMD 0x9AE8 // Command
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#define GE_STAT 0x9AE8 // Graphics Processor Status
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#define EXT_FIFO_STATUS 0x9AEE
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#define LINEDRAW_INDEX 0x9AEE
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#define SHORT_STROKE 0x9EE8 // Short Stroke Vector Transfer
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#define BKGD_COLOR 0xA2E8 // Background Color
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#define LINEDRAW_OPT 0xA2EE
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#define FRGD_COLOR 0xA6E8 // Foreground Color
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#define DEST_X_START 0xA6EE
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#define WRT_MASK 0xAAE8 // Write Mask
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#define DEST_X_END 0xAAEE
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#define RD_MASK 0xAEE8 // Read Mask
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#define DEST_Y_END 0xAEEE
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#define CMP_COLOR 0xB2E8 // Compare Color
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#define R_H_TOTAL 0xB2EE
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#define R_H_DISP 0xB2EE
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#define SRC_X_START 0xB2EE
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#define BKGD_MIX 0xB6E8 // Background Mix
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#define ALU_BG_FN 0xB6EE
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#define R_H_SYNC_STRT 0xB6EE
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#define FRGD_MIX 0xBAE8 // Foreground Mix
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#define ALU_FG_FN 0xBAEE
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#define R_H_SYNC_WID 0xBAEE
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#define MULTIFUNC_CNTL 0xBEE8 // Multi-Function Control (mach 8)
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#define MIN_AXIS_PCNT 0xBEE8
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#define SCISSOR_T 0xBEE8
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#define SCISSOR_L 0xBEE8
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#define SCISSOR_B 0xBEE8
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#define SCISSOR_R 0xBEE8
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#define MEM_CNTL 0xBEE8
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#define PATTERN_L 0xBEE8
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#define PATTERN_H 0xBEE8
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#define PIXEL_CNTL 0xBEE8
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#define SRC_X_END 0xBEEE
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#define SRC_Y_DIR 0xC2EE
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#define R_V_TOTAL 0xC2EE
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#define EXT_SSV 0xC6EE // (used for MACH 8)
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#define EXT_SHORT_STROKE 0xC6EE
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#define R_V_DISP 0xC6EE
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#define SCAN_X 0xCAEE
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#define R_V_SYNC_STRT 0xCAEE
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#define DP_CONFIG 0xCEEE
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#define VERT_LINE_CNTR 0xCEEE
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#define PATT_LENGTH 0xD2EE
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#define R_V_SYNC_WID 0xD2EE
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#define PATT_INDEX 0xD6EE
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#define EXT_SCISSOR_L 0xDAEE // "extended" left scissor (12 bits precision)
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#define R_SRC_X 0xDAEE
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#define EXT_SCISSOR_T 0xDEEE // "extended" top scissor (12 bits precision)
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#define R_SRC_Y 0xDEEE
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#define PIX_TRANS 0xE2E8 // Pixel Data Transfer
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#define EXT_SCISSOR_R 0xE2EE // "extended" right scissor (12 bits precision)
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#define EXT_SCISSOR_B 0xE6EE // "extended" bottom scissor (12 bits precision)
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#define SRC_CMP_COLOR 0xEAEE // (used for MACH 8)
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#define DEST_CMP_FN 0xEEEE
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#define LINEDRAW 0xFEEE
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//---------------------------------------------------------
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// macros (from 8514.inc)
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//
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// I/O macros:
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//
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//mov if port NOT = to DX
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//
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//mov if port NOT = to DX
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//
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//
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//
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//Following are the FIFO checking macros:
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//
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//
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//
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//FIFO space check macro:
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//
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#define ONE_WORD 0x8000
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#define TWO_WORDS 0xC000
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#define THREE_WORDS 0xE000
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#define FOUR_WORDS 0xF000
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#define FIVE_WORDS 0xF800
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#define SIX_WORDS 0xFC00
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#define SEVEN_WORDS 0xFE00
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#define EIGHT_WORDS 0xFF00
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#define NINE_WORDS 0xFF80
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#define TEN_WORDS 0xFFC0
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#define ELEVEN_WORDS 0xFFE0
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#define TWELVE_WORDS 0xFFF0
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#define THIRTEEN_WORDS 0xFFF8
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#define FOURTEEN_WORDS 0xFFFC
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#define FIFTEEN_WORDS 0xFFFE
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#define SIXTEEN_WORDS 0xFFFF
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//
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//
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//
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//---------------------------------------
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//
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//
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// Draw Command (DRAW_COMMAND) (from 8514regs.inc)
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// note: required by m32poly.asm
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//
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// opcode field
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#define OP_CODE 0xE000
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#define SHIFT_op_code 0x000D
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#define DRAW_SETUP 0x0000
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#define DRAW_LINE 0x2000
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#define FILL_RECT_H1H4 0x4000
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#define FILL_RECT_V1V2 0x6000
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#define FILL_RECT_V1H4 0x8000
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#define DRAW_POLY_LINE 0xA000
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#define BITBLT_OP 0xC000
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#define DRAW_FOREVER 0xE000
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// swap field
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#define LSB_FIRST 0x1000
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// data width field
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#define DATA_WIDTH 0x0200
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#define BIT16 0x0200
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#define BIT8 0x0000
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// CPU wait field
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#define CPU_WAIT 0x0100
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// octant field
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#define OCTANT 0x00E0
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#define SHIFT_octant 0x0005
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#define YPOSITIVE 0x0080
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#define YMAJOR 0x0040
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#define XPOSITIVE 0x0020
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// draw field
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#define DRAW 0x0010
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// direction field
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#define DIR_TYPE 0x0008
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#define DEGREE 0x0008
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#define XY 0x0000
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#define RECT_RIGHT_AND_DOWN 0x00E0 // quadrant 3
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#define RECT_LEFT_AND_UP 0x0000 // quadrant 1
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// last pel off field
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#define SHIFT_last_pel_off 0x0002
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#define LAST_PEL_OFF 0x0004
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#define LAST_PEL_ON 0x0000
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// pixel mode
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#define PIXEL_MODE 0x0002
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#define MULTI 0x0002
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#define SINGLE 0x0000
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// read/write
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#define RW 0x0001
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#define WRITE 0x0001
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#define READ 0x0000
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//
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// ---------------------------------------------------------
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// 8514 register definitions (from vga1regs.inc)
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//
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// Internal registers (read only, for test purposes only)
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#define _PAR_FIFO_DATA 0x1AEE
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#define _PAR_FIFO_ADDR 0x3AEE
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#define _MAJOR_DEST_CNT 0x42EE
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#define _MAJOR_SRC_CNT 0x5EEE
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#define _MINOR_DEST_CNT 0x66EE
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#define _MINOR_SRC_CNT 0x8AEE
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#define _HW_TEST 0x32EE
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//
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// Extended Graphics Engine Status (EXT_GE_STATUS)
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// -rn- used in mach32.asm
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//
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#define POINTS_INSIDE 0x8000
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#define EE_DATA_IN 0x4000
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#define GE_ACTIVE 0x2000
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#define CLIP_ABOVE 0x1000
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#define CLIP_BELOW 0x0800
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#define CLIP_LEFT 0x0400
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#define CLIP_RIGHT 0x0200
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#define CLIP_FLAGS 0x1E00
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#define CLIP_INSIDE 0x0100
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#define EE_CRC_VALID 0x0080
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#define CLIP_OVERRUN 0x000F
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//
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// Datapath Configuration Register (DP_CONFIG)
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// note: some of the EQU is needed in m32poly.asm
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#define FG_COLOR_SRC 0xE000
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#define SHIFT_fg_color_src 0x000D
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#define DATA_ORDER 0x1000
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#define DATA_WIDTH 0x0200
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#define BG_COLOR_SRC 0x0180
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#define SHIFT_bg_color_src 0x0007
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#define EXT_MONO_SRC 0x0060
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#define SHIFT_ext_mono_src 0x0005
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#define DRAW 0x0010
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#define READ_MODE 0x0004
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#define POLY_FILL_MODE 0x0002
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#define SRC_SWAP 0x0800
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//
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#define FG_COLOR_SRC_BG 0x0000 // Background Color Register
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#define FG_COLOR_SRC_FG 0x2000 // Foreground Color Register
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#define FG_COLOR_SRC_HOST 0x4000 // CPU Data Transfer Reg
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#define FG_COLOR_SRC_BLIT 0x6000 // VRAM blit source
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#define FG_COLOR_SRC_GS 0x8000 // Grey-scale mono blit
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#define FG_COLOR_SRC_PATT 0xA000 // Color Pattern Shift Reg
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#define FG_COLOR_SRC_CLUH 0xC000 // Color lookup of Host Data
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#define FG_COLOR_SRC_CLUB 0xE000 // Color lookup of blit src
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//
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#define BG_COLOR_SRC_BG 0x0000 // Background Color Reg
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#define BG_COLOR_SRC_FG 0x0080 // Foreground Color Reg
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#define BG_COLOR_SRC_HOST 0x0100 // CPU Data Transfer Reg
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#define BG_COLOR_SRC_BLIT 0x0180 // VRAM blit source
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//
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// Note that "EXT_MONO_SRC" and "MONO_SRC" are mutually destructive, but that
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// "EXT_MONO_SRC" selects the ATI pattern registers.
|
||
|
|
//
|
||
|
|
#define EXT_MONO_SRC_ONE 0x0000 // Always '1'
|
||
|
|
#define EXT_MONO_SRC_PATT 0x0020 // ATI Mono Pattern Regs
|
||
|
|
#define EXT_MONO_SRC_HOST 0x0040 // CPU Data Transfer Reg
|
||
|
|
#define EXT_MONO_SRC_BLIT 0x0060 // VRAM Blit source plane
|
||
|
|
//
|
||
|
|
// Linedraw Options Register (LINEDRAW_OPT)
|
||
|
|
//
|
||
|
|
// note: some of the EQUS are needed in m32poly.asm
|
||
|
|
#define CLIP_MODE 0x0600
|
||
|
|
#define SHIFT_clip_mode 0x0009
|
||
|
|
#define CLIP_MODE_DIS 0x0000
|
||
|
|
#define CLIP_MODE_LINE 0x0200
|
||
|
|
#define CLIP_MODE_PLINE 0x0400
|
||
|
|
#define CLIP_MODE_PATT 0x0600
|
||
|
|
#define BOUNDS_RESET 0x0100
|
||
|
|
#define OCTANT 0x00E0
|
||
|
|
#define SHIFT_ldo_octant 0x0005
|
||
|
|
#define YDIR 0x0080
|
||
|
|
#define XMAJOR 0x0040
|
||
|
|
#define XDIR 0x0020
|
||
|
|
#define DIR_TYPE 0x0008
|
||
|
|
#define DIR_TYPE_DEGREE 0x0008
|
||
|
|
#define DIR_TYPE_OCTANT 0x0000
|
||
|
|
#define LAST_PEL_OFF 0x0004
|
||
|
|
#define POLY_MODE 0x0002
|
||
|
|
//
|
||
|
|
//
|
||
|
|
// ------------------------------------------------------------
|
||
|
|
// Mach32 register equates (from m32regs.inc)
|
||
|
|
//
|
||
|
|
#define REVISION 0x0000
|
||
|
|
//HORIZONTAL_OVERSCAN equ 062EEh
|
||
|
|
//VERTICAL_OVERSCAN equ 066EEh
|