273 lines
7.9 KiB
ArmAsm
273 lines
7.9 KiB
ArmAsm
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//++
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//
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// Copyright (c) 1994 Microsoft Corporation
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//
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// Module Name:
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//
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// ev4ints.s
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//
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// Abstract:
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//
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// This module implements EV4-specific interrupt handlers.
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// (the performance counters)
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//
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// Author:
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//
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// John Vert (jvert) 15-Nov-1994
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "halalpha.h"
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#define PC0_SECONDARY_VECTOR 11
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#define PC1_SECONDARY_VECTOR 13
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#define PcProfileCount0 PcHalReserved+8
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#define PcProfileCount1 PcProfileCount0+4
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#define PcProfileCountReload0 PcProfileCount1+4
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#define PcProfileCountReload1 PcProfileCountReload0+4
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.struct 0
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.space 8 // reserved for alignment
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PrRa: .space 8 // space for return address
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PrFrameLength: //
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SBTTL("Performance Counter 0 Interrupt")
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//++
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//
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// VOID
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// HalpPerformanceCounter0Interrupt
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// )
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//
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// Routine Description:
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//
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// This function is executed as the result of an interrupt from the
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// internal microprocessor performance counter 0. The interrupt
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// may be used to signal the completion of a profile event.
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// If profiling is current active, the function determines if the
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// profile interval has expired and if so dispatches to the standard
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// system routine to update the system profile time. If profiling
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// is not active then the function performs a secondary dispatch for
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// performance counter 0.
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//
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// Arguments:
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//
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// TrapFrame (fp/s6) - Supplies a pointer to the trap frame for
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// the interrupt.
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//
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// Return Value:
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//
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// TRUE is returned.
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//
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//--
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NESTED_ENTRY(HalpPerformanceCounter0Interrupt, PrFrameLength, zero )
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lda sp, -PrFrameLength(sp) // allocate a stack frame
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stq ra, PrRa(sp) // save the return address
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PROLOGUE_END //
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call_pal rdpcr // v0 = pcr base address
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ldl t0, PcProfileCount0(v0) // capture the current profile count
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beq t0, 20f // if eq, profiling not active
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//
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// Profiling is active. Decrement the interval count and if it has
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// reached zero then call the kernel profile routine.
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//
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subl t0, 1, t0 // decrement the interval count
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bne t0, 10f // if ne, interval has not expired
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//
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// The profile interval has expired. Reset the profile interval count
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// and process the profile interrupt.
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//
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ldl t0, PcProfileCountReload0(v0) // get the new tick count
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stl t0, PcProfileCount0(v0) // reset the profile interval count
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ldl a1, HalpProfileSource0
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bis fp, zero, a0 // pass trap frame pointer
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ldl t1, __imp_KeProfileInterruptWithSource
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jsr ra, (t1) // process the profile interrupt
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br zero, 40f // common return
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//
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// The profile interval has not expired. Update the decremented count.
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//
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10:
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stl t0, PcProfileCount0(v0) // update profile interval count
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br zero, 40f // common return
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//
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// Profiling is not active. Therefore, this interrupt was caused by
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// a performance counter driver. Deliver a secondary dispatch.
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//
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20:
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ldil a0, PC0_SECONDARY_VECTOR // get IDT vector for secondary
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s4addl a0, v0, a0 // a0 = PCR + IDT index
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ldl a0, PcInterruptRoutine(a0) // get service routine address
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jsr ra, (a0) // call interrupt service routine
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//
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// Setup for return.
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//
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40:
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ldil v0, TRUE // set return value = TRUE
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ldq ra, PrRa(sp) // restore return address
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lda sp, PrFrameLength(sp) // deallocate the stack frame
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ret zero, (ra) // return
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.end HalpPerformanceCounter0Interrupt
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SBTTL("Performance Counter 1 Interrupt")
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//++
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//
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// VOID
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// HalpPerformanceCounter1Interrupt
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// )
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//
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// Routine Description:
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//
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// This function is executed as the result of an interrupt from the
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// internal microprocessor performance counter 1. The interrupt
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// may be used to signal the completion of a profile event.
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// If profiling is current active, the function determines if the
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// profile interval has expired and if so dispatches to the standard
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// system routine to update the system profile time. If profiling
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// is not active then the function performs a secondary dispatch for
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// performance counter 1.
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//
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// Arguments:
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//
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// TrapFrame (fp/s6) - Supplies a pointer to the trap frame for
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// the interrupt.
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//
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// Return Value:
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//
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// TRUE is returned.
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//
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//--
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NESTED_ENTRY(HalpPerformanceCounter1Interrupt, PrFrameLength, zero )
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lda sp, -PrFrameLength(sp) // allocate a stack frame
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stq ra, PrRa(sp) // save the return address
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PROLOGUE_END //
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call_pal rdpcr // v0 = pcr base address
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ldl t0, PcProfileCount1(v0) // capture the current profile count
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beq t0, 20f // if eq, profiling not active
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//
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// Profiling is active. Decrement the interval count and if it has
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// reached zero then call the kernel profile routine.
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//
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subl t0, 1, t0 // decrement the interval count
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bne t0, 10f // if ne, interval has not expired
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//
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// The profile interval has expired. Reset the profile interval count
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// and process the profile interrupt.
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//
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ldl t0, PcProfileCountReload1(v0) // get the new tick count
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stl t0, PcProfileCount1(v0) // reset the profile interval count
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ldl a1, HalpProfileSource1
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bis fp, zero, a0 // pass trap frame pointer
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ldl t1, __imp_KeProfileInterruptWithSource
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jsr ra, (t1) // process the profile interrupt
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br zero, 40f // common return
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//
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// The profile interval has not expired. Update the decremented count.
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//
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10:
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stl t0, PcProfileCount1(v0) // update profile interval count
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br zero, 40f // common return
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//
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// Profiling is not active. Therefore, this interrupt was caused by
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// a performance counter driver. Deliver a secondary dispatch.
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//
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20:
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ldil a0, PC1_SECONDARY_VECTOR // get IDT vector for secondary
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s4addl a0, v0, a0 // a0 = PCR + IDT index
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ldl a0, PcInterruptRoutine(a0) // get service routine address
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jsr ra, (a0) // call interrupt service routine
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//
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// Setup for return.
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//
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40:
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ldil v0, TRUE // set return value = TRUE
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ldq ra, PrRa(sp) // restore return address
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lda sp, PrFrameLength(sp) // deallocate the stack frame
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ret zero, (ra) // return
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.end HalpPerformanceCounter1Interrupt
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//++
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//
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// VOID
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// HalpWritePerformanceCounter(
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// IN ULONG PerformanceCounter,
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// IN BOOLEAN Enable,
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// IN ULONG MuxControl OPTIONAL,
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// IN ULONG EventCount OPTIONAL
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// )
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//
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// Routine Description:
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//
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// Write the specified microprocessor internal performance counter.
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//
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// Arguments:
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//
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// PerformanceCounter(a0) - Supplies the number of the performance counter
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// to write.
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//
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// Enable(a1) - Supplies a boolean that indicates if the performance
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// counter should be enabled or disabled.
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//
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// MuxControl(a2) - Supplies the mux control value which selects which
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// type of event to count when the counter is enabled.
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//
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// EventCount(a3) - Supplies the event interval when the counter is
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// enabled.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalpWritePerformanceCounter)
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call_pal wrperfmon // write the counter
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ret zero, (ra) // return
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.end HalpWritePerformanceCounter
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