232 lines
5.4 KiB
ArmAsm
232 lines
5.4 KiB
ArmAsm
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// TITLE("EV5 Memory Operations")
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//++
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//
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// Copyright (c) 1994 Digital Equipment Corporation
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//
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// Module Name:
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//
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// ev5mem.s
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//
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// Abstract:
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//
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// This module implements EV5 memory operations that require assembly
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// language.
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//
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// Author:
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//
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// Joe Notarangelo 30-Jun-1994
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//
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// Environment:
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//
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// HAL, Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "ksalpha.h"
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//++
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//
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// VOID
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// HalZeroPage (
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// IN PVOID NewColor,
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// IN PVOID OldColor,
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// IN ULONG PageFrame
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// )
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//
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// Routine Description:
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//
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// This function zeros a page of memory.
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//
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// Arguments:
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//
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// NewColor (a0) - Supplies the page aligned virtual address of the
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// new color of the page that is zeroed.
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//
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// OldColor (a1) - Supplies the page aligned virtual address of the
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// old color of the page that is zeroed.
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//
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// PageFrame (a2) - Supplies the page frame number of the page that
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// is zeroed.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalZeroPage)
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.set noreorder // hand scheduled
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#define ZERO_BLOCK_SIZE (256)
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#define ZERO_LOOPS (PAGE_SIZE/ZERO_BLOCK_SIZE)
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//
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// Map the page via the 43-bit super-page on EV5.
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//
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ldiq t0, -0x4000 // 0xffff ffff ffff c000
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sll a2, PAGE_SHIFT, t1 // physical address of page
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sll t0, 28, t0 // 0xffff fc00 0000 0000
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ldil t2, ZERO_LOOPS // set count of loops to run
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bis t0, t1, t0 // set super-page enable + physical
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br zero, 10f // start the zeroing
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//
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// Zero the page in a loop, zeroing 256 bytes per iteration. This number
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// was chosen to tradeoff loop overhead versus the overhead of fetching
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// Icache blocks.
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//
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.align 4 // align as branch target
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10:
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stq zero, 0x00(t0) //
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subl t2, 1, t2 // decrement the loop count
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stq zero, 0x08(t0) //
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stq zero, 0x10(t0) //
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stq zero, 0x18(t0) //
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stq zero, 0x20(t0) //
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stq zero, 0x28(t0) //
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stq zero, 0x30(t0) //
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stq zero, 0x38(t0) //
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stq zero, 0x40(t0) //
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stq zero, 0x48(t0) //
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stq zero, 0x50(t0) //
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stq zero, 0x58(t0) //
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stq zero, 0x60(t0) //
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stq zero, 0x68(t0) //
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stq zero, 0x70(t0) //
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stq zero, 0x78(t0) //
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stq zero, 0x80(t0) //
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stq zero, 0x88(t0) //
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stq zero, 0x90(t0) //
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stq zero, 0x98(t0) //
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stq zero, 0xa0(t0) //
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stq zero, 0xa8(t0) //
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stq zero, 0xb0(t0) //
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stq zero, 0xb8(t0) //
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bis t0, zero, t1 // copy base register
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stq zero, 0xc0(t0) //
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stq zero, 0xc8(t0) //
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stq zero, 0xd0(t0) //
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stq zero, 0xd8(t0) //
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stq zero, 0xe0(t0) //
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lda t0, 0x100(t0) // increment to next block
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stq zero, 0xe8(t1) //
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stq zero, 0xf0(t1) //
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stq zero, 0xf8(t1) // use stt for dual issue with bne
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bne t2, 10b // while count > 0
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ret zero, (ra) // return
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.set reorder //
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.end HalZeroPage
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//++
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//
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// ULONGLONG
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// EV5_READ_PHYSICAL (
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// IN ULONGLONG Physical
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// )
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//
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// Routine Description:
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//
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// This function reads a 64 bit value from the specified physical address
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// The intended use of this function is to read the EV-5 C-Box registers,
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// which reside in uncached memory space.
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//
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// Arguments:
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//
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// Physical (a0) - Supplies the physical address from which to read
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//
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// Return Value:
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//
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// v0 - 64 bit value read from the specified physical address
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//
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//--
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LEAF_ENTRY(READ_EV5_PHYSICAL)
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//
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// Create superpage address:
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//
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ldiq t0, -0x4000 // 0xffff ffff ffff c000
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sll t0, 28, t0 // 0xffff fc00 0000 0000
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bis a0, t0, t0
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ldq v0, 0(t0) // get the quadword
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ret zero, (ra)
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.end READ_EV5_PHYSICAL
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//++
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//
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// VOID
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// WRITE_EV5_PHYSICAL (
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// IN ULONGLONG Physical,
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// IN ULONGLONG Value
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// )
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//
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// Routine Description:
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//
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// This function writes a 64 bit value to the specified physical address.
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// The intended use of this function is to write the EV-5 C-Box registers,
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// which reside in uncached memory space.
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//
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// Arguments:
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//
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// Physical (a0) - Supplies the physical address to write
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//
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// Value (a1) - Supplies the value to write
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(WRITE_EV5_PHYSICAL)
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//
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// Create superpage address:
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//
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ldiq t0, -0x4000 // 0xffff ffff ffff c000
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sll t0, 28, t0 // 0xffff fc00 0000 0000
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bis a0, t0, t0
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stq a1, 0(t0) // write the value
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mb // order the write
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mb // for sure, for sure
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ret zero, (ra)
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.end WRITE_EV5_PHYSICAL
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