211 lines
6.2 KiB
ArmAsm
211 lines
6.2 KiB
ArmAsm
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#if defined(R4000)
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// TITLE("Interval and Profile Clock Interrupts")
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//++
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//
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// Copyright (c) 1991 Microsoft Corporation
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//
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// Module Name:
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//
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// x4clock.s
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//
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// Abstract:
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//
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// This module implements the code necessary to field and process the
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// interval and profile clock interrupts on a MIPS R4000 system.
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//
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// Author:
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//
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// David N. Cutler (davec) 26-Apr-1991
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "halmips.h"
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SBTTL("System Clock Interrupt")
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt generated by
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// the interval timer. Its function is to acknowledge the interrupt and
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// transfer control to the standard system routine to update the system
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// time and the execution time of the current thread and process.
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//
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// Arguments:
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//
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// s8 - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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.struct 0
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CiArgs: .space 4 * 4 // saved arguments
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.space 3 * 4 // fill
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CiRa: .space 4 // saved return address
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CiFrameLength: //
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NESTED_ENTRY(HalpClockInterrupt, CiFrameLength, zero)
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subu sp,sp,CiFrameLength // allocate stack frame
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sw ra,CiRa(sp) // save return address
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PROLOGUE_END
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move a0,s8 // set address of trap frame
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lw a1,HalpCurrentTimeIncrement // Get current time increment
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jal KeUpdateSystemTime // update system time
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lw t0,HalpNextTimeIncrement // Get NextTimeIncrement
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sw t0,HalpCurrentTimeIncrement // Set CurrentTimeIncrement to NextTimeIncrement
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lw a0,HalpNextIntervalCount // Get Next Interval Count. If 0, then no change required
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beq zero,a0,5f // See if time increment is to be changed
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jal HalpProgramIntervalTimer // Program timer with new interval count value
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lw t0,HalpNewTimeIncrement // Get HalpNewTimeIncrement
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sw t0,HalpNextTimeIncrement // Set HalpNextTimeIncrement to HalpNewTimeIncrement
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sw zero,HalpNextIntervalCount // Set HalpNextIntervalCount to 0
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5:
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lw t0,KdDebuggerEnabled // check if debugger enabled
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lbu t0,0(t0) //
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beq zero,t0,10f // if eq, debugger not enabled
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jal KdPollBreakIn // check if breakin is requested
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beq zero,v0,10f // if eq, no breakin requested
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li a0,DBG_STATUS_CONTROL_C // break in and send
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jal DbgBreakPointWithStatus // status to debugger
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10: lw ra,CiRa(sp) // restore return address
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addu sp,sp,CiFrameLength // deallocate stack frame
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j ra // return
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.end HalpClockInterrupt
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SBTTL("Profile Clock Interrupt")
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt generated by the
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// profile clock. Its function is to acknowledge the profile interrupt,
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// compute the next compare value, update the performance counter, and
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// transfer control to the standard system routine to process any active
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// profiles.
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//
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// Arguments:
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//
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// s8 - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalpProfileInterrupt)
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.set noreorder
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.set noat
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mfc0 t1,count // get current count value
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mfc0 t0,compare // get current comparison value
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addu t1,t1,8 // factor in lost cycles
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subu t1,t1,t0 // compute initial count value
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mtc0 t0,compare // dismiss interrupt
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mtc0 t1,count // set new count register value
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.set at
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.set reorder
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la t1,HalpPerformanceCounter // get performance counter address
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lw t2,LiLowPart(t1) // get low part of performance count
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lw t3,LiHighPart(t1) // get high part of performance count
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addu t2,t2,t0 // update low part of performance count
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sw t2,LiLowPart(t1) // store low part of performance count
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sltu t4,t2,t0 // generate carry into high part
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addu t3,t3,t4 // update high part of performance count
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sw t3,LiHighPart(t1) // store high part of performance count
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move a0,s8 // set address of trap frame
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j KeProfileInterrupt // process profile entries
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.end HalpProfileInterrupt
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SBTTL("Read Count Register")
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//++
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//
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// ULONG
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// HalpReadCountRegister (
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// VOID
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// );
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//
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// Routine Description:
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//
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// This routine reads the current value of the count register and
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// returns the value.
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// Current value of the count register.
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//
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//--
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LEAF_ENTRY(HalpReadCountRegister)
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.set noreorder
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.set noat
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mfc0 v0,count // get count register value
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.set at
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.set reorder
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j ra // return
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.end HalpReadCountRegister
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SBTTL("Write Compare Register And Clear")
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//++
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//
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// ULONG
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// HalpWriteCompareRegisterAndClear (
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// IN ULONG Value
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// );
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//
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// Routine Description:
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//
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// This routine reads the current value of the count register, writes
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// the value of the compare register, clears the count register, and
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// returns the previous value of the count register.
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//
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// Arguments:
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//
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// Value - Supplies the value written to the compare register.
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//
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// Return Value:
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//
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// Previous value of the count register.
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//
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//--
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LEAF_ENTRY(HalpWriteCompareRegisterAndClear)
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.set noreorder
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.set noat
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mfc0 v0,count // get count register value
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mtc0 a0,compare // set compare register value
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li t0,7 // set lost cycle count
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mtc0 t0,count // set count register to zero
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.set at
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.set reorder
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j ra // return
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.end HalpWriteCompareRegisterAndClear
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#endif
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