405 lines
8.1 KiB
C
405 lines
8.1 KiB
C
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/*++ BUILD Version: 0001 // Increment this if a change has global effects
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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jxhalp.h
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Abstract:
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This header file defines the private Hardware Architecture Layer (HAL)
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Jazz specific interfaces, defines and structures.
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Author:
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Jeff Havens (jhavens) 20-Jun-91
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Revision History:
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--*/
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#ifndef _JXHALP_
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#define _JXHALP_
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typedef enum _ADDRESS_SPACE_TYPE{
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BusMemory=0,
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BusIo = 1,
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UserBusMemory = 2,
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UserBusIo = 3,
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KernelPciDenseMemory = 4,
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UserPciDenseMemory = 6,
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} ADDRESS_SPACE_TYPE, *PADDRESS_SPACE_TYPE;
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//
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// Define microprocessor-specific function prototypes and structures.
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//
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//
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// 21164 (EV4) processor family.
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//
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typedef struct _EV5ProfileCount {
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ULONG ProfileCount[3];
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ULONG ProfileCountReload[3];
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} EV5ProfileCount, *PEV5ProfileCount;
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//
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// 21064 (EV4) processor family.
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//
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typedef enum _EV4Irq{
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Irq0 = 0,
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Irq1 = 1,
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Irq2 = 2,
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Irq3 = 3,
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Irq4 = 4,
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Irq5 = 5,
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MaximumIrq
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} EV4Irq, *PEV4Irq;
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typedef struct _EV4IrqStatus{
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ULONG Vector;
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BOOLEAN Enabled;
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KIRQL Irql;
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UCHAR Priority;
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} EV4IrqStatus, *PEV4IrqStatus;
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typedef struct _EV4ProfileCount {
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ULONG ProfileCount[2];
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ULONG ProfileCountReload[2];
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} EV4ProfileCount, *PEV4ProfileCount;
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VOID
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HalpInitialize21064Interrupts(
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VOID
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);
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VOID
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HalpDisable21064HardwareInterrupt(
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IN ULONG Irq
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);
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VOID
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HalpDisable21064SoftwareInterrupt(
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IN KIRQL Irql
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);
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VOID
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HalpDisable21064PerformanceInterrupt(
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IN ULONG Vector
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);
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VOID
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HalpEnable21064HardwareInterrupt(
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IN ULONG Irq,
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IN KIRQL Irql,
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IN ULONG Vector,
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IN UCHAR Priority
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);
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VOID
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HalpEnable21064SoftwareInterrupt(
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IN KIRQL Irql
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);
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VOID
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HalpInitialize21064Interrupts(
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VOID
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);
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VOID
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HalpEnable21064PerformanceInterrupt(
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IN ULONG Vector,
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IN KIRQL Irql
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);
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ULONG
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HalpGet21064PerformanceVector(
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IN ULONG BusInterruptLevel,
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OUT PKIRQL Irql
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);
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//
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// 21164 (EV5) processor family.
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//
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typedef struct _EB164_PCR{
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ULONGLONG HalpCycleCount; // 64-bit per-processor cycle count
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ULONG Reserved[3]; // Pad ProfileCount to offset 20
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EV5ProfileCount ProfileCount; // Profile counter state
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} EB164_PCR, *PEB164_PCR;
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#define HAL_21164_PCR ( (PEB164_PCR)(&(PCR->HalReserved)) )
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//
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// 21064 (EV4) processor family.
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//
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typedef struct _EB64P_PCR {
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ULONGLONG HalpCycleCount; // 64-bit per-processor cycle count
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EV4ProfileCount ProfileCount; // Profile counter state, do not move
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EV4IrqStatus IrqStatusTable[MaximumIrq]; // Irq status table
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} EB64P_PCR, *PEB64P_PCR;
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#define HAL_21064_PCR ( (PEB64P_PCR)(&(PCR->HalReserved)) )
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//
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// Define used to determine if a page is within the DMA Cache range.
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//
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#define HALP_PAGE_IN_DMA_CACHE(Page) \
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(Page >= (0x40000/2))
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//
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// Define global data used to locate the EISA control space and the realtime
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// clock registers.
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//
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extern PVOID HalpCacheFlushBase;
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extern ULONG HalpClockFrequency;
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extern ULONG HalpClockMegaHertz;
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extern ULONG HalpIoArchitectureType;
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extern ULONG HalpModuleChipSetRevision;
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extern ULONG HalpMotherboardType;
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extern BOOLEAN HalpModuleHardwareFlushing;
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extern UCHAR *HalpInterruptLineToBit;
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extern UCHAR *HalpBitToInterruptLine;
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extern UCHAR *HalpInterruptLineToVirtualIsa;
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extern UCHAR *HalpVirtualIsaToInterruptLine;
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extern ULONGLONG HalpNoncachedDenseBasePhysicalSuperPage;
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extern ULONGLONG HalpPciDenseBasePhysicalSuperPage;
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extern ULONGLONG HalpPciConfig0BasePhysical;
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extern ULONGLONG HalpPciConfig1BasePhysical;
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extern ULONGLONG HalpIsaIoBasePhysical;
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extern ULONGLONG HalpIsa1IoBasePhysical;
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extern ULONGLONG HalpIsaMemoryBasePhysical;
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extern ULONGLONG HalpIsa1MemoryBasePhysical;
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extern ULONGLONG HalpPciIoBasePhysical;
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extern ULONGLONG HalpPci1IoBasePhysical;
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extern ULONGLONG HalpPciMemoryBasePhysical;
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extern ULONGLONG HalpPci1MemoryBasePhysical;
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extern PPLATFORM_RANGE_LIST HalpRangeList;
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extern UCHAR HalpSecondPciBridgeBusNumber;
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extern ULONG PCIMaxBus;
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extern ULONG HalpIntel82378BusNumber;
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extern ULONG HalpIntel82378DeviceNumber;
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extern ULONG HalpSecondIntel82378DeviceNumber;
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extern ULONG HalpNonExistentPciDeviceMask;
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extern ULONG HalpNonExistentPci1DeviceMask;
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extern ULONG HalpNonExistentPci2DeviceMask;
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extern PLATFORM_RANGE_LIST Apoc10Trebbia13RangeList[];
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extern PLATFORM_RANGE_LIST Apoc10Trebbia20RangeList[];
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extern PLATFORM_RANGE_LIST Apoc20Trebbia13RangeList[];
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extern PLATFORM_RANGE_LIST Apoc20Trebbia20RangeList[];
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extern PLATFORM_RANGE_LIST Rogue0Trebbia13RangeList[];
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extern PLATFORM_RANGE_LIST Rogue1Trebbia13RangeList[];
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extern PLATFORM_RANGE_LIST Rogue0Trebbia20RangeList[];
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extern PLATFORM_RANGE_LIST Rogue1Trebbia20RangeList[];
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extern UCHAR Treb13InterruptLineToBit[];
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extern UCHAR Treb13BitToInterruptLine[];
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extern UCHAR Treb13InterruptLineToVirtualIsa[];
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extern UCHAR Treb13VirtualIsaToInterruptLine[];
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extern UCHAR Treb20InterruptLineToBit[];
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extern UCHAR Treb20BitToInterruptLine[];
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extern UCHAR Treb20InterruptLineToVirtualIsa[];
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extern UCHAR Treb20VirtualIsaToInterruptLine[];
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extern ULONG HalpNumberOfIsaBusses;
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extern ULONG HalpVgaDecodeBusNumber;
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VOID
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HalpMb (
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);
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VOID
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HalpImb (
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);
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VOID
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HalpCachePcrValues (
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);
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ULONG
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HalpRpcc (
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);
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ULONG
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HalpReadAbsoluteUlong (
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IN ULONG HighPart,
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IN ULONG LowPart
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);
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VOID
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HalpWriteAbsoluteUlong (
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IN ULONG HighPart,
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IN ULONG LowPart,
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IN ULONG Value
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);
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ULONG
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HalpGetModuleChipSetRevision(
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VOID
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);
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VOID
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HalpInitialize21164Interrupts(
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VOID
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);
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VOID
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HalpStart21164Interrupts(
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VOID
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);
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VOID
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HalpInitializeProfiler(
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VOID
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);
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NTSTATUS
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HalpProfileSourceInformation (
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OUT PVOID Buffer,
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IN ULONG BufferLength,
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OUT PULONG ReturnedLength
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);
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NTSTATUS
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HalpProfileSourceInterval (
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OUT PVOID Buffer,
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IN ULONG BufferLength
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);
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VOID
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Halp21064InitializeProfiler(
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VOID
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);
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NTSTATUS
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Halp21064ProfileSourceInformation (
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OUT PVOID Buffer,
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IN ULONG BufferLength,
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OUT PULONG ReturnedLength
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);
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NTSTATUS
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Halp21064ProfileSourceInterval (
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OUT PVOID Buffer,
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IN ULONG BufferLength
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);
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VOID
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Halp21164InitializeProfiler(
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VOID
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);
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NTSTATUS
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Halp21164ProfileSourceInformation (
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OUT PVOID Buffer,
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IN ULONG BufferLength,
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OUT PULONG ReturnedLength
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);
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NTSTATUS
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Halp21164ProfileSourceInterval (
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OUT PVOID Buffer,
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IN ULONG BufferLength
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);
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ULONG
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HalpGet21164PerformanceVector(
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IN ULONG BusInterruptLevel,
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OUT PKIRQL Irql
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);
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ULONGLONG
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HalpRead21164PerformanceCounter(
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VOID
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);
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VOID
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HalpWrite21164PerformanceCounter(
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ULONGLONG PmCtr,
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ULONG CBOXMux1,
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ULONG CBOXMux2
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);
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VOID
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Halp21064PerformanceCounter0Interrupt (
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VOID
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);
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VOID
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Halp21064PerformanceCounter1Interrupt (
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VOID
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);
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VOID
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Halp21164PerformanceCounter0Interrupt (
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VOID
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);
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VOID
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Halp21164PerformanceCounter1Interrupt (
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VOID
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);
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VOID
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Halp21164PerformanceCounter2Interrupt (
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VOID
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);
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VOID
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Halp21064WritePerformanceCounter(
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IN ULONG PerformanceCounter,
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IN BOOLEAN Enable,
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IN ULONG MuxControl OPTIONAL,
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IN ULONG EventCount OPTIONAL
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);
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VOID
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Halp21064ClearLockRegister(
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PVOID LockAddress
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);
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VOID
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HalpMiniTlbSaveState(
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VOID
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);
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VOID
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HalpMiniTlbRestoreState(
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VOID
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);
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ULONG
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HalpMiniTlbAllocateEntry(
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PVOID Qva,
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PPHYSICAL_ADDRESS TranslatedAddress
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);
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VOID
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HalpCleanIoBuffers(
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IN PMDL Mdl,
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IN BOOLEAN ReadOperation,
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IN BOOLEAN DmaOperation
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);
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ULONG HalpPciLowLevelConfigRead(
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ULONG BusNumber,
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ULONG DeviceNumber,
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ULONG FunctionNumber,
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ULONG Register
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);
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#endif // _JXHALP_
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