80 lines
1.7 KiB
ArmAsm
80 lines
1.7 KiB
ArmAsm
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//#pragma comment(exestr, "$Header: /usr4/winnt/SOURCES/halpcims/src/hal/halsnipm/mips/RCS/xxidle.s,v 1.3 1995/11/02 11:04:33 flo Exp $")
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// TITLE("Processor Idle")
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//++
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//
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// Copyright (c) 1994 Microsoft Corporation
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//
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// Module Name:
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//
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// xxidle.s
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//
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// Abstract:
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//
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// This module implements system platform dependent power management
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// support.
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "halmips.h"
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SBTTL("Processor Idle")
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//++
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//
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// VOID
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// HalProcessorIdle(
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// VOID
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// )
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//
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// Routine Description:
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//
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// This function is called when the current processor is idle with
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// interrupts disabled. There is no thread active and there are no
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// DPCs to process. Therefore, power can be switched to a standby
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// mode until the the next interrupt occurs on the current processor.
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//
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// N.B. This routine is entered with IE in PSR clear. This routine
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// must do any power management enabling necessary, set the IE
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// bit in PSR, then either return or wait for an interrupt.
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalProcessorIdle)
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//
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// Perform power management enabling.
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//
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.set noreorder
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.set noat
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mfc0 v0,psr // get current PSR
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nop // fill
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or v0,v0,1 << PSR_IE // set interrupt enable.
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mtc0 v0,psr // enable interrupts
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.set at
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.set reorder
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//
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// Wait for an interrupt if supported.
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//
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li a0,0x01
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j HalpCheckSpuriousInt // return
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10: j ra
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.end HalProcessorIdle
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