537 lines
16 KiB
C
537 lines
16 KiB
C
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/*++
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Copyright (c) 1993 Microsoft Corporation
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Module Name:
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regs.c
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Abstract:
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This file provides access to the machine's register set.
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Author:
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Wesley Witt (wesw) 1-May-1993 (ported from ntsd)
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Revised:
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Jim Bezanson 5-6-1994 (ported to PPC)
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Environment:
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User Mode
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--*/
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#include <windows.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "drwatson.h"
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#include "proto.h"
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#include "ppcinst.h"
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#include "regs.h"
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PUCHAR UserRegs[10] = {0};
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ULONG GetRegName (void);
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ULONG GetRegString (PUCHAR pszString);
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PUCHAR RegNameFromIndex (ULONG index);
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static ULONG ProcessorType = 0;
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ULONG cbBrkptLength = 4L;
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ULONG trapInstr = 0x0FE00016; // break 0x16 for brkpts
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ULONG ContextType = CONTEXT_FULL;
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//
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// The following defines are used to acquire the initial context for
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// for a thread when stack tracing a thread other than the current thread.
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// It is based on the fact that the thread relinquished control in
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// ContextSwap (..\ntos\ke\ppc\ctxswap.s)
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#define STK_MIN_FRAME 14*sizeof(ULONG)
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#define CTXSWAP_FRAMESIZE STK_MIN_FRAME+(2 * sizeof(ULONG))
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#define CTXSWAP_GPR1 0
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#define CTXSWAP_MSR STK_MIN_FRAME/sizeof(ULONG)
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#define CTXSWAP_LR CTXSWAP_MSR+1
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char szEaPReg[] = "$ea";
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char szExpPReg[] = "$exp";
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char szRaPReg[] = "$ra";
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char szPPReg[] = "$p";
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char szU0Preg[] = "$u0";
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char szU1Preg[] = "$u1";
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char szU2Preg[] = "$u2";
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char szU3Preg[] = "$u3";
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char szU4Preg[] = "$u4";
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char szU5Preg[] = "$u5";
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char szU6Preg[] = "$u6";
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char szU7Preg[] = "$u7";
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char szU8Preg[] = "$u8";
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char szU9Preg[] = "$u9";
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UCHAR szF0[] = " f0";
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UCHAR szF1[] = " f1";
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UCHAR szF2[] = " f2";
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UCHAR szF3[] = " f3";
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UCHAR szF4[] = " f4";
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UCHAR szF5[] = " f5";
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UCHAR szF6[] = " f6";
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UCHAR szF7[] = " f7";
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UCHAR szF8[] = " f8";
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UCHAR szF9[] = " f9";
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UCHAR szF10[] = "f10";
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UCHAR szF11[] = "f11";
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UCHAR szF12[] = "f12";
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UCHAR szF13[] = "f13";
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UCHAR szF14[] = "f14";
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UCHAR szF15[] = "f15";
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UCHAR szF16[] = "f16";
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UCHAR szF17[] = "f17";
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UCHAR szF18[] = "f18";
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UCHAR szF19[] = "f19";
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UCHAR szF20[] = "f20";
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UCHAR szF21[] = "f21";
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UCHAR szF22[] = "f22";
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UCHAR szF23[] = "f23";
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UCHAR szF24[] = "f24";
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UCHAR szF25[] = "f25";
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UCHAR szF26[] = "f26";
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UCHAR szF27[] = "f27";
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UCHAR szF28[] = "f28";
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UCHAR szF29[] = "f29";
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UCHAR szF30[] = "f30";
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UCHAR szF31[] = "f31";
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UCHAR szR0[] = " r0";
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UCHAR szR1[] = " r1";
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UCHAR szR2[] = " r2";
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UCHAR szR3[] = " r3";
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UCHAR szR4[] = " r4";
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UCHAR szR5[] = " r5";
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UCHAR szR6[] = " r6";
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UCHAR szR7[] = " r7";
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UCHAR szR8[] = " r8";
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UCHAR szR9[] = " r9";
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UCHAR szR10[] = "r10";
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UCHAR szR11[] = "r11";
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UCHAR szR12[] = "r12";
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UCHAR szR13[] = "r13";
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UCHAR szR14[] = "r14";
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UCHAR szR15[] = "r15";
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UCHAR szR16[] = "r16";
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UCHAR szR17[] = "r17";
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UCHAR szR18[] = "r18";
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UCHAR szR19[] = "r19";
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UCHAR szR20[] = "r20";
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UCHAR szR21[] = "r21";
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UCHAR szR22[] = "r22";
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UCHAR szR23[] = "r23";
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UCHAR szR24[] = "r24";
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UCHAR szR25[] = "r25";
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UCHAR szR26[] = "r26";
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UCHAR szR27[] = "r27";
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UCHAR szR28[] = "r28";
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UCHAR szR29[] = "r29";
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UCHAR szR30[] = "r30";
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UCHAR szR31[] = "r31";
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UCHAR szSR0[] = "sr0";
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UCHAR szSR1[] = "sr1";
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UCHAR szSR2[] = "sr2";
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UCHAR szSR3[] = "sr3";
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UCHAR szSR4[] = "sr4";
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UCHAR szSR5[] = "sr5";
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UCHAR szSR6[] = "sr6";
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UCHAR szSR7[] = "sr7";
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UCHAR szSR8[] = "sr8";
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UCHAR szSR9[] = "sr9";
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UCHAR szSR10[] = "sr10";
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UCHAR szSR11[] = "sr11";
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UCHAR szSR12[] = "sr12";
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UCHAR szSR13[] = "sr13";
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UCHAR szSR14[] = "sr14";
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UCHAR szSR15[] = "sr15";
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UCHAR szMsr[] = "msr";
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UCHAR szFpScr[] = "fpscr";
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UCHAR szCr[] = "cr";
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UCHAR szCR0[] = "cr0";
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UCHAR szCR1[] = "cr1";
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UCHAR szCR2[] = "cr2";
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UCHAR szCR3[] = "cr3";
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UCHAR szCR4[] = "cr4";
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UCHAR szCR5[] = "cr5";
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UCHAR szCR6[] = "cr6";
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UCHAR szCR7[] = "cr7";
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UCHAR szMQ[] = "mq";
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UCHAR szXER[] = "xer";
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UCHAR szRTCU[] = "rtcu";
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UCHAR szRTCL[] = "rtcl";
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UCHAR szDEC[] = "dec";
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UCHAR szLR[] = "lr";
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UCHAR szCTR[] = "ctr";
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UCHAR szDSISR[]= "dsisr";
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UCHAR szDAR[] = "dar";
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UCHAR szSDR1[] = "sdr1";
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UCHAR szREGIP[] = "iar";
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UCHAR szSRR1[] = "srr1";
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UCHAR szSPRG0[]= "sprg0";
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UCHAR szSPRG1[]= "sprg1";
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UCHAR szSPRG2[]= "sprg2";
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UCHAR szSPRG3[]= "sprg3";
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UCHAR szEAR[] = "ear";
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UCHAR szPVR[] = "pvr";
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UCHAR szIBAT0[] = "ibat0u";
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UCHAR szIBAT1[] = "ibat0l";
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UCHAR szIBAT2[] = "ibat1u";
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UCHAR szIBAT3[] = "ibat1l";
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UCHAR szIBAT4[] = "ibat2u";
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UCHAR szIBAT5[] = "ibat2l";
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UCHAR szIBAT6[] = "ibat3u";
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UCHAR szIBAT7[] = "ibat3l";
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UCHAR szHID0[] = "hid0";
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UCHAR szHID1[] = "hid1";
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UCHAR szHID2[] = "hid2";
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UCHAR szHID5[] = "hid5";
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UCHAR szDBAT0[] = "dbat0u";
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UCHAR szDBAT1[] = "dbat0l";
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UCHAR szDBAT2[] = "dbat1u";
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UCHAR szDBAT3[] = "dbat1l";
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UCHAR szDBAT4[] = "dbat2u";
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UCHAR szDBAT5[] = "dbat2l";
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UCHAR szDBAT6[] = "dbat3u";
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UCHAR szDBAT7[] = "dbat3l";
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// 603 specific Special Purpose Registers (used for unassemble only)
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UCHAR szDMISS[] = "dmiss";
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UCHAR szDCMP[] = "dcmp";
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UCHAR szHASH1[] = "hash1";
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UCHAR szHASH2[] = "hash2";
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UCHAR szIMISS[] = "imiss";
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UCHAR szICMP[] = "icmp";
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UCHAR szRPA[] = "rpa";
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UCHAR szIABR[] = "iabr";
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UCHAR szNULL[] = "";
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PUCHAR pszReg[] = {
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szF0, szNULL, szF1, szNULL, szF2, szNULL, szF3, szNULL,
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szF4, szNULL, szF5, szNULL, szF6, szNULL, szF7, szNULL,
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szF8, szNULL, szF9, szNULL, szF10, szNULL, szF11, szNULL,
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szF12, szNULL, szF13, szNULL, szF14, szNULL, szF15, szNULL,
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szF16, szNULL, szF17, szNULL, szF18, szNULL, szF19, szNULL,
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szF20, szNULL, szF21, szNULL, szF22, szNULL, szF23, szNULL,
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szF24, szNULL, szF25, szNULL, szF26, szNULL, szF27, szNULL,
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szF28, szNULL, szF29, szNULL, szF30, szNULL, szF31, szNULL,
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szFpScr, szNULL,
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szR0, szR1, szR2, szR3, szR4, szR5, szR6, szR7,
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szR8, szR9, szR10, szR11, szR12, szR13, szR14, szR15,
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szR16, szR17, szR18, szR19, szR20, szR21, szR22, szR23,
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szR24, szR25, szR26, szR27, szR28, szR29, szR30, szR31,
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szCr, szXER, szMsr, szREGIP, szLR, szCTR,
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szDSISR, szDAR, szSDR1,
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szSRR1, szSPRG0, szSPRG1, szSPRG2, szSPRG3,
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szIBAT0, szIBAT1, szIBAT2, szIBAT3, szIBAT4, szIBAT5, szIBAT6, szIBAT7,
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szDBAT0, szDBAT1, szDBAT2, szDBAT3, szDBAT4, szDBAT5, szDBAT6, szDBAT7,
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szHID0, szHID1, szHID2, szHID5,
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szDMISS, szDCMP, szHASH1, szHASH2, szIMISS, szICMP, szRPA, szIABR,
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szMQ, szEAR, szPVR, szRTCU, szRTCL, szRTCU, szRTCL, szDEC, szDEC,
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szCR0, szCR1, szCR2, szCR3, szCR4, szCR5, szCR6, szCR7,
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szSR0, szSR1, szSR2, szSR3, szSR4, szSR5, szSR6, szSR7,
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szSR8, szSR9, szSR10, szSR11, szSR12, szSR13, szSR14, szSR15,
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szEaPReg, szExpPReg, szRaPReg, szPPReg,
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szU0Preg, szU1Preg, szU2Preg, szU3Preg, szU4Preg,
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szU5Preg, szU6Preg, szU7Preg, szU8Preg, szU9Preg
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};
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#define REGNAMESIZE sizeof(pszReg) / sizeof(PUCHAR)
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// NOTE: Order of the following must be in sync with the enumeration used
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// to match the context record.
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ULONG SubRegSPR[] = {
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0x020, // 00001 xxxxx XER
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0x0, // Place holder for MSR (Not an SPR)
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0x340, // 11010 00000 SRR0 = RegIP
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0x100, // 01000 xxxxx LR
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0x120, // 01001 xxxxx CTR
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0x240, // 10010 00000 DSISR
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0x260, // 10011 00000 DAR,
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0x320, // 11001 00000 SDR1
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0x360, // 11011 00000 SRR1
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0x208, // 10000 01000 SPRG0
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0x228, // 10001 01000 SPRG1
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0x248, // 10010 01000 SPRG2
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0x268, // 10011 01000 SPRG3
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0x210, // 10000 10000 IBAT0
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0x230, // 10001 10000 IBAT1
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0x250, // 10010 10000 IBAT2
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0x270, // 10011 10000 IBAT3
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0x290, // 10100 10000 IBAT4
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0x2B0, // 10101 10000 IBAT5
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0x2D0, // 10110 10000 IBAT6
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0x2F0, // 10111 10000 IBAT7
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0x310, // 11000 10000 DBAT0
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0x330, // 11001 10000 DBAT1
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0x350, // 11010 10000 DBAT2
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0x370, // 11011 10000 DBAT3
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0x390, // 11100 10000 DBAT4
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0x3B0, // 11101 10000 DBAT5
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0x3D0, // 11110 10000 DBAT6
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0x3F0, // 11111 10000 DBAT7
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0x21F, // 10000 11111 HID0
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0x23F, // 10001 11111 HID1
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0x25F, // 10010 11111 HID2
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0x2BF, // 10101 11111 HID5
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0x21E, // 10000 11110 DMISS
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0x23E, // 10001 11110 DCMP
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0x25E, // 10010 11110 HASH1
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0x27E, // 10011 11110 HASH2
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0x29E, // 10100 11110 IMISS
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0x2BE, // 10101 11110 ICMP
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0x2DE, // 10110 11110 RPA
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0x25F, // 10010 11111 IABR
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0x0, // 00000 xxxxx MQ
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0x368, // 11011 01000 EAR
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0x3E8, // 11111 01000 PVR
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0x080, // 00100 xxxxx RTCU from
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0x0A0, // 00101 xxxxx RTCL from
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0x280, // 10100 00000 RTCU to
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0x2A0, // 10101 00000 RTCL to
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0x0C0, // 00110 xxxxx DEC from
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0x2C0 // 10110 00000 DEC, to
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};
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#define SUBREGSPRSIZE sizeof(SubRegSPR) / sizeof(ULONG)
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// structure used to define register flag fields
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struct SubReg {
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ULONG regindex;
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ULONG shift;
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||
|
|
ULONG mask;
|
||
|
|
};
|
||
|
|
|
||
|
|
// Believe these were typos in our architecture document.
|
||
|
|
|
||
|
|
struct SubReg subregname[] = {
|
||
|
|
// Floating Point Status Register
|
||
|
|
{ SPRFPSCR, 31, 1 }, // FPSCRFX
|
||
|
|
{ SPRFPSCR, 30, 1 }, // FPSCRFEX
|
||
|
|
{ SPRFPSCR, 29, 1 }, // FPSCRVX
|
||
|
|
{ SPRFPSCR, 28, 1 }, // FPSCROX
|
||
|
|
{ SPRFPSCR, 27, 1 }, // FPSCRUX
|
||
|
|
{ SPRFPSCR, 26, 1 }, // FPSCRZX
|
||
|
|
{ SPRFPSCR, 25, 1 }, // FPSCRXX
|
||
|
|
{ SPRFPSCR, 24, 1 }, // FPSCRSNAN
|
||
|
|
{ SPRFPSCR, 23, 1 }, // FPSCRISI
|
||
|
|
{ SPRFPSCR, 22, 1 }, // FPSCRIDI
|
||
|
|
{ SPRFPSCR, 21, 1 }, // FPSCRZDZ
|
||
|
|
{ SPRFPSCR, 20, 1 }, // FPSCRIMZ
|
||
|
|
{ SPRFPSCR, 19, 1 }, // FPSCRVC
|
||
|
|
{ SPRFPSCR, 18, 1 }, // FPSCRFR
|
||
|
|
{ SPRFPSCR, 17, 1 }, // FPSCRFI
|
||
|
|
{ SPRFPSCR, 12, 0x1f}, // FPSCRPRF
|
||
|
|
{ SPRFPSCR, 10, 1 }, // FPSCRSFT
|
||
|
|
{ SPRFPSCR, 9, 1 }, // FPSCRSQT
|
||
|
|
{ SPRFPSCR, 8, 1 }, // FPSCRCVI
|
||
|
|
{ SPRFPSCR, 7, 1 }, // FPSCRVE
|
||
|
|
{ SPRFPSCR, 6, 1 }, // FPSCROE
|
||
|
|
{ SPRFPSCR, 5, 1 }, // FPSCRUE
|
||
|
|
{ SPRFPSCR, 4, 1 }, // FPSCRZE
|
||
|
|
{ SPRFPSCR, 3, 1 }, // FPSCRXE
|
||
|
|
{ SPRFPSCR, 2, 1 }, // FPSCRRN
|
||
|
|
|
||
|
|
// Machine Status Register
|
||
|
|
{ SPRMSR, 15, 1 }, // MSREE
|
||
|
|
{ SPRMSR, 14, 1 }, // MSRPR
|
||
|
|
{ SPRMSR, 13, 1 }, // MSRFP
|
||
|
|
{ SPRMSR, 12, 1 }, // MSRME
|
||
|
|
{ SPRMSR, 11, 1 }, // MSRFE0
|
||
|
|
{ SPRMSR, 10, 1 }, // MSRSE
|
||
|
|
{ SPRMSR, 8, 1 }, // MSRFE1
|
||
|
|
{ SPRMSR, 6, 1 }, // MSREP
|
||
|
|
{ SPRMSR, 5, 1 }, // MSRIT
|
||
|
|
{ SPRMSR, 4, 1 }, // MSRDT
|
||
|
|
|
||
|
|
// Integer Exception Register
|
||
|
|
{ SPRXER, 31, 1 }, // XERSO
|
||
|
|
{ SPRXER, 30, 1 }, // XEROV
|
||
|
|
{ SPRXER, 29, 1 } // XERCA
|
||
|
|
};
|
||
|
|
|
||
|
|
UCHAR szUserBreak[] = "User";
|
||
|
|
UCHAR szKernelBreak[] = "Kernel";
|
||
|
|
UCHAR szBranchBreak[] = "BranchTaken";
|
||
|
|
UCHAR szNoBranchBreak[] = "NoBranchTaken";
|
||
|
|
UCHAR szStepBreak[] = "Step";
|
||
|
|
UCHAR szDivOvflBreak[] = "DivideOverFlow";
|
||
|
|
UCHAR szDivZeroBreak[] = "DivedeByZero";
|
||
|
|
UCHAR szRangeCheckBreak[] = "RangeCheck";
|
||
|
|
UCHAR szStackOvflBreak[] = "StackOverFlow";
|
||
|
|
UCHAR szMulOvflBreak[] = "MultiplyOverFlow";
|
||
|
|
UCHAR szPrintBreak[] = "DebugPrint";
|
||
|
|
UCHAR szPromptBreak[] = "DebugPrompt";
|
||
|
|
UCHAR szStopBreak[] = "DebugStop";
|
||
|
|
UCHAR szLoadSymBreak[] = "LoadSymbol";
|
||
|
|
UCHAR szUnloadSymBreak[] = "UnloadSymbol";
|
||
|
|
|
||
|
|
PUCHAR pszBreakOp[] = {
|
||
|
|
szUserBreak, szKernelBreak, szBranchBreak, szNoBranchBreak,
|
||
|
|
szStepBreak, szDivOvflBreak, szDivZeroBreak, szRangeCheckBreak,
|
||
|
|
szStackOvflBreak, szMulOvflBreak, szPrintBreak, szPromptBreak,
|
||
|
|
szStopBreak, szLoadSymBreak, szUnloadSymBreak
|
||
|
|
};
|
||
|
|
|
||
|
|
#define BREAKSIZE sizeof(pszBreakOp) / sizeof(PUCHAR)
|
||
|
|
|
||
|
|
/*** UserRegTest - test if index is a user-defined register
|
||
|
|
*
|
||
|
|
* Purpose:
|
||
|
|
* Test if register is user-defined for upper routines.
|
||
|
|
*
|
||
|
|
* Input:
|
||
|
|
* index - index of register
|
||
|
|
*
|
||
|
|
* Returns:
|
||
|
|
* TRUE if user-defined register, else FALSE
|
||
|
|
*
|
||
|
|
*************************************************************************/
|
||
|
|
|
||
|
|
BOOLEAN UserRegTest (ULONG index)
|
||
|
|
{
|
||
|
|
return (BOOLEAN)(index >= PREGU0 && index <= PREGU9);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*** GetRegFlagValue - get register or flag value
|
||
|
|
*
|
||
|
|
* Purpose:
|
||
|
|
* Return the value of the specified register or flag.
|
||
|
|
* This routine calls GetRegValue to get the register
|
||
|
|
* value and shifts and masks appropriately to extract a
|
||
|
|
* flag value.
|
||
|
|
*
|
||
|
|
* Input:
|
||
|
|
* regnum - register or flag specification
|
||
|
|
*
|
||
|
|
* Returns:
|
||
|
|
* Value of register or flag.
|
||
|
|
*
|
||
|
|
*************************************************************************/
|
||
|
|
|
||
|
|
DWORDLONG GetRegFlagValue (PDEBUGPACKET dp, ULONG regnum)
|
||
|
|
{
|
||
|
|
|
||
|
|
DWORDLONG value;
|
||
|
|
|
||
|
|
if (regnum < FLAGBASE || regnum >= PREGBASE)
|
||
|
|
value = GetRegValue(dp,regnum);
|
||
|
|
else {
|
||
|
|
regnum -= FLAGBASE;
|
||
|
|
value = GetRegValue(dp,subregname[regnum].regindex);
|
||
|
|
value = (value >> subregname[regnum].shift) & subregname[regnum].mask;
|
||
|
|
}
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*** GetRegValue - get register value
|
||
|
|
*
|
||
|
|
* Purpose:
|
||
|
|
* Returns the value of the register from the processor
|
||
|
|
* context structure.
|
||
|
|
*
|
||
|
|
* Input:
|
||
|
|
* regnum - register specification
|
||
|
|
*
|
||
|
|
* Returns:
|
||
|
|
* value of the register from the context structure
|
||
|
|
*
|
||
|
|
*************************************************************************/
|
||
|
|
|
||
|
|
DWORDLONG GetRegValue (PDEBUGPACKET dp, ULONG regnum)
|
||
|
|
{
|
||
|
|
return *(((PULONG)&dp->tctx->context.Fpr0) + regnum);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
ULONG GetRegString (PUCHAR pszString)
|
||
|
|
{
|
||
|
|
ULONG count;
|
||
|
|
|
||
|
|
for (count = 0; count < SPRDSISR; count++)
|
||
|
|
if (!strcmp(pszString, pszReg[count]))
|
||
|
|
return count;
|
||
|
|
for (count = PREGEA ; count < FPSCRFX; count++)
|
||
|
|
if (!strcmp(pszString, pszReg[count]))
|
||
|
|
return count;
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
void GetRegPCValue (PDEBUGPACKET dp, PDWORDLONG Address)
|
||
|
|
{
|
||
|
|
*Address = GetRegValue(dp,REGIP);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*** OutputAllRegs - output all registers and present instruction
|
||
|
|
*
|
||
|
|
* Purpose:
|
||
|
|
* Function of "r" command.
|
||
|
|
*
|
||
|
|
* To output the current register state of the processor.
|
||
|
|
* All integer registers are output as well as processor status
|
||
|
|
* registers. Important flag fields are also output separately.
|
||
|
|
* OutDisCurrent is called to output the current instruction(s).
|
||
|
|
*
|
||
|
|
* Input:
|
||
|
|
* None.
|
||
|
|
*
|
||
|
|
* Output:
|
||
|
|
* None.
|
||
|
|
*
|
||
|
|
*************************************************************************/
|
||
|
|
|
||
|
|
void OutputAllRegs(PDEBUGPACKET dp, BOOL Show64)
|
||
|
|
{
|
||
|
|
int regindex;
|
||
|
|
|
||
|
|
for (regindex = 0; regindex < REGDUMPEND; regindex++) {
|
||
|
|
lprintfs("%s=%08lx", pszReg[regindex + REGBASE],
|
||
|
|
GetRegValue(dp,regindex + REGBASE));
|
||
|
|
if (((regindex+1) % 6) == 0)
|
||
|
|
lprintfs("\r\n");
|
||
|
|
else
|
||
|
|
lprintfs(" ");
|
||
|
|
}
|
||
|
|
lprintfs("\r\n\r\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
PUCHAR
|
||
|
|
RegNameFromIndex (ULONG index)
|
||
|
|
{
|
||
|
|
return pszReg[index];
|
||
|
|
}
|