400 lines
11 KiB
C
400 lines
11 KiB
C
/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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aha154x.h
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Abstract:
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This module contains the structures, specific to the Adaptec aha154x
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host bus adapter, used by the SCSI miniport driver. Data structures
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that are part of standard ANSI SCSI will be defined in a header
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file that will be available to all SCSI device drivers.
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Revision History:
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03-27-93 Bob For March Beta
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--*/
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#include "scsi.h"
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// Flag to turn on the codes for DTC3290 and DTC3292
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#define DTC329X 1
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//
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// The following definitions are used to convert ULONG addresses
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// to Adaptec's 3 byte address format.
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//
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typedef struct _THREE_BYTE {
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UCHAR Msb;
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UCHAR Mid;
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UCHAR Lsb;
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} THREE_BYTE, *PTHREE_BYTE;
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//
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// Convert four-byte Little Endian to three-byte Big Endian
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//
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#define FOUR_TO_THREE(Three, Four) { \
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ASSERT(!((Four)->Byte3)); \
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(Three)->Lsb = (Four)->Byte0; \
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(Three)->Mid = (Four)->Byte1; \
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(Three)->Msb = (Four)->Byte2; \
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}
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#define THREE_TO_FOUR(Four, Three) { \
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(Four)->Byte0 = (Three)->Lsb; \
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(Four)->Byte1 = (Three)->Mid; \
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(Four)->Byte2 = (Three)->Msb; \
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(Four)->Byte3 = 0; \
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}
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#ifdef DTC329X
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#define FOUR_TO_FOUR(FourTo, FourFrom) { \
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(FourTo)->Byte0 = (FourFrom)->Byte0; \
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(FourTo)->Byte1 = (FourFrom)->Byte1; \
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(FourTo)->Byte2 = (FourFrom)->Byte2; \
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(FourTo)->Byte3 = (FourFrom)->Byte3; \
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}
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#endif
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///////////////////////////////////////////////////////////////////////////////
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//
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// CCB - Adaptec SCSI Command Control Block
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//
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// The CCB is a superset of the CDB (Command Descriptor Block)
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// and specifies detailed information about a SCSI command.
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//
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///////////////////////////////////////////////////////////////////////////////
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//
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// Byte 0 Command Control Block Operation Code
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//
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#define SCSI_INITIATOR_COMMAND 0x00
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#define TARGET_MODE_COMMAND 0x01
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#define SCATTER_GATHER_COMMAND 0x02
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//
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// Byte 1 Address and Direction Control
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//
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#define CCB_TARGET_ID_SHIFT 0x06 // CCB Op Code = 00, 02
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#define CCB_INITIATOR_ID_SHIFT 0x06 // CCB Op Code = 01
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#define CCB_DATA_XFER_OUT 0x10 // Write
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#define CCB_DATA_XFER_IN 0x08 // Read
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#define CCB_LUN_MASK 0x07 // Logical Unit Number
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//
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// Byte 2 SCSI_Command_Length - Length of SCSI CDB
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//
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// Byte 3 Request Sense Allocation Length
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//
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#define FOURTEEN_BYTES 0x00 // Request Sense Buffer size
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#define NO_AUTO_REQUEST_SENSE 0x01 // No Request Sense Buffer
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//
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// Bytes 4, 5 and 6 Data Length // Data transfer byte count
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//
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// Bytes 7, 8 and 9 Data Pointer // SGD List or Data Buffer
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//
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// Bytes 10, 11 and 12 Link Pointer // Next CCB in Linked List
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//
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// Byte 13 Command Link ID // TBD (I don't know yet)
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//
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// Byte 14 Host Status // Host Adapter status
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//
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#define CCB_COMPLETE 0x00 // CCB completed without error
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#define CCB_LINKED_COMPLETE 0x0A // Linked command completed
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#define CCB_LINKED_COMPLETE_INT 0x0B // Linked complete with interrupt
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#define CCB_SELECTION_TIMEOUT 0x11 // Set SCSI selection timed out
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#define CCB_DATA_OVER_UNDER_RUN 0x12
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#define CCB_UNEXPECTED_BUS_FREE 0x13 // Target dropped SCSI BSY
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#define CCB_PHASE_SEQUENCE_FAIL 0x14 // Target bus phase sequence failure
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#define CCB_BAD_MBO_COMMAND 0x15 // MBO command not 0, 1 or 2
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#define CCB_INVALID_OP_CODE 0x16 // CCB invalid operation code
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#define CCB_BAD_LINKED_LUN 0x17 // Linked CCB LUN different from first
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#define CCB_INVALID_DIRECTION 0x18 // Invalid target direction
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#define CCB_DUPLICATE_CCB 0x19 // Duplicate CCB
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#define CCB_INVALID_CCB 0x1A // Invalid CCB - bad parameter
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//
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// Byte 15 Target Status
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//
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// See SCSI.H files for these statuses.
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//
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//
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// Bytes 16 and 17 Reserved (must be 0)
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//
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//
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// Bytes 18 through 18+n-1, where n=size of CDB Command Descriptor Block
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//
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//
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// Bytes 18+n through 18+m-1, where m=buffer size Allocated for Sense Data
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//
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#define REQUEST_SENSE_BUFFER_SIZE 18
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///////////////////////////////////////////////////////////////////////////////
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//
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// Scatter/Gather Segment List Definitions
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//
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///////////////////////////////////////////////////////////////////////////////
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//
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// Adapter limits
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//
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#define MAX_SG_DESCRIPTORS 17
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#define MAX_TRANSFER_SIZE 64 * 1024
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//
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// Scatter/Gather Segment Descriptor Definition
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//
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typedef struct _SGD {
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#ifndef DTC329X
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THREE_BYTE Length;
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THREE_BYTE Address;
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#else
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FOUR_BYTE Length;
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FOUR_BYTE Address;
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#endif
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} SGD, *PSGD;
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typedef struct _SDL {
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SGD Sgd[MAX_SG_DESCRIPTORS];
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} SDL, *PSDL;
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#define SEGMENT_LIST_SIZE MAX_SG_DESCRIPTORS * sizeof(SGD)
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///////////////////////////////////////////////////////////////////////////////
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//
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// CCB Typedef
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//
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typedef struct _CCB {
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UCHAR OperationCode;
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UCHAR ControlByte;
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UCHAR CdbLength;
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UCHAR RequestSenseLength;
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#ifndef DTC329X
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THREE_BYTE DataLength;
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THREE_BYTE DataPointer;
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THREE_BYTE LinkPointer;
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#else
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FOUR_BYTE DataLength;
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FOUR_BYTE DataPointer;
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FOUR_BYTE LinkPointer;
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#endif
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UCHAR LinkIdentifier;
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UCHAR HostStatus;
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UCHAR TargetStatus;
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UCHAR Reserved[2];
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#ifndef DTC329X
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UCHAR Cdb[10];
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#else
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UCHAR Cdb[12];
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#endif
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PVOID SrbAddress;
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PVOID AbortSrb;
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SDL Sdl;
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UCHAR RequestSenseBuffer[REQUEST_SENSE_BUFFER_SIZE];
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} CCB, *PCCB;
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//
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// CCB and request sense buffer
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//
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#define CCB_SIZE sizeof(CCB)
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#define REZERO_UNIT_CMD 01 // 04-09-93, SCSI command to flush 3290 cache
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///////////////////////////////////////////////////////////////////////////////
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//
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// Adapter Command Overview
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//
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// Adapter commands are issued by writing to the Command/Data Out port.
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// They are used to initialize the host adapter and to establish control
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// conditions within the host adapter. They may not be issued when there
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// are outstanding SCSI commands.
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//
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// All adapter commands except Start SCSI(02) and Enable Mailbox-Out
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// Interrupt(05) must be executed only when the IDLE bit (Status bit 4)
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// is one. Many commands require additional parameter bytes which are
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// then written to the Command/Data Out I/O port (base+1). Before each
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// byte is written by the host to the host adapter, the host must verify
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// that the CDF bit (Status bit 3) is zero, indicating that the command
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// port is ready for another byte of information. The host adapter usually
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// clears the Command/Data Out port within 100 microseconds. Some commands
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// require information bytes to be returned from the host adapter to the
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// host. In this case, the host monitors the DF bit (Status bit 2) to
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// determine when the host adapter has placed a byte in the Data In I/O
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// port for the host to read. The DF bit is reset automatically when the
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// host reads the byte. The format of each adapter command is strictly
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// defined, so the host adapter and host system can always agree upon the
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// correct number of parameter bytes to be transferred during a command.
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//
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//
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///////////////////////////////////////////////////////////////////////////////
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//
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// Host Adapter Command Operation Codes
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//
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#define AC_NO_OPERATION 0x00
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#define AC_MAILBOX_INITIALIZATION 0x01
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#define AC_START_SCSI_COMMAND 0x02
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#define AC_START_BIOS_COMMAND 0x03
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#define AC_ADAPTER_INQUIRY 0x04
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#define AC_ENABLE_MBO_AVAIL_INT 0x05
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#define AC_SET_SELECTION_TIMEOUT 0x06
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#define AC_SET_BUS_ON_TIME 0x07
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#define AC_SET_BUS_OFF_TIME 0x08
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#define AC_SET_TRANSFER_SPEED 0x09
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#define AC_RET_INSTALLED_DEVICES 0x0A
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#define AC_RET_CONFIGURATION_DATA 0x0B
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#define AC_ENABLE_TARGET_MODE 0x0C
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#define AC_RETURN_SETUP_DATA 0x0D
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#define AC_WRITE_CHANNEL_2_BUFFER 0x1A
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#define AC_READ_CHANNEL_2_BUFFER 0x1B
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#define AC_WRITE_FIFO_BUFFER 0x1C
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#define AC_READ_FIFO_BUFFER 0x1D
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#define AC_ECHO_COMMAND_DATA 0x1F
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//
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// DMA Transfer Speeds
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//
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#define DMA_SPEED_50_MBS 0x00
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//
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// I/O Port Interface
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//
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typedef struct _BASE_REGISTER {
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UCHAR StatusRegister;
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UCHAR CommandRegister;
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UCHAR InterruptRegister;
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} BASE_REGISTER, *PBASE_REGISTER;
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//
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// Base+0 Write: Control Register
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//
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#define IOP_HARD_RESET 0x80 // bit 7
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#define IOP_SOFT_RESET 0x40 // bit 6
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#define IOP_INTERRUPT_RESET 0x20 // bit 5
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#define IOP_SCSI_BUS_RESET 0x10 // bit 4
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//
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// Base+0 Read: Status
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//
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#define IOP_SELF_TEST 0x80 // bit 7
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#define IOP_INTERNAL_DIAG_FAILURE 0x40 // bit 6
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#define IOP_MAILBOX_INIT_REQUIRED 0x20 // bit 5
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#define IOP_SCSI_HBA_IDLE 0x10 // bit 4
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#define IOP_COMMAND_DATA_OUT_FULL 0x08 // bit 3
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#define IOP_DATA_IN_PORT_FULL 0x04 // bit 2
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#define IOP_INVALID_COMMAND 0X01 // bit 1
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//
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// Base+1 Write: Command/Data Out
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//
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//
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// Base+1 Read: Data In
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//
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//
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// Base+2 Read: Interrupt Flags
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//
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#define IOP_ANY_INTERRUPT 0x80 // bit 7
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#define IOP_SCSI_RESET_DETECTED 0x08 // bit 3
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#define IOP_COMMAND_COMPLETE 0x04 // bit 2
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#define IOP_MBO_EMPTY 0x02 // bit 1
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#define IOP_MBI_FULL 0x01 // bit 0
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///////////////////////////////////////////////////////////////////////////////
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//
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// Mailbox Definitions
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//
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//
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///////////////////////////////////////////////////////////////////////////////
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//
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// Mailbox Definition
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//
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#define MB_COUNT 0x04 // number of mailboxes
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typedef struct _MBO {
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UCHAR Command;
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#ifndef DTC329X
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THREE_BYTE Address;
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#else
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FOUR_BYTE Address;
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#endif
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} MBO, *PMBO;
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//
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// MBO Command Values
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//
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#define MBO_FREE 0x00
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#define MBO_START 0x01
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#define MBO_ABORT 0x02
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//
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// Mailbox In
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//
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typedef struct _MBI {
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UCHAR Status;
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#ifndef DTC329X
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THREE_BYTE Address;
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#else
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FOUR_BYTE Address;
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#endif
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} MBI, *PMBI;
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//
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// MBI Status Values
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//
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#define MBI_FREE 0x00
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#define MBI_SUCCESS 0x01
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#define MBI_ABORT 0x02
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#define MBI_NOT_FOUND 0x03
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#define MBI_ERROR 0x04
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//
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// Mailbox Initialization
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//
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typedef struct _MAILBOX_INIT {
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UCHAR Count;
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THREE_BYTE Address;
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} MAILBOX_INIT, *PMAILBOX_INIT;
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