781 lines
19 KiB
C
781 lines
19 KiB
C
/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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elnkhrd.h
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Abstract:
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The main program for an Etherlink II MAC driver.
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Author:
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Anthony V. Ercolano (tonye) creation-date 19-Jun-1990 (Driver model)
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Orginal Elnkii code by AdamBa.
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Environment:
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This driver is expected to work in DOS, OS2 and NT at the equivalent
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of kernal mode.
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Architecturally, there is an assumption in this driver that we are
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on a little endian machine.
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Notes:
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optional-notes
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Revision History:
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Dec-1991 by Sean Selitrennikoff - Conversion of AdamBa's code to TonyE Model
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--*/
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#ifndef _ELNKIIHARDWARE_
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#define _ELNKIIHARDWARE_
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// AdaptP->IoBaseAddr
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//
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// must match the setting of I/O Base Address jumper on
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// the card. Choices are 0x300, 0x310, 0x330, 0x350, 0x250,
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// 0x280, 0x2a0, and 0x2e0.
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#define DEFAULT_IOBASEADDR (PVOID)0x300
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// AdaptP->ExternalTransceiver
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//
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// whether you are using thick Ethernet cable attached to the
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// DIX port, or thin Ethernet attached to the BNC port. This
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// will probably be TRUE.
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#define DEFAULT_EXTERNALTRANSCEIVER FALSE
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// AdaptP->InterruptNumber
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//
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// the interrupt number the board is using. Choices are 2, 3,
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// 4, or 5; some of these are used by other NT drivers.
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#define DEFAULT_INTERRUPTNUMBER 3
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// AdaptP->MemMapped
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//
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// whether to use memory mapping for data transfer, or programmed
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// I/O. If it is TRUE, the Memory base address jumper must be
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// moved from its default "Disable" setting.
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#define DEFAULT_MEMMAPPED FALSE
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// AdaptP->MaxOpens
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//
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// the maximum number of protocols that may be bound to this
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// adapter at one time.
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#define DEFAULT_MAXOPENS 4
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// AdaptP->MulticastListMax
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//
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// the maximum number of different multicast addresses that
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// may be specified to this adapter (the list is global for
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// all protocols).
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#define DEFAULT_MULTICASTLISTMAX 8
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//
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// Offsets from AdaptP->MappedIoBaseAddr of the ports used to access
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// the 8390 NIC registers.
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//
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// The names in parenthesis are the abbreviations by which
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// the registers are referred to in the 8390 data sheet.
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//
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// Some of the offsets appear more than once
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// because they have have relevant page 0 and page 1 values,
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// or they are different registers when read than they are
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// when written. The notation MSB indicates that only the
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// MSB can be set for this register, the LSB is assumed 0.
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//
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#define NIC_COMMAND 0x0 // (CR)
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#define NIC_PAGE_START 0x1 // (PSTART) MSB, write-only
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#define NIC_PHYS_ADDR 0x1 // (PAR0) page 1
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#define NIC_PAGE_STOP 0x2 // (PSTOP) MSB, write-only
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#define NIC_BOUNDARY 0x3 // (BNRY) MSB
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#define NIC_XMIT_START 0x4 // (TPSR) MSB, write-only
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#define NIC_XMIT_STATUS 0x4 // (TSR) read-only
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#define NIC_XMIT_COUNT_LSB 0x5 // (TBCR0) write-only
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#define NIC_XMIT_COUNT_MSB 0x6 // (TBCR1) write-only
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#define NIC_FIFO 0x6 // (FIFO) read-only
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#define NIC_INTR_STATUS 0x7 // (ISR)
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#define NIC_CURRENT 0x7 // (CURR) page 1
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#define NIC_MC_ADDR 0x8 // (MAR0) page 1
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#define NIC_RMT_COUNT_LSB 0xa // (RBCR0) write-only
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#define NIC_RMT_COUNT_MSB 0xb // (RBCR1) write-only
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#define NIC_RCV_CONFIG 0xc // (RCR) write-only
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#define NIC_RCV_STATUS 0xc // (RSR) read-only
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#define NIC_XMIT_CONFIG 0xd // (TCR) write-only
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#define NIC_FAE_ERR_CNTR 0xd // (CNTR0) read-only
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#define NIC_DATA_CONFIG 0xe // (DCR) write-only
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#define NIC_CRC_ERR_CNTR 0xe // (CNTR1) read-only
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#define NIC_INTR_MASK 0xf // (IMR) write-only
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#define NIC_MISSED_CNTR 0xf // (CNTR2) read-only
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//
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// Constants for the NIC_COMMAND register.
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//
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// Start/stop the card, start transmissions, and select
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// which page of registers was seen through the ports.
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//
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#define CR_STOP (UCHAR)0x01 // reset the card
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#define CR_START (UCHAR)0x02 // start the card
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#define CR_XMIT (UCHAR)0x04 // begin transmission
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#define CR_NO_DMA (UCHAR)0x20 // stop remote DMA
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#define CR_PS0 (UCHAR)0x40 // low bit of page number
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#define CR_PS1 (UCHAR)0x80 // high bit of page number
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#define CR_PAGE0 (UCHAR)0x00 // select page 0
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#define CR_PAGE1 CR_PS0 // select page 1
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#define CR_PAGE2 CR_PS1 // select page 2
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//
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// Constants for the NIC_XMIT_STATUS register.
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//
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// Indicate the result of a packet transmission.
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//
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#define TSR_XMIT_OK (UCHAR)0x01 // transmit with no errors
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#define TSR_COLLISION (UCHAR)0x04 // collided at least once
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#define TSR_ABORTED (UCHAR)0x08 // too many collisions
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#define TSR_NO_CARRIER (UCHAR)0x10 // carrier lost
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#define TSR_NO_CDH (UCHAR)0x40 // no collision detect heartbeat
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//
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// Constants for the NIC_INTR_STATUS register.
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//
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// Indicate the cause of an interrupt.
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//
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#define ISR_EMPTY (UCHAR)0x00 // no bits set in the ISR
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#define ISR_RCV (UCHAR)0x01 // packet received with no errors
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#define ISR_XMIT (UCHAR)0x02 // packet transmitted with no errors
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#define ISR_RCV_ERR (UCHAR)0x04 // error on packet reception
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#define ISR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
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#define ISR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
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#define ISR_COUNTER (UCHAR)0x20 // MSB set on tally counter
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#define ISR_RESET (UCHAR)0x80 // (not an interrupt) card is reset
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//
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// Constants for the NIC_RCV_CONFIG register.
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//
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// Configure what type of packets are received.
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//
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#define RCR_REJECT_ERR (UCHAR)0x00 // reject error packets
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#define RCR_BROADCAST (UCHAR)0x04 // receive broadcast packets
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#define RCR_MULTICAST (UCHAR)0x08 // receive multicast packets
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#define RCR_ALL_PHYS (UCHAR)0x10 // receive ALL directed packets
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//
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// Constants for the NIC_RCV_STATUS register.
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//
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// Indicate the status of a received packet.
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//
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// These are also used to interpret the status byte in the
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// packet header of a received packet.
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//
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#define RSR_PACKET_OK (UCHAR)0x01 // packet received with no errors
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#define RSR_CRC_ERROR (UCHAR)0x02 // packet received with CRC error
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#define RSR_MULTICAST (UCHAR)0x20 // packet received was multicast
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#define RSR_DISABLED (UCHAR)0x40 // received is disabled
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#define RSR_DEFERRING (UCHAR)0x80 // receiver is deferring
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//
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// Constants for the NIC_XMIT_CONFIG register.
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//
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// Configures how packets are transmitted.
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//
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#define TCR_NO_LOOPBACK (UCHAR)0x00 // normal operation
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#define TCR_LOOPBACK (UCHAR)0x02 // loopback (set when NIC is stopped)
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#define TCR_INHIBIT_CRC (UCHAR)0x01 // inhibit appending of CRC
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#define TCR_NIC_LBK (UCHAR)0x02 // loopback through the NIC
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#define TCR_SNI_LBK (UCHAR)0x04 // loopback through the SNI
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#define TCR_COAX_LBK (UCHAR)0x06 // loopback to the coax
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//
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// Constants for the NIC_DATA_CONFIG register.
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//
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// Set data transfer sizes.
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//
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#define DCR_BYTE_WIDE (UCHAR)0x00 // byte-wide DMA transfers
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#define DCR_WORD_WIDE (UCHAR)0x01 // word-wide DMA transfers
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#define DCR_LOOPBACK (UCHAR)0x00 // loopback mode (TCR must be set)
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#define DCR_NORMAL (UCHAR)0x08 // normal operation
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#define DCR_FIFO_8_BYTE (UCHAR)0x40 // 8-byte FIFO threshhold
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//
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// Constants for the NIC_INTR_MASK register.
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//
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// Configure which ISR settings actually cause interrupts.
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//
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#define IMR_RCV (UCHAR)0x01 // packet received with no errors
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#define IMR_XMIT (UCHAR)0x02 // packet transmitted with no errors
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#define IMR_RCV_ERR (UCHAR)0x04 // error on packet reception
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#define IMR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
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#define IMR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
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#define IMR_COUNTER (UCHAR)0x20 // MSB set on tally counter
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//
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// Offsets from AdaptP->MappedGabaseAddr (which is AdaptP->MappedIoBaseAddr+0x400)
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// of the ports used to access the Elnkii Gate Array registers.
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//
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// The names in parenthesis are the abbreviations by which
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// the registers are referred to in the Elnkii Technical
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// Reference.
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//
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#define GA_PAGE_START 0x0 // (PSTR) MSB
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#define GA_PAGE_STOP 0x1 // (PSPR) MSB
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#define GA_DRQ_TIMER 0x2 // (DQTR)
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#define GA_IO_BASE 0x3 // (BCFR) read-only
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#define GA_MEM_BASE 0x4 // (PCFR) read-only
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#define GA_CONFIG 0x5 // (GACFR)
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#define GA_CONTROL 0x6 // (CTRL)
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#define GA_STATUS 0x7 // (STREG) read-only
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#define GA_INT_DMA_CONFIG 0x8 // (IDCFR)
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#define GA_DMA_ADDR_MSB 0x9 // (DAMSB)
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#define GA_DMA_ADDR_LSB 0xa // (DALSB)
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#define GA_REG_FILE_MSB 0xe // (RFMSB)
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#define GA_REG_FILE_LSB 0xf // (RFLSB)
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//
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// Constants for the GA_DRQ_TIMER register.
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//
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#define DQTR_16_BYTE (UCHAR)0x10 // 16-byte programmed I/O bursts
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#define DQTR_8_BYTE (UCHAR)0x08 // 8-byte programmed I/O bursts
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//
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// Constants for the GA_CONFIG register.
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//
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#define GACFR_TC_MASK (UCHAR)0x40 // block DMA complete interrupts
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#define GACFR_RAM_SEL (UCHAR)0x08 // allow memory-mapped mode
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#define GACFR_MEM_BANK1 (UCHAR)0x01 // select window for 8K buffer
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//
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// Constants for the GA_CONTROL register.
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//
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#define CTRL_START (UCHAR)0x80 // start the DMA controller
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#define CTRL_STOP (UCHAR)0x00 // stop the DMA controller
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#define CTRL_DIR_DOWN (UCHAR)0x40 // system->board transfers
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#define CTRL_DIR_UP (UCHAR)0x00 // board->system transfers
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#define CTRL_DB_SEL (UCHAR)0x20 // connect FIFOs serially
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#define CTRL_PROM_SEL (UCHAR)0x04 // window PROM into GaAddr ports
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#define CTRL_GA_SEL (UCHAR)0x00 // window GA into GaAddr ports
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#define CTRL_BNC (UCHAR)0x02 // internal transceiver
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#define CTRL_DIX (UCHAR)0x00 // external transceiver
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#define CTRL_RESET (UCHAR)0x01 // emulate power up reset
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//
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// Constants for the GA_STATUS register.
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//
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#define STREG_DP_READY (UCHAR)0x80 // ready for programmed I/O transfer
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#define STREG_UNDERFLOW (UCHAR)0x40 // register file underflow
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#define STREG_OVERFLOW (UCHAR)0x20 // register file overflow
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#define STREG_IN_PROG (UCHAR)0x08 // programmed I/O in progress
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//++
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//
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// VOID
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// CardStart(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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//
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// Routine Description:
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//
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// Starts the card.
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//
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// Arguments:
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//
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// AdaptP - pointer to the adapter block
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//
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// Return Value:
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//
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// None.
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//
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//--
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//
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// Assume that the card has been stopped as in CardStop.
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//
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#define CardStart(AdaptP) \
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NdisRawWritePortUchar(AdaptP->MappedIoBaseAddr+NIC_XMIT_CONFIG, TCR_NO_LOOPBACK)
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//++
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//
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// VOID
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// CardSetAllMulticast(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Enables every bit in the card multicast bit mask.
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// Calls SyncCardSetAllMulticast.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardSetAllMulticast(AdaptP) \
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NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
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SyncCardSetAllMulticast, (PVOID)(AdaptP))
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//++
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//
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// VOID
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// CardCopyMulticastRegs(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Writes out the entire multicast bit mask to the card from
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// AdaptP->NicMulticastRegs. Calls SyncCardCopyMulticastRegs.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardCopyMulticastRegs(AdaptP) \
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NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
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SyncCardCopyMulticastRegs, (PVOID)(AdaptP))
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//++
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//
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// VOID
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// CardGetInterruptStatus(
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// IN PELNKII_ADAPTER AdaptP,
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// OUT PUCHAR InterrupStatus
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// )
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//
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// Routine Description:
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//
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// Reads the interrupt status (ISR) register from the card. Only
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// called at IRQL INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// InterruptStatus - Returns the value of ISR.
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//
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// Return Value:
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//
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//--
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#define CardGetInterruptStatus(AdaptP,InterruptStatus) \
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NdisRawReadPortUchar((AdaptP)->MappedIoBaseAddr+NIC_INTR_STATUS, (InterruptStatus))
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//++
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//
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// VOID
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// CardSetReceiveConfig(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Sets the receive configuration (RCR) register on the card.
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// The value used is AdaptP->NicReceiveConfig. Calls
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// SyncCardSetReceiveConfig.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardSetReceiveConfig(AdaptP) \
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NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
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SyncCardSetReceiveConfig, (PVOID)(AdaptP))
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//++
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//
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// VOID
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// CardBlockInterrupts(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Blocks all interrupts from the card by clearing the
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// interrupt mask (IMR) register. Only called from
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// IRQL INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardBlockInterrupts(AdaptP) \
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NdisRawWritePortUchar((AdaptP)->MappedIoBaseAddr+NIC_INTR_MASK, 0)
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//++
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//
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// VOID
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// CardUnblockInterrupts(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Unblocks all interrupts from the card by setting the
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// interrupt mask (IMR) register. Only called from IRQL
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// INTERRUPT_LEVEL.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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//
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// Return Value:
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//
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// None.
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//
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//--
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#define CardUnblockInterrupts(AdaptP) \
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NdisRawWritePortUchar( \
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(AdaptP)->MappedIoBaseAddr+NIC_INTR_MASK, \
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(AdaptP)->NicInterruptMask)
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//++
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//
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// VOID
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// CardDisableReceiveInterrupt(
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// IN PELNKII_ADAPTER AdaptP
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// )
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//
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// Routine Description:
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//
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// Turns off the receive bit in AdaptP->NicInterruptMask.
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// This function is only called when CardBlockInterrupts have
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// been called; it ensures that receive interrupts are not
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// reenabled until CardEnableReceiveInterrupt is called, even
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// if CardUnblockInterrupts is called.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardDisableReceiveInterrupt(AdaptP) \
|
|
(AdaptP)->NicInterruptMask &= (UCHAR)~IMR_RCV
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardEnableReceiveInterrupt(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Reenables receive interrupts by setting the receive bit ibn
|
|
// AdaptP->NicInterruptMask, and also writes the new value to
|
|
// the card. Calls SyncCardSetInterruptMask.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardEnableReceiveInterrupt(AdaptP) \
|
|
(AdaptP)->NicInterruptMask |= (UCHAR)IMR_RCV, \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardSetInterruptMask, (PVOID)(AdaptP))
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardAcknowledgeReceiveInterrupt(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Acknowledges a receive interrupt by setting the bit in
|
|
// the interrupt status (ISR) register. Calls
|
|
// SyncCardAcknowledgeReceive.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardAcknowledgeReceiveInterrupt(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardAcknowledgeReceive, (PVOID)(AdaptP))
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardAcknowledgeOverflowInterrupt(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Acknowledges an overflow interrupt by setting the bit in
|
|
// the interrupt status (ISR) register. Calls
|
|
// SyncCardAcknowledgeOverflow.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardAcknowledgeOverflowInterrupt(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardAcknowledgeOverflow, (PVOID)(AdaptP))
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardAcknowledgeTransmitInterrupt(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Acknowledges a transmit interrupt by setting the bit in
|
|
// the interrupt status (ISR) register. Calls
|
|
// SyncCardAcknowledgeTransmit.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardAcknowledgeTransmitInterrupt(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardAcknowledgeTransmit, (PVOID)(AdaptP))
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardAcknowledgeCounterInterrupt(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Acknowledges a counter interrupt by setting the bit in
|
|
// the interrupt status (ISR) register.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardAcknowledgeCounterInterrupt(AdaptP) \
|
|
NdisRawWritePortUchar((AdaptP)->MappedIoBaseAddr+NIC_INTR_STATUS, ISR_COUNTER)
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardAckAndGetCurrent(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Performs the function of CardAcknowledgeReceive followed by
|
|
// CardGetCurrent (since the two are always called
|
|
// one after the other). Calls SyncCardAckAndGetCurrent.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardAckAndGetCurrent(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardAckAndGetCurrent, (PVOID)(AdaptP))
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardGetXmitStatusAndAck(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Performs the function of CardGetXmitStatus followed by
|
|
// CardAcknowledgeTransmit (since the two are always called
|
|
// one after the other). Calls SyncCardGetXmitStatusAndAck.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardGetXmitStatusAndAck(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardGetXmitStatusAndAck, (PVOID)(AdaptP))
|
|
|
|
|
|
//++
|
|
//
|
|
// VOID
|
|
// CardUpdateCounters(
|
|
// IN PELNKII_ADAPTER AdaptP
|
|
// )
|
|
//
|
|
// Routine Description:
|
|
//
|
|
// Updates the values of the three counters (frame alignment
|
|
// errors, CRC errors, and missed packets) by reading in their
|
|
// current values from the card and adding them to the ones
|
|
// stored in the AdaptP structure. Calls SyncCardUpdateCounters.
|
|
//
|
|
// Arguments:
|
|
//
|
|
// AdaptP - The adapter block.
|
|
//
|
|
// Return Value:
|
|
//
|
|
// None.
|
|
//
|
|
//--
|
|
|
|
#define CardUpdateCounters(AdaptP) \
|
|
NdisSynchronizeWithInterrupt(&(AdaptP)->NdisInterrupt, \
|
|
SyncCardUpdateCounters, (PVOID)(AdaptP))
|
|
|
|
|
|
#endif // _ELNKIIHARDWARE_
|