866 lines
20 KiB
C
866 lines
20 KiB
C
/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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wdlmi.h
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Abstract:
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Lower MAC Interface functions for the NDIS 3.0 Western Digital driver.
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Author:
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Sean Selitrennikoff (seanse) 15-Jan-92
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Environment:
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Kernel mode, FSD
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Revision History:
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--*/
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#if DBG
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#define LOG(A) LOG(A)
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#else
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#define LOG(A)
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#endif
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#define WD_ETHERNET 0x01
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//
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// A transmit buffer (usually 0 or 1).
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//
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typedef SHORT XMIT_BUF;
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//
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// Maximum number of transmit buffers on the card.
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//
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#define MAX_XMIT_BUFS 2
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//
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// The status of transmit buffers.
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//
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typedef enum { EMPTY, FILLING, FULL } BUFFER_STATUS;
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//
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// Result of WdIndicate[Loopback]Packet().
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//
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typedef enum { INDICATE_OK, SKIPPED, ABORT, CARD_BAD } INDICATE_STATUS;
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//
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// Stages in a reset.
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//
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typedef enum { NONE, MULTICAST_RESET, XMIT_STOPPED, BUFFERS_EMPTY } RESET_STAGE;
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typedef struct _CNFG_Adapter {
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ULONG cnfg_bid; /* Board ID from GetBoardID */
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ULONG cnfg_ram_base; /* 32-Bit Phys Address of Shared RAM */
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ULONG cnfg_rom_base; /* 32-Bit Phys Address of Adapter ROM */
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USHORT cnfg_bus; /* 0=AT...1=MCA */
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USHORT cnfg_base_io; /* Adapter Base I/O Address */
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USHORT cnfg_slot; /* Micro Channel Slot Number */
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USHORT cnfg_ram_size; /* Shared RAM Size (# of 1KB blocks) */
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USHORT cnfg_ram_usable; /* Amount of RAM that can be accessed at once */
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USHORT cnfg_irq_line; /* Adapter IRQ Interrupt Line */
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USHORT cnfg_rom_size; /* Adapter ROM Size (# of 1KB blocks) */
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USHORT cnfg_mode_bits1; /* Mode bits for adapter (see below) */
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USHORT cnfg_pos_id;
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UCHAR cnfg_media_type; /* Media type */
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UCHAR cnfg_bic_type; /* Board Interface Chip number */
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UCHAR cnfg_nic_type; /* Network Interface Chip number */
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NDIS_MCA_POS_DATA PosData;
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} CNFG_Adapter, *PCNFG_Adapter;
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typedef struct _ADAPTER_STRUC{
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UCHAR bus_type; // 0 = ISA, 1 = MCA
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UCHAR mc_slot_num; // MCA bus only
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USHORT pos_id; // Adapter POS ID (Mca only)
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USHORT io_base; // Adapter I/O Base
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PUCHAR adapter_text_ptr; // See LM_Get_Config
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USHORT irq_value; // IRQ line used by hardware
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USHORT rom_size; // num of 1K blocks
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ULONG rom_base; // physical address of ROM
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PVOID rom_access; // Pointer into VM of rom_base
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USHORT ram_size; // num of 1K blocks
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ULONG ram_base; // physical address of RAM
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PVOID ram_access; // Pointer into VM of ram_base
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USHORT ram_usable; // num of 1K blocks that can be accessed at once
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USHORT io_base_new; // new i/o base addr for LM_Put_Config
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UCHAR node_address[6]; // network address
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UCHAR permanent_node_address[6]; // network address burned into card.
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UCHAR multi_address[6]; // multicase address
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USHORT max_packet_size; // for this MAC driver
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USHORT buffer_page_size; // size of adapters RAM TX/RX buffer pages.
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USHORT num_of_tx_buffs; // TX bufss in adapter RAM
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USHORT receive_lookahead_size;
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USHORT receive_mask;
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USHORT adapter_status;
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USHORT media_type;
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USHORT bic_type;
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USHORT nic_type;
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USHORT adapter_type;
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NDIS_HANDLE NdisAdapterHandle;
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NDIS_MCA_POS_DATA PosData;
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//
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// These counters must be initialized by the upper layer.
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//
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//
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// Common counters...
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//
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PULONG ptr_rx_CRC_errors;
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PULONG ptr_rx_lost_pkts;
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//
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// Ethernet specific counters. Must be initialized by upper layer.
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//
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PULONG ptr_rx_too_big;
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PULONG ptr_rx_align_errors;
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PULONG ptr_rx_overruns;
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PULONG ptr_tx_deferred;
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PULONG ptr_tx_max_collisions;
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PULONG ptr_tx_one_collision;
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PULONG ptr_tx_mult_collisions;
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PULONG ptr_tx_ow_collision;
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PULONG ptr_tx_CD_heartbeat;
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PULONG ptr_tx_carrier_lost;
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PULONG ptr_tx_underruns;
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ULONG board_id;
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USHORT mode_bits;
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USHORT status_bits;
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USHORT xmit_buf_size;
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USHORT config_mode; // 1 == Store config in EEROM
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UCHAR State;
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BOOLEAN BufferOverflow; // does an overflow need to be handled
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UCHAR InterruptMask;
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BOOLEAN UMRequestedInterrupt; // Has LM_Interrupt() been called.
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NDIS_INTERRUPT NdisInterrupt; // interrupt info used by wrapper
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UCHAR Current;
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//
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// Transmit information.
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//
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XMIT_BUF NextBufToFill; // where to copy next packet to
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XMIT_BUF NextBufToXmit; // valid if CurBufXmitting is -1
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XMIT_BUF CurBufXmitting; // -1 if none is
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BOOLEAN TransmitInterruptPending; // transmit interrupt and overwrite error?
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UINT PacketLens[MAX_XMIT_BUFS];
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BUFFER_STATUS BufferStatus[MAX_XMIT_BUFS];
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PUCHAR ReceiveStart; // start of card receive area
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PUCHAR ReceiveStop; // end of card receive area
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//
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// Loopback information
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//
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PNDIS_PACKET LoopbackQueue; // queue of packets to loop back
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PNDIS_PACKET LoopbackQTail;
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PNDIS_PACKET LoopbackPacket; // current one we are looping back
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//
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// Receive information
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//
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PUCHAR IndicatingPacket;
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BOOLEAN OverWriteHandling; // Currently handling an overwrite
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BOOLEAN OverWriteStartTransmit;
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UCHAR StartBuffer; // Start buffer number to receive into
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UCHAR LastBuffer; // Last buffer number + 1
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UINT PacketLen;
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//
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// Interrupt Information
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//
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UCHAR LaarHold;
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//
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// Pointer to the filter database for the MAC.
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//
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PETH_FILTER FilterDB;
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}Adapter_Struc, *Ptr_Adapter_Struc;
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//
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// LMI Status and Return codes
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//
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typedef USHORT LM_STATUS;
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#define SUCCESS 0x0
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#define ADAPTER_AND_CONFIG 0x1 // Adapter found and config info gotten
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#define ADAPTER_NO_CONFIG 0x2 // Adapter found, no config info found
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#define NOT_MY_INTERRUPT 0x3 // No interrupt found in LM_Service_Events
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#define FRAME_REJECTED 0x4
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#define EVENTS_DISABLED 0x5 // Disables LM_Service_Events from reporting
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// any further interrupts.
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#define OUT_OF_RESOURCES 0x6
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#define OPEN_FAILED 0x7
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#define HARDWARE_FAILED 0x8
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#define INITIALIZE_FAILED 0x9
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#define CLOSE_FAILED 0xA
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#define MAX_COLLISIONS 0xB
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#define FIFO_UNDERRUN 0xC
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#define BUFFER_TOO_SMALL 0xD
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#define ADAPTER_CLOSED 0xE
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#define FAILURE 0xF
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#define REQUEUE_LATER 0x12
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#define INVALID_FUNCTION 0x80
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#define INVALID_PARAMETER 0x81
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#define ADAPTER_NOT_FOUND 0xFFFF
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//
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// Valid states for the adapter
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//
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#define OPEN 0x1
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#define INITIALIZED 0x2
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#define CLOSED 0x3
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#define REMOVED 0x4
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//
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// Error code places
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//
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#define getBoardId 0x01
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#define cardGetConfig 0x02
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//
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// Media type masks (for LMAdapter.media_type)
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//
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#define MEDIA_S10 0x00 // Ethernet, TP
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#define MEDIA_AUI_UTP 0x01 // Ethernet, AUI
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#define MEDIA_BNC 0x02 // Ethernet, BNC
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#define MEDIA_UNKNOWN 0xFFFF
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//
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// BIC codes (for the bic_type field)
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//
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#define BIC_NO_CHIP 0x00
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#define BIC_583_CHIP 0x01
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#define BIC_584_CHIP 0x02
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#define BIC_585_CHIP 0x03
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#define BIC_593_CHIP 0x04
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#define BIC_594_CHIP 0x05
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#define BIC_790_CHIP 0x07
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//
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// NIC codes (for the nic_type field)
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//
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#define NIC_UNKNOWN_CHIP 0x00
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#define NIC_8390_CHIP 0x01
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#define NIC_690_CHIP 0x02
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#define NIC_825_CHIP 0x03
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#define NIC_790_CHIP 0x07
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//
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// Adapter type codes (for the adapter_type field)
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//
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#define BUS_UNKNOWN_TYPE 0x00
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#define BUS_ISA16_TYPE 0x01
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#define BUS_ISA8_TYPE 0x02
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#define BUS_MCA_TYPE 0x03
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#define BUS_EISA32M_TYPE 0x04
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#define BUS_EIST32S_TYPE 0x05
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//
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// UM_RingStatus_Change codes
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//
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#define SIGNAL_LOSS 0x14
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#define HARD_ERROR 0x15
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#define SOFT_ERROR 0x16
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#define TRANSMIT_BEACON 0x17
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#define LOBE_WIRE_FAULT 0x18
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#define AUTO_REMOVAL_ERROR_1 0x19
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#define REMOVE_RECEIVED 0x1A
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#define COUNTER_OVERFLOW 0x1B
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#define SINGLE_STATION 0x1C
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#define RING_RECOVERY 0x1D
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//++
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//
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// XMIT_BUF
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// NextBuf(
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// IN PWD_ADAPTER AdaptP,
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// IN XMIT_BUF XmitBuf
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// )
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//
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// Routine Description:
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//
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// NextBuf "increments" a transmit buffer number. The next
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// buffer is returned; the number goes back to 0 when it
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// reaches AdaptP->NumBuffers.
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//
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// Arguments:
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//
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// AdaptP - The adapter block.
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// XmitBuf - The current transmit buffer number.
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//
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// Return Value:
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//
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// The next transmit buffer number.
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//
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//--
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#define NextBuf(AdaptP, XmitBuf) \
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((XMIT_BUF)(((XmitBuf)+1)%(AdaptP)->NumBuffers))
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//
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// Function Definitions.
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//
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extern
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LM_STATUS
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LM_Send(
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PNDIS_PACKET Packet,
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Interrupt_req(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Service_Receive_Events(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Service_Transmit_Events(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Receive_Copy(
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PULONG Bytes_Transferred,
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ULONG Byte_Count,
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ULONG Offset,
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PNDIS_PACKET Packet,
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Receive_Lookahead(
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ULONG Byte_Count,
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ULONG Offset,
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PUCHAR Buffer,
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Get_Mca_Io_Base_Address(
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IN Ptr_Adapter_Struc Adapt,
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IN NDIS_HANDLE ConfigurationHandle,
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OUT USHORT *IoBaseAddress
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);
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extern
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LM_STATUS
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LM_Get_Config(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Free_Resources(
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Ptr_Adapter_Struc Adapt
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);
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extern
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LM_STATUS
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LM_Initialize_Adapter(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Open_Adapter(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Close_Adapter(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Disable_Adapter(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Disable_Adapter_Receives(
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Ptr_Adapter_Struc Adapt
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);
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extern
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LM_STATUS
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LM_Disable_Adapter_Transmits(
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Ptr_Adapter_Struc Adapt
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);
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extern
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LM_STATUS
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LM_Enable_Adapter(
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Ptr_Adapter_Struc Adapter
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);
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extern
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LM_STATUS
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LM_Enable_Adapter_Receives(
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Ptr_Adapter_Struc Adapt
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);
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extern
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LM_STATUS
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LM_Enable_Adapter_Transmits(
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Ptr_Adapter_Struc Adapt
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);
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#define LM_Set_Multi_Address(Addresses, Count, Adapter) (SUCCESS)
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extern
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LM_STATUS
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LM_Set_Receive_Mask(
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Ptr_Adapter_Struc Adapter
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);
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//
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//
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// Below here is LM Specific codes and structures..
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//
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//
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/******************************************************************************
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Definitions for the field:
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cnfg_mode_bits1
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******************************************************************************/
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#define INTERRUPT_STATUS_BIT 0x8000 /* PC Interrupt Line: 0 = Not Enabled */
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#define BOOT_STATUS_MASK 0x6000 /* Mask to isolate BOOT_STATUS */
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#define BOOT_INHIBIT 0x0000 /* BOOT_STATUS is 'inhibited' */
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#define BOOT_TYPE_1 0x2000 /* Unused BOOT_STATUS value */
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#define BOOT_TYPE_2 0x4000 /* Unused BOOT_STATUS value */
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#define BOOT_TYPE_3 0x6000 /* Unused BOOT_STATUS value */
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#define ZERO_WAIT_STATE_MASK 0x1800 /* Mask to isolate Wait State flags */
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#define ZERO_WAIT_STATE_8_BIT 0x1000 /* 0 = Disabled (Inserts Wait States) */
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#define ZERO_WAIT_STATE_16_BIT 0x0800 /* 0 = Disabled (Inserts Wait States) */
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#define BNC_INTERFACE 0x0400
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#define AUI_10BT_INTERFACE 0x0200
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#define STARLAN_10_INTERFACE 0x0100
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#define INTERFACE_TYPE_MASK 0x0700
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#define MANUAL_CRC 0x0010
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#define CNFG_ID_8003E 0x6FC0
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#define CNFG_ID_8003S 0x6FC1
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#define CNFG_ID_8003W 0x6FC2
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#define CNFG_ID_8013E 0x61C8
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#define CNFG_ID_8013W 0x61C9
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#define CNFG_ID_8115TRA 0x6FC6
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#define CNFG_ID_BISTRO03E 0xEFE5
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#define CNFG_ID_BISTRO13E 0xEFD5
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#define CNFG_ID_BISTRO13W 0xEFD4
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#define CNFG_MSR_583 MEMORY_SELECT_REG
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#define CNFG_ICR_583 INTERFACE_CONFIG_REG
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#define CNFG_IAR_583 IO_ADDRESS_REG
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#define CNFG_BIO_583 BIOS_ROM_ADDRESS_REG
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#define CNFG_IRR_583 INTERRUPT_REQUEST_REG
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#define CNFG_LAAR_584 LA_ADDRESS_REG
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#define CNFG_GP2 GENERAL_PURPOSE_REG2
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#define CNFG_LAAR_MASK LAAR_MASK
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#define CNFG_LAAR_ZWS LAAR_ZERO_WAIT_STATE
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#define CNFG_ICR_IR2_584 IR2
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#define CNFG_IRR_IRQS (INTERRUPT_REQUEST_BIT1 | INTERRUPT_REQUEST_BIT0)
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#define CNFG_IRR_IEN INTERRUPT_ENABLE
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#define CNFG_IRR_ZWS ZERO_WAIT_STATE_ENABLE
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#define CNFG_GP2_BOOT_NIBBLE 0xF
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#define CNFG_SIZE_8KB 8
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#define CNFG_SIZE_16KB 16
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#define CNFG_SIZE_32KB 32
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#define CNFG_SIZE_64KB 64
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#define ROM_DISABLE 0x0
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#define CNFG_SLOT_ENABLE_BIT 0x8
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#define CNFG_MEDIA_TYPE_MASK 0x07
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#define CNFG_INTERFACE_TYPE_MASK 0x700
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#define CNFG_POS_CONTROL_REG 0x96
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#define CNFG_POS_REG0 0x100
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#define CNFG_POS_REG1 0x101
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#define CNFG_POS_REG2 0x102
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#define CNFG_POS_REG3 0x103
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#define CNFG_POS_REG4 0x104
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#define CNFG_POS_REG5 0x105
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//
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//
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// General Register types
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//
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//
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#define WD_REG_0 0x00
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#define WD_REG_1 0x01
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#define WD_REG_2 0x02
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#define WD_REG_3 0x03
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#define WD_REG_4 0x04
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#define WD_REG_5 0x05
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#define WD_REG_6 0x06
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#define WD_REG_7 0x07
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#define WD_LAN_OFFSET 0x08
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#define WD_LAN_0 0x08
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#define WD_LAN_1 0x09
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#define WD_LAN_2 0x0A
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#define WD_LAN_3 0x0B
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#define WD_LAN_4 0x0C
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#define WD_LAN_5 0x0D
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#define WD_ID_BYTE 0x0E
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#define WD_CHKSUM 0x0F
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#define WD_MSB_583_BIT 0x08
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#define WD_SIXTEEN_BIT 0x01
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#define WD_BOARD_REV_MASK 0x1E
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//
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// Definitions for board Rev numbers greater than 1
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//
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#define WD_MEDIA_TYPE_BIT 0x01
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#define WD_SOFT_CONFIG_BIT 0x20
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#define WD_RAM_SIZE_BIT 0x40
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#define WD_BUS_TYPE_BIT 0x80
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//
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// Definitions for the 690 board
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//
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#define WD_690_CR 0x10 // command register
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#define WD_690_TXP 0x04 // transmit packet command
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#define WD_690_TCR 0x0D // transmit configuration register
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#define WD_690_TCR_TEST_VAL 0x18 // Value to test 8390 or 690
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#define WD_690_PS0 0x00 // Page Select 0
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#define WD_690_PS1 0x40 // Page Select 1
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#define WD_690_PS2 0x80 // Page Select 2
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#define WD_690_PSMASK 0x3F // For masking off the page select bits
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//
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// Definitions for the 584 board
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//
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#define WD_584_EEPROM_0 0x08
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#define WD_584_EEPROM_1 0x09
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#define WD_584_EEPROM_2 0x0A
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#define WD_584_EEPROM_3 0x0B
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#define WD_584_EEPROM_4 0x0C
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#define WD_584_EEPROM_5 0x0D
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#define WD_584_EEPROM_6 0x0E
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#define WD_584_EEPROM_7 0x0F
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#define WD_584_OTHER_BIT 0x02
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#define WD_584_ICR_MASK 0x0C
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#define WD_584_EAR_MASK 0x0F
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#define WD_584_ENGR_PAGE 0xA0
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#define WD_584_RLA 0x10
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#define WD_584_EA6 0x80
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#define WD_584_RECALL_DONE 0x10
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#define WD_584_ID_EEPROM_OVERRIDE 0x0000FFB0
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#define WD_584_EXTRA_EEPROM_OVERRIDE 0xFFD00000
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#define WD_584_EEPROM_MEDIA_MASK 0x07
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#define WD_584_STARLAN_TYPE 0x00
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#define WD_584_ETHERNET_TYPE 0x01
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#define WD_584_TP_TYPE 0x02
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#define WD_584_EW_TYPE 0x03
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#define WD_584_EEPROM_IRQ_MASK 0x18
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#define WD_584_PRIMARY_IRQ 0x00
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#define WD_584_ALT_IRQ_1 0x08
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#define WD_584_ALT_IRQ_2 0x10
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#define WD_584_ALT_IRQ_3 0x18
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#define WD_584_EEPROM_PAGING_MASK 0xC0
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#define WD_584_EEPROM_RAM_PAGING 0x40
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#define WD_584_EEPROM_ROM_PAGING 0x80
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#define WD_584_EEPROM_RAM_SIZE_MASK 0xE0
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#define WD_584_EEPROM_RAM_SIZE_RES1 0x00
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#define WD_584_EEPROM_RAM_SIZE_RES2 0x20
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#define WD_584_EEPROM_RAM_SIZE_8K 0x40
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#define WD_584_EEPROM_RAM_SIZE_16K 0x60
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#define WD_584_EEPROM_RAM_SIZE_32K 0x80
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#define WD_584_EEPROM_RAM_SIZE_64K 0xA0
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#define WD_584_EEPROM_RAM_SIZE_RES3 0xC0
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#define WD_584_EEPROM_RAM_SIZE_RES4 0xE0
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|
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#define WD_584_EEPROM_BUS_TYPE_MASK 0x07
|
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#define WD_584_EEPROM_BUS_TYPE_AT 0x00
|
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#define WD_584_EEPROM_BUS_TYPE_MCA 0x01
|
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#define WD_584_EEPROM_BUS_TYPE_EISA 0x02
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#define WD_584_EEPROM_BUS_SIZE_MASK 0x18
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#define WD_584_EEPROM_BUS_SIZE_8BIT 0x00
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#define WD_584_EEPROM_BUS_SIZE_16BIT 0x08
|
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#define WD_584_EEPROM_BUS_SIZE_32BIT 0x10
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#define WD_584_EEPROM_BUS_SIZE_64BIT 0x18
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|
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//
|
|
// For the 594 Chip
|
|
//
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//
|
|
// BOARD ID MASK DEFINITIONS
|
|
//
|
|
// 32 Bits of information are returned by 'GetBoardID ()'.
|
|
//
|
|
// The low order 16 bits correspond to the Feature Bits which make
|
|
// up a unique ID for a given class of boards.
|
|
//
|
|
// e.g. STARLAN MEDIA, INTERFACE_CHIP, MICROCHANNEL
|
|
//
|
|
// note: board ID should be ANDed with the STATIC_ID_MASK
|
|
// before comparing to a specific board ID
|
|
//
|
|
//
|
|
// The high order 16 bits correspond to the Extra Bits which do not
|
|
// change the boards ID.
|
|
//
|
|
// e.g. INTERFACE_584_CHIP, 16 BIT SLOT, ALTERNATE IRQ
|
|
//
|
|
|
|
|
|
#define STARLAN_MEDIA 0x00000001 /* StarLAN */
|
|
#define ETHERNET_MEDIA 0x00000002 /* Ethernet */
|
|
#define TWISTED_PAIR_MEDIA 0x00000003 /* Twisted Pair */
|
|
#define EW_MEDIA 0x00000004 /* Ethernet and Twisted Pair */
|
|
#define TOKEN_MEDIA 0x00000005 /* Token Ring */
|
|
|
|
#define MICROCHANNEL 0x00000008 /* MicroChannel Adapter */
|
|
#define INTERFACE_CHIP 0x00000010 /* Soft Config Adapter */
|
|
#define ADVANCED_FEATURES 0x00000020 /* Advance netw interface features */
|
|
#define BOARD_16BIT 0x00000040 /* 16 bit capability */
|
|
#define PAGED_RAM 0x00000080 /* Is there RAM paging? */
|
|
#define PAGED_ROM 0x00000100 /* Is there ROM paging? */
|
|
#define RAM_SIZE_UNKNOWN 0x00000000 /* 000 => Unknown RAM Size */
|
|
#define RAM_SIZE_RESERVED_1 0x00010000 /* 001 => Reserved */
|
|
#define RAM_SIZE_8K 0x00020000 /* 010 => 8k RAM */
|
|
#define RAM_SIZE_16K 0x00030000 /* 011 => 16k RAM */
|
|
#define RAM_SIZE_32K 0x00040000 /* 100 => 32k RAM */
|
|
#define RAM_SIZE_64K 0x00050000 /* 101 => 64k RAM */
|
|
#define RAM_SIZE_RESERVED_6 0x00060000 /* 110 => Reserved */
|
|
#define RAM_SIZE_RESERVED_7 0x00070000 /* 111 => Reserved */
|
|
#define SLOT_16BIT 0x00080000 /* 16 bit board - 16 bit slot */
|
|
#define NIC_690_BIT 0x00100000 /* NIC is 690 */
|
|
#define ALTERNATE_IRQ_BIT 0x00200000 /* Alternate IRQ is used */
|
|
#define INTERFACE_5X3_CHIP 0x00000000 /* 0000 = 583 or 593 chips */
|
|
#define INTERFACE_584_CHIP 0x00400000 /* 0100 = 584 chip */
|
|
#define INTERFACE_594_CHIP 0x00800000 /* 1000 = 594 chip */
|
|
|
|
#define MEDIA_MASK 0x00000007 /* Isolates Media Type */
|
|
#define RAM_SIZE_MASK 0x00070000 /* Isolates RAM Size */
|
|
#define STATIC_ID_MASK 0x0000FFFF /* Isolates Board ID */
|
|
#define INTERFACE_CHIP_MASK 0x03C00000 /* Isolates Intfc Chip Type */
|
|
|
|
/* Word definitions for board types */
|
|
|
|
#define WD8003E ETHERNET_MEDIA
|
|
#define WD8003EBT WD8003E /* functionally identical to WD8003E */
|
|
#define WD8003S STARLAN_MEDIA
|
|
#define WD8003SH WD8003S /* functionally identical to WD8003S */
|
|
#define WD8003WT TWISTED_PAIR_MEDIA
|
|
#define WD8003W (TWISTED_PAIR_MEDIA | INTERFACE_CHIP)
|
|
#define WD8003EB (ETHERNET_MEDIA | INTERFACE_CHIP)
|
|
#define WD8003EP WD8003EB /* with INTERFACE_584_CHIP */
|
|
#define WD8003EW (EW_MEDIA | INTERFACE_CHIP)
|
|
#define WD8003ETA (ETHERNET_MEDIA | MICROCHANNEL)
|
|
#define WD8003STA (STARLAN_MEDIA | MICROCHANNEL)
|
|
#define WD8003EA (ETHERNET_MEDIA | MICROCHANNEL | INTERFACE_CHIP)
|
|
#define WD8003EPA WD8003EA /* with INTERFACE_594_CHIP */
|
|
#define WD8003SHA (STARLAN_MEDIA | MICROCHANNEL | INTERFACE_CHIP)
|
|
#define WD8003WA (TWISTED_PAIR_MEDIA | MICROCHANNEL | INTERFACE_CHIP)
|
|
#define WD8003WPA WD8003WA /* with INTERFACE_594_CHIP */
|
|
#define WD8013EBT (ETHERNET_MEDIA | BOARD_16BIT)
|
|
#define WD8013EB (ETHERNET_MEDIA | BOARD_16BIT | INTERFACE_CHIP)
|
|
#define WD8013W (TWISTED_PAIR_MEDIA | BOARD_16BIT | INTERFACE_CHIP)
|
|
#define WD8013EW (EW_MEDIA | BOARD_16BIT | INTERFACE_CHIP)
|