291 lines
5.4 KiB
ArmAsm
291 lines
5.4 KiB
ArmAsm
// TITLE("Enable and Disable Processor Interrupts")
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//++
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//
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// Copyright (c) 1991 Microsoft Corporation
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//
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// Copyright (c) 1994 MOTOROLA, INC. All Rights Reserved. This file
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// contains copyrighted material. Use of this file is restricted
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// by the provisions of a Motorola Software License Agreement.
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//
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// Module Name:
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//
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// pxintsup.s
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//
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// Abstract:
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//
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// This module implements the code necessary to mask and unmask
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// interrupts on a PowerPC system.
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//
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// Author:
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//
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// Steve Johns
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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// 30-Dec-93 plj Added 603 support.
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// 7-Mar-95 Steve Johns Added HalpUpdate8259 for use in PXIRQL.C
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// 13-Mar-95 Steve Johns Assembly version of KeRaiseIrql
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//
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//--
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#include "halppc.h"
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.extern HalpIoControlBase
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.extern Halp8259MaskTable
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.set NewIrql, r.3
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.set OldIrql, r.4
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.set Index, r.4
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.set ISA_Base, r.5
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.set MaskTable, r.6
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.set MasterMask, r.8
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.set SlaveMask, r.9
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.set PCR, r.10
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.set MSR, r.11
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.set CLOCK2_LEVEL, 28
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#define KE_FLUSH_WRITE_BUFFERS() \
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sync ;\
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lbz r.0, 0x21(ISA_Base)
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//
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// VOID HalpUpdate8259(KIRQL NewIrql)
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//
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LEAF_ENTRY(HalpUpdate8259)
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//
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// Get pointers to Halp8259MaskTable & ISA I/O space
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//
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lwz MaskTable,[toc]Halp8259MaskTable(r.toc)
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add Index, NewIrql, NewIrql // Halp8259MaskTable is table of USHORTS
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lwz ISA_Base,[toc]HalpIoControlBase(r.toc)
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lwz ISA_Base,0(ISA_Base)
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//
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// MasterMask = Halp8259MaskTable[NewIrql];
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//
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lhzx MasterMask,Index,MaskTable
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//
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// SlaveMask = MasterMask >> 8;
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//
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srwi SlaveMask, MasterMask, 8
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//
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// WRITE_REGISTER_UCHAR(&(ISA_CONTROL->Interrupt1ControlPort1),
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// (UCHAR) MasterMask);
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//
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stb MasterMask, 0x21(ISA_Base)
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//
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// WRITE_REGISTER_UCHAR(&(ISA_CONTROL->Interrupt2ControlPort1),
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// (UCHAR) SlaveMask);
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//
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stb SlaveMask, 0xA1(ISA_Base)
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//
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// Make sure Eagle write buffers are flushed
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//
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KE_FLUSH_WRITE_BUFFERS()
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LEAF_EXIT (HalpUpdate8259)
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/*************************************************************************/
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//
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// VOID KeRaiseIrql ( KIRQL NewIrql, OUT PKIRQL OldIrql)
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//
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// Routine Description:
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//
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// This function raises the current IRQL to the specified value and
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// returns the old IRQL value.
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//
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// Arguments:
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//
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// NewIrql - Supplies the new IRQL value.
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//
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// OldIrql - Supplies a pointer to a variable that receives the old
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// IRQL value.
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//
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// NOTE: This assembly routine has been measured to be 25% faster than
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// its "C" equivalent.
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LEAF_ENTRY (KeRaiseIrql)
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mfsprg PCR,1 // Get ptr to the PCR
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cmpwi NewIrql, DISPATCH_LEVEL
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mfmsr MSR
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//
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// *OldIrql = PCR->CurrentIrql;
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//
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lbz r0,PcCurrentIrql(PCR)
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stb r0, 0(OldIrql)
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//
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// If this is a software-to-software transition,
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// then don't change hardware interrupt state.
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//
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// if (NewIrql <= DISPATCH_LEVEL)
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// goto RaiseSoftwareToSoftwareIrql;
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//
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ble RaiseSoftwareToSoftware
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cmpli cr1, 0, NewIrql, CLOCK2_LEVEL
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//
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// MSR[EE] = 0;
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//
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rlwinm r.0,MSR,0,~MASK_SPR(MSR_EE,1)
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mtmsr r.0
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cror 0,0,0 // N.B. 603e/ev Errata 15
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//
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// if (NewIrql >= CLOCK2_LEVEL) {
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// goto RaiseSoftwareToSoftware;
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// }
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//
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bge 1,RaiseSoftwareToSoftware
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//
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// Get pointers to Halp8259MaskTable & ISA I/O space
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//
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lwz MaskTable,[toc]Halp8259MaskTable(r.toc)
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add Index, NewIrql, NewIrql // Halp8259MaskTable is table of USHORTS
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lwz ISA_Base,[toc]HalpIoControlBase(r.toc)
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lwz ISA_Base,0(ISA_Base)
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//
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// MasterMask = Halp8259MaskTable[NewIrql];
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//
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lhzx MasterMask,Index,MaskTable
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//
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// SlaveMask = MasterMask >> 8;
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//
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srwi SlaveMask, MasterMask, 8
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//
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// WRITE_REGISTER_UCHAR(&(ISA_CONTROL->Interrupt1ControlPort1),
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// (UCHAR) MasterMask);
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//
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stb MasterMask, 0x21(ISA_Base)
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//
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// WRITE_REGISTER_UCHAR(&(ISA_CONTROL->Interrupt2ControlPort1),
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// (UCHAR) SlaveMask);
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//
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stb SlaveMask, 0xA1(ISA_Base)
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//
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// Make sure Eagle write buffers are flushed.
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//
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KE_FLUSH_WRITE_BUFFERS()
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//
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// PCR->CurrentIrql = NewIrql;
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//
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stb NewIrql, PcCurrentIrql(PCR)
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//
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// MSR[EE] = 1;
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//
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ori MSR,MSR,MASK_SPR(MSR_EE,1)
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mtmsr MSR
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cror 0,0,0 // N.B. 603e/ev Errata 15
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blr
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RaiseSoftwareToSoftware:
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//
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// PCR->CurrentIrql = NewIrql;
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//
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stb NewIrql, PcCurrentIrql(PCR)
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LEAF_EXIT (KeRaiseIrql)
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//
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// VOID HalpResetIrqlAfterInterrupt(KIRQL NewIrql)
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//
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// Routine Description:
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//
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// This function disables external interrupts, lowers the current
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// IRQL to the specified value and returns with interrupts disabled.
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//
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// This routine is called instead of KeLowerIrql to return IRQL to
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// its level prior to being raised due to an external interrupt.
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//
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// We know current IRQL is > DISPATCH_LEVEL
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//
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// Arguments:
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//
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// NewIrql - Supplies the new IRQL value.
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//
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// Return Value:
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//
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// None.
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//
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// {
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// HalpDisableInterrupts();
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// PCR->CurrentIrql = NewIrql;
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// if (NewIrql < CLOCK2_LEVEL)
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// HalpUpdate8259(NewIrql);
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// }
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LEAF_ENTRY (HalpResetIrqlAfterInterrupt)
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mfmsr MSR
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cmpwi NewIrql, CLOCK2_LEVEL
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mfsprg PCR,1 // Get ptr to the PCR
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//
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// MSR[EE] = 0;
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//
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rlwinm MSR,MSR,0,~MASK_SPR(MSR_EE,1)
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mtmsr MSR
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cror 0,0,0 // N.B. 603e/ev Errata 15
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stb NewIrql,PcCurrentIrql(PCR)
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blt+ ..HalpUpdate8259
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LEAF_EXIT (HalpResetIrqlAfterInterrupt)
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