1080 lines
39 KiB
C
1080 lines
39 KiB
C
/*++
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Copyright (c) 1993 Microsoft Corporation
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Module Name:
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disasm.c
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Abstract:
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This file provides support disassembly ( mips ).
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Author:
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Gerd Immeyer 19-Oct-1989
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Wesley Witt (wesw) 1-May-1993 ( ported from ntsd to drwatson)
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Environment:
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User Mode
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--*/
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#include <windows.h>
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#include <stddef.h>
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#include <string.h>
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#include "regs.h"
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#include "disasm.h"
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#include "drwatson.h"
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#include "proto.h"
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#define OPCODE 18
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#define OPSTART 26
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typedef struct optabentry {
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PUCHAR pszOpcode;
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ULONG fInstruction;
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} OPTABENTRY, *POPTABENTRY;
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INSTR disinstr;
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ULONG EAaddr = 0;
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DWORD EA;
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UCHAR pszUndef[] = "????";
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UCHAR pszNull[] = "";
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UCHAR pszAbs_s[] = "abs.s";
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UCHAR pszAdd[] = "add";
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UCHAR pszAdd_s[] = "add.s";
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UCHAR pszAddi[] = "addi";
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UCHAR pszAddiu[] = "addiu";
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UCHAR pszAddu[] = "addu";
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UCHAR pszAnd[] = "and";
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UCHAR pszAndi[] = "andi";
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UCHAR pszBc0f[] = "bc0f";
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UCHAR pszBc0fl[] = "bc0fl";
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UCHAR pszBc0t[] = "bc0t";
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UCHAR pszBc0tl[] = "bc0tl";
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UCHAR pszBc1f[] = "bc1f";
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UCHAR pszBc1fl[] = "bc1fl";
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UCHAR pszBc1t[] = "bc1t";
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UCHAR pszBc1tl[] = "bc1tl";
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UCHAR pszBc2f[] = "bc2f";
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UCHAR pszBc2fl[] = "bc2fl";
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UCHAR pszBc2t[] = "bc2t";
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UCHAR pszBc2tl[] = "bc2tl";
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UCHAR pszBc3f[] = "bc3f";
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UCHAR pszBc3fl[] = "bc3fl";
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UCHAR pszBc3t[] = "bc3t";
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UCHAR pszBc3tl[] = "bc3tl";
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UCHAR pszBgez[] = "bgez";
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UCHAR pszBgezal[] = "bgezal";
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UCHAR pszBgezall[] = "bgezall";
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UCHAR pszBgezl[] = "bgezl";
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UCHAR pszBgtz[] = "bgtz";
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UCHAR pszBgtzl[] = "bgtzl";
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UCHAR pszBeq[] = "beq";
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UCHAR pszBeql[] = "beql";
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UCHAR pszBlez[] = "blez";
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UCHAR pszBlezl[] = "blezl";
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UCHAR pszBltz[] = "bltz";
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UCHAR pszBltzal[] = "bltzal";
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UCHAR pszBltzall[] = "bltzall";
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UCHAR pszBltzl[] = "bltzl";
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UCHAR pszBne[] = "bne";
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UCHAR pszBnel[] = "bnel";
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UCHAR pszBreak[] = "break";
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UCHAR pszCache[] = "cache";
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UCHAR pszCeil_w_s[] = "ceil.w.s";
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UCHAR pszCfc0[] = "cfc0";
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UCHAR pszCfc1[] = "cfc1";
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UCHAR pszCfc2[] = "cfc2";
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UCHAR pszCfc3[] = "cfc3";
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UCHAR pszCtc0[] = "ctc0";
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UCHAR pszCtc1[] = "ctc1";
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UCHAR pszCtc2[] = "ctc2";
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UCHAR pszCtc3[] = "ctc3";
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UCHAR pszCop0[] = "cop0";
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UCHAR pszCop1[] = "cop1";
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UCHAR pszCop2[] = "cop2";
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UCHAR pszCop3[] = "cop3";
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UCHAR pszCvt_d_s[] = "cvt.d.s";
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UCHAR pszCvt_e_s[] = "cvt.e.s";
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UCHAR pszCvt_q_s[] = "cvt.q.s";
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UCHAR pszCvt_s_s[] = "cvt.s.s";
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UCHAR pszCvt_w_s[] = "cvt.w.s";
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UCHAR pszC_eq_s[] = "c.eq.s";
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UCHAR pszC_f_s[] = "c.f.s";
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UCHAR pszC_le_s[] = "c.le.s";
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UCHAR pszC_lt_s[] = "c.lt.s";
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UCHAR pszC_nge_s[] = "c.nge.s";
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UCHAR pszC_ngl_s[] = "c.ngl.s";
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UCHAR pszC_ngle_s[] = "c.ngle.s";
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UCHAR pszC_ngt_s[] = "c.ngt.s";
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UCHAR pszC_ole_s[] = "c.ole.s";
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UCHAR pszC_olt_s[] = "c.olt.s";
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UCHAR pszC_seq_s[] = "c.seq.s";
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UCHAR pszC_sf_s[] = "c.sf.s";
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UCHAR pszC_ueq_s[] = "c.ueq.s";
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UCHAR pszC_ule_s[] = "c.ule.s";
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UCHAR pszC_ult_s[] = "c.ult.s";
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UCHAR pszC_un_s[] = "c.un.s";
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UCHAR pszDiv[] = "div";
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UCHAR pszDivu[] = "divu";
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UCHAR pszDiv_s[] = "div.s";
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UCHAR pszEret[] = "eret";
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UCHAR pszFloor_w_s[] = "floor.w.s";
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UCHAR pszJ[] = "j";
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UCHAR pszJal[] = "jal";
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UCHAR pszJalr[] = "jalr";
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UCHAR pszJr[] = "jr";
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UCHAR pszLb[] = "lb";
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UCHAR pszLbu[] = "lbu";
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UCHAR pszLdc1[] = "ldc1";
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UCHAR pszLdc2[] = "ldc2";
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UCHAR pszLdc3[] = "ldc3";
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UCHAR pszLh[] = "lh";
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UCHAR pszLhu[] = "lhu";
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UCHAR pszLui[] = "lui";
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UCHAR pszLw[] = "lw";
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UCHAR pszLwc0[] = "lwc0";
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UCHAR pszLwc1[] = "lwc1";
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UCHAR pszLwc2[] = "lwc2";
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UCHAR pszLwc3[] = "lwc3";
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UCHAR pszLwl[] = "lwl";
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UCHAR pszLwr[] = "lwr";
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UCHAR pszMfc0[] = "mfc0";
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UCHAR pszMfc1[] = "mfc1";
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UCHAR pszMfc2[] = "mfc2";
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UCHAR pszMfc3[] = "mfc3";
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UCHAR pszMfhi[] = "mfhi";
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UCHAR pszMflo[] = "mflo";
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UCHAR pszMov_s[] = "mov.s";
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UCHAR pszMtc0[] = "mtc0";
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UCHAR pszMtc1[] = "mtc1";
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UCHAR pszMtc2[] = "mtc2";
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UCHAR pszMtc3[] = "mtc3";
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UCHAR pszMthi[] = "mthi";
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UCHAR pszMtlo[] = "mtlo";
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UCHAR pszMul_s[] = "mul.s";
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UCHAR pszMult[] = "mult";
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UCHAR pszMultu[] = "multu";
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UCHAR pszNeg_s[] = "neg.s";
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UCHAR pszNop[] = "nop";
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UCHAR pszNor[] = "nor";
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UCHAR pszOr[] = "or";
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UCHAR pszOri[] = "ori";
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UCHAR pszRfe[] = "rfe";
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UCHAR pszRound_w_s[] = "round.w.s";
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UCHAR pszSb[] = "sb";
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UCHAR pszSdc1[] = "sdc1";
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UCHAR pszSdc2[] = "sdc2";
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UCHAR pszSdc3[] = "sdc3";
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UCHAR pszSh[] = "sh";
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UCHAR pszSll[] = "sll";
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UCHAR pszSllv[] = "sllv";
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UCHAR pszSlt[] = "slt";
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UCHAR pszSlti[] = "slti";
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UCHAR pszSltiu[] = "sltiu";
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UCHAR pszSltu[] = "sltu";
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UCHAR pszSqrt_s[] = "sqrt.s";
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UCHAR pszSra[] = "sra";
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UCHAR pszSrav[] = "srav";
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UCHAR pszSrl[] = "srl";
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UCHAR pszSrlv[] = "srlv";
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UCHAR pszSub[] = "sub";
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UCHAR pszSub_s[] = "sub.s";
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UCHAR pszSubu[] = "subu";
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UCHAR pszSw[] = "sw";
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UCHAR pszSwc0[] = "swc0";
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UCHAR pszSwc1[] = "swc1";
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UCHAR pszSwc2[] = "swc2";
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UCHAR pszSwc3[] = "swc3";
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UCHAR pszSwl[] = "swl";
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UCHAR pszSwr[] = "swr";
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UCHAR pszSync[] = "sync";
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UCHAR pszSyscall[] = "syscall";
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UCHAR pszTeq[] = "teq";
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UCHAR pszTeqi[] = "teqi";
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UCHAR pszTge[] = "tge";
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UCHAR pszTgei[] = "tgei";
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UCHAR pszTgeiu[] = "tgeiu";
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UCHAR pszTgeu[] = "tgeu";
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UCHAR pszTlbp[] = "tlbp";
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UCHAR pszTlbr[] = "tlbr";
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UCHAR pszTlbwi[] = "tlbwi";
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UCHAR pszTlbwr[] = "tlbwr";
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UCHAR pszTlt[] = "tlt";
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UCHAR pszTlti[] = "tlti";
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UCHAR pszTltiu[] = "tltiu";
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UCHAR pszTltu[] = "tltu";
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UCHAR pszTne[] = "tne";
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UCHAR pszTnei[] = "tnei";
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UCHAR pszTrunc_w_s[] = "trunc.w.s";
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UCHAR pszXor[] = "xor";
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UCHAR pszXori[] = "xori";
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OPTABENTRY opTable[] = {
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{ pszNull, 0 }, // 00
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{ pszNull, 0 }, // 01
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{ pszJ, opnAddr26 }, // 02
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{ pszJal, opnAddr26 }, // 03
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{ pszBeq, opnRsRtRel16 }, // 04
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{ pszBne, opnRsRtRel16 }, // 05
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{ pszBlez, opnRsRel16 }, // 06
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{ pszBgtz, opnRsRel16 }, // 07
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{ pszAddi, opnRtRsImm16 }, // 08
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{ pszAddiu, opnRtRsImm16 }, // 09
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{ pszSlti, opnRtRsImm16 }, // 0a
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{ pszSltiu, opnRtRsImm16 }, // 0b
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{ pszAndi, opnRtRsImm16 }, // 0c
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{ pszOri, opnRtRsImm16 }, // 0d
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{ pszXori, opnRtRsImm16 }, // 0e
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{ pszLui, opnRtImm16 }, // 0f
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{ pszCop0, opnImm26 }, // 10
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{ pszCop1, opnImm26 }, // 11
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{ pszCop2, opnImm26 }, // 12
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{ pszCop3, opnImm26 }, // 13
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{ pszBeql, opnRsRtRel16 + opnR4000 }, // 14
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{ pszBnel, opnRsRtRel16 + opnR4000 }, // 15
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{ pszBlezl, opnRsRel16 + opnR4000 }, // 16
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{ pszBgtzl, opnRsRel16 + opnR4000 }, // 17
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{ pszUndef, 0 }, // 18
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{ pszUndef, 0 }, // 19
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{ pszUndef, 0 }, // 1a
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{ pszUndef, 0 }, // 1b
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{ pszUndef, 0 }, // 1c
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{ pszUndef, 0 }, // 1d
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{ pszUndef, 0 }, // 1e
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{ pszUndef, 0 }, // 1f
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{ pszLb, opnRtByteIndex }, // 20
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{ pszLh, opnRtWordIndex }, // 21
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{ pszLwl, opnRtLeftIndex }, // 22
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{ pszLw, opnRtDwordIndex }, // 23
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{ pszLbu, opnRtByteIndex }, // 24
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{ pszLhu, opnRtWordIndex }, // 25
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{ pszLwr, opnRtRightIndex }, // 26
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{ pszUndef, 0 }, // 27
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{ pszSb, opnRtByteIndex }, // 28
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{ pszSh, opnRtWordIndex }, // 29
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{ pszSwl, opnRtLeftIndex }, // 2a
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{ pszSw, opnRtDwordIndex }, // 2b
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{ pszUndef, 0 }, // 2c
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{ pszUndef, 0 }, // 2d
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{ pszSwr, opnRtRightIndex }, // 2e
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{ pszCache, opnCacheRightIndex + opnR4000 }, // 2f
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{ pszLwc0, opnRtDwordIndex }, // 30
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{ pszLwc1, opnFtDwordIndex }, // 31
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{ pszLwc2, opnRtDwordIndex }, // 32
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{ pszLwc3, opnRtDwordIndex }, // 33
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{ pszUndef, 0 }, // 34
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{ pszLdc1, opnFtDwordIndex + opnR4000 }, // 35 Qword?
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{ pszLdc2, opnRtDwordIndex + opnR4000 }, // 36 Qword?
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{ pszLdc3, opnRtDwordIndex + opnR4000 }, // 37 Qword?
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{ pszSwc0, opnRtDwordIndex }, // 38
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{ pszSwc1, opnFtDwordIndex }, // 39
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{ pszSwc2, opnRtDwordIndex }, // 3a
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{ pszSwc3, opnRtDwordIndex }, // 3b
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{ pszUndef, 0 }, // 3c
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{ pszSdc1, opnFtDwordIndex + opnR4000 }, // 3d Qword?
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{ pszSdc2, opnRtDwordIndex + opnR4000 }, // 3e Qword?
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{ pszSdc3, opnRtDwordIndex + opnR4000 }, // 3f Qword?
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};
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OPTABENTRY opSpecialTable[] = {
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{ pszSll, opnRdRtShift }, // 00
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{ pszUndef, 0 }, // 01
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{ pszSrl, opnRdRtShift }, // 02
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{ pszSra, opnRdRtShift }, // 03
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{ pszSllv, opnRdRtRs }, // 04
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{ pszUndef, 0 }, // 05
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{ pszSrlv, opnRdRtRs }, // 06
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{ pszSrav, opnRdRtRs }, // 07
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{ pszJr, opnRs }, // 08
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{ pszJalr, opnRdOptRs }, // 09
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{ pszUndef, 0 }, // 0a
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{ pszUndef, 0 }, // 0b
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{ pszSyscall, opnNone }, // 0c
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{ pszBreak, opnImm20 }, // 0d
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{ pszUndef, 0 }, // 0e
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{ pszSync, opnNone + opnR4000 }, // 0f
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{ pszMfhi, opnRd }, // 10
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{ pszMthi, opnRs }, // 11
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{ pszMflo, opnRd }, // 12
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{ pszMtlo, opnRs }, // 13
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{ pszUndef, 0 }, // 14
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{ pszUndef, 0 }, // 15
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{ pszUndef, 0 }, // 16
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{ pszUndef, 0 }, // 17
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{ pszMult, opnRsRt }, // 18
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{ pszMultu, opnRsRt }, // 19
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{ pszDiv, opnRsRt }, // 1a
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{ pszDivu, opnRsRt }, // 1b
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{ pszUndef, 0 }, // 1c
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{ pszUndef, 0 }, // 1d
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{ pszUndef, 0 }, // 1e
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{ pszUndef, 0 }, // 1f
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{ pszAdd, opnRdRsRt }, // 20
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{ pszAddu, opnRdRsRt }, // 21
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{ pszSub, opnRdRsRt }, // 22
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{ pszSubu, opnRdRsRt }, // 23
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{ pszAnd, opnRdRsRt }, // 24
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{ pszOr, opnRdRsRt }, // 25
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{ pszXor, opnRdRsRt }, // 26
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{ pszNor, opnRdRsRt }, // 27
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{ pszUndef, 0 }, // 28
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{ pszUndef, 0 }, // 29
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{ pszSlt, opnRdRsRt }, // 2a
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{ pszSltu, opnRdRsRt }, // 2b
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{ pszUndef, 0 }, // 2c
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{ pszUndef, 0 }, // 2d
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{ pszUndef, 0 }, // 2e
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{ pszUndef, 0 }, // 2f
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{ pszTge, opnRsRtImm10 + opnR4000 }, // 30
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{ pszTgeu, opnRsRtImm10 + opnR4000 }, // 31
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{ pszTlt, opnRsRtImm10 + opnR4000 }, // 32
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{ pszTltu, opnRsRtImm10 + opnR4000 }, // 33
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{ pszTeq, opnRsRtImm10 + opnR4000 }, // 34
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{ pszUndef, 0 }, // 35
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{ pszTne, opnRsRtImm10 + opnR4000 }, // 36
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{ pszUndef, 0 }, // 37
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{ pszUndef, 0 }, // 38
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{ pszUndef, 0 }, // 39
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{ pszUndef, 0 }, // 3a
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{ pszUndef, 0 }, // 3b
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{ pszUndef, 0 }, // 3c
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{ pszUndef, 0 }, // 3d
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{ pszUndef, 0 }, // 3e
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{ pszUndef, 0 } // 3f
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};
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OPTABENTRY opBcondTable[] = {
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{ pszBltz, opnRsRel16 }, // 00
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{ pszBgez, opnRsRel16 }, // 01
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{ pszBltzl, opnRsRel16 + opnR4000 }, // 02
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{ pszBgezl, opnRsRel16 + opnR4000 }, // 03
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{ pszUndef, 0 }, // 04
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{ pszUndef, 0 }, // 05
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{ pszUndef, 0 }, // 06
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{ pszUndef, 0 }, // 07
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{ pszTgei, opnRsImm16 + opnR4000 }, // 08
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{ pszTgeiu, opnRsImm16 + opnR4000 }, // 09
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{ pszTlti, opnRsImm16 + opnR4000 }, // 0a
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{ pszTltiu, opnRsImm16 + opnR4000 }, // 0b
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{ pszTeqi, opnRsImm16 + opnR4000 }, // 0c
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{ pszUndef, 0 }, // 0d
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{ pszTnei, opnRsImm16 + opnR4000 }, // 0e
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{ pszUndef, 0 }, // 0f
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{ pszBltzal, opnRsRel16 }, // 10
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{ pszBgezal, opnRsRel16 }, // 11
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{ pszBltzall, opnRsRel16 + opnR4000 }, // 12
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{ pszBgezall, opnRsRel16 + opnR4000 } // 13
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};
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OPTABENTRY opCopnTable[] = {
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{ pszMfc0, opnRtRd }, // 00
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{ pszMfc1, opnRtFs }, // 01
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{ pszMfc2, opnRtRd }, // 02
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{ pszMfc3, opnRtRd }, // 03
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{ pszCfc0, opnRtRd }, // 04
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{ pszCfc1, opnRtFs }, // 05
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{ pszCfc2, opnRtRd }, // 06
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{ pszCfc3, opnRtRd }, // 07
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{ pszMtc0, opnRtRd }, // 08
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{ pszMtc1, opnRtFs }, // 09
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{ pszMtc2, opnRtRd }, // 0a
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{ pszMtc3, opnRtRd }, // 0b
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{ pszCtc0, opnRtRd }, // 0c
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{ pszCtc1, opnRtFs }, // 0d
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{ pszCtc2, opnRtRd }, // 0e
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{ pszCtc3, opnRtRd }, // 0f
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|
{ pszBc0f, opnRel16 }, // 10
|
|
{ pszBc1f, opnRel16 }, // 11
|
|
{ pszBc2f, opnRel16 }, // 12
|
|
{ pszBc3f, opnRel16 }, // 13
|
|
{ pszBc0t, opnRel16 }, // 14
|
|
{ pszBc1t, opnRel16 }, // 15
|
|
{ pszBc2t, opnRel16 }, // 16
|
|
{ pszBc3t, opnRel16 }, // 17
|
|
{ pszBc0fl, opnRel16 + opnR4000 }, // 18
|
|
{ pszBc1fl, opnRel16 + opnR4000 }, // 19
|
|
{ pszBc2fl, opnRel16 + opnR4000 }, // 1a
|
|
{ pszBc3fl, opnRel16 + opnR4000 }, // 1b
|
|
{ pszBc0tl, opnRel16 + opnR4000 }, // 1c
|
|
{ pszBc1tl, opnRel16 + opnR4000 }, // 1d
|
|
{ pszBc2tl, opnRel16 + opnR4000 }, // 1e
|
|
{ pszBc3tl, opnRel16 + opnR4000 } // 1f
|
|
};
|
|
|
|
OPTABENTRY opFloatTable[] = {
|
|
{ pszAdd_s, opnFdFsFt }, // 00
|
|
{ pszSub_s, opnFdFsFt }, // 01
|
|
{ pszMul_s, opnFdFsFt }, // 02
|
|
{ pszDiv_s, opnFdFsFt }, // 03
|
|
{ pszSqrt_s, opnFdFs + opnR4000 }, // 04
|
|
{ pszAbs_s, opnFdFs }, // 05
|
|
{ pszMov_s, opnFdFs }, // 06
|
|
{ pszNeg_s, opnFdFs }, // 07
|
|
{ pszUndef, 0 }, // 08
|
|
{ pszUndef, 0 }, // 09
|
|
{ pszUndef, 0 }, // 0a
|
|
{ pszUndef, 0 }, // 0b
|
|
{ pszRound_w_s, opnFdFs + opnR4000 }, // 0c
|
|
{ pszTrunc_w_s, opnFdFs + opnR4000 }, // 0d
|
|
{ pszCeil_w_s, opnFdFs + opnR4000 }, // 0e
|
|
{ pszFloor_w_s, opnFdFs + opnR4000 }, // 0f
|
|
{ pszUndef, 0 }, // 10
|
|
{ pszUndef, 0 }, // 11
|
|
{ pszUndef, 0 }, // 12
|
|
{ pszUndef, 0 }, // 13
|
|
{ pszUndef, 0 }, // 14
|
|
{ pszUndef, 0 }, // 15
|
|
{ pszUndef, 0 }, // 16
|
|
{ pszUndef, 0 }, // 17
|
|
{ pszUndef, 0 }, // 18
|
|
{ pszUndef, 0 }, // 19
|
|
{ pszUndef, 0 }, // 1a
|
|
{ pszUndef, 0 }, // 1b
|
|
{ pszUndef, 0 }, // 1c
|
|
{ pszUndef, 0 }, // 1d
|
|
{ pszUndef, 0 }, // 1e
|
|
{ pszUndef, 0 }, // 1f
|
|
{ pszCvt_s_s, opnFdFs }, // 20
|
|
{ pszCvt_d_s, opnFdFs }, // 21
|
|
{ pszCvt_e_s, opnFdFs + opnR4000 }, // 22
|
|
{ pszCvt_q_s, opnFdFs + opnR4000 }, // 23
|
|
{ pszCvt_w_s, opnFdFs }, // 24
|
|
{ pszUndef, 0 }, // 25
|
|
{ pszUndef, 0 }, // 26
|
|
{ pszUndef, 0 }, // 27
|
|
{ pszUndef, 0 }, // 28
|
|
{ pszUndef, 0 }, // 29
|
|
{ pszUndef, 0 }, // 2a
|
|
{ pszUndef, 0 }, // 2b
|
|
{ pszUndef, 0 }, // 2c
|
|
{ pszUndef, 0 }, // 2d
|
|
{ pszUndef, 0 }, // 2e
|
|
{ pszUndef, 0 }, // 2f
|
|
{ pszC_f_s, opnFsFt }, // 30
|
|
{ pszC_un_s, opnFsFt }, // 31
|
|
{ pszC_eq_s, opnFsFt }, // 32
|
|
{ pszC_ueq_s, opnFsFt }, // 33
|
|
{ pszC_olt_s, opnFsFt }, // 34
|
|
{ pszC_ult_s, opnFsFt }, // 35
|
|
{ pszC_ole_s, opnFsFt }, // 36
|
|
{ pszC_ule_s, opnFsFt }, // 37
|
|
{ pszC_sf_s, opnFsFt }, // 38
|
|
{ pszC_ngle_s, opnFsFt }, // 39
|
|
{ pszC_seq_s, opnFsFt }, // 3a
|
|
{ pszC_ngl_s, opnFsFt }, // 3b
|
|
{ pszC_lt_s, opnFsFt }, // 3c
|
|
{ pszC_nge_s, opnFsFt }, // 3d
|
|
{ pszC_le_s, opnFsFt }, // 3e
|
|
{ pszC_ngt_s, opnFsFt } // 3f
|
|
};
|
|
|
|
OPTABENTRY TlbrEntry = { pszTlbr, opnNone };
|
|
OPTABENTRY TlbwiEntry = { pszTlbwi, opnNone };
|
|
OPTABENTRY TlbwrEntry = { pszTlbwr, opnNone };
|
|
OPTABENTRY TlbpEntry = { pszTlbp, opnNone };
|
|
OPTABENTRY RfeEntry = { pszRfe, opnNone };
|
|
OPTABENTRY EretEntry = { pszEret, opnNone };
|
|
OPTABENTRY UndefEntry = { pszUndef, 0 };
|
|
OPTABENTRY NopEntry = { pszNop, opnNone };
|
|
|
|
static PUCHAR pBufStart;
|
|
static PUCHAR pBuf;
|
|
static ULONG InstrOffset;
|
|
|
|
UCHAR HexDigit[16] = {
|
|
'0', '1', '2', '3', '4', '5', '6', '7',
|
|
'8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
|
|
};
|
|
|
|
//
|
|
// prototypes
|
|
//
|
|
|
|
void BlankFill(ULONG count);
|
|
void OutputHex (ULONG outvalue, ULONG length, BOOLEAN fSigned);
|
|
void OutputDisSymbol (PDEBUGPACKET dp, ULONG offset);
|
|
void OutputString (PUCHAR pStr);
|
|
void OutputReg (ULONG regnum);
|
|
void OutputFReg (ULONG regnum);
|
|
void GetNextOffset (PDEBUGPACKET dp, PULONG result, BOOLEAN fStep);
|
|
BOOLEAN fDelayInstruction (PDEBUGPACKET dp);
|
|
PUCHAR RegNameFromIndex (ULONG index);
|
|
|
|
|
|
|
|
BOOLEAN
|
|
disasm (PDEBUGPACKET dp, PDWORD poffset, PUCHAR bufptr, BOOLEAN fEAout)
|
|
{
|
|
ULONG opcode;
|
|
ULONG temp;
|
|
POPTABENTRY pEntry;
|
|
UCHAR chSuffix = '\0';
|
|
UCHAR EAsize = 0;
|
|
|
|
pBufStart = pBuf = bufptr;
|
|
OutputHex(*poffset, 8, 0); // output hex offset
|
|
*pBuf++ = ' ';
|
|
|
|
if (!DoMemoryRead( dp,
|
|
(LPVOID)*poffset,
|
|
(LPVOID)&disinstr.instruction,
|
|
sizeof(DWORD),
|
|
NULL
|
|
)) {
|
|
OutputString("???????? ????");
|
|
*pBuf = '\0';
|
|
return FALSE;
|
|
}
|
|
|
|
OutputHex(disinstr.instruction, 8, 0); // output hex contents
|
|
*pBuf++ = ' ';
|
|
|
|
// output the opcode in the table entry
|
|
|
|
opcode = disinstr.jump_instr.Opcode;
|
|
pEntry = &opTable[opcode]; // default value
|
|
|
|
if (opcode == 0x00) // special opcodes
|
|
if (disinstr.instruction)
|
|
pEntry = &opSpecialTable[disinstr.special_instr.Funct];
|
|
else
|
|
pEntry = &NopEntry; // special opcode for no-op
|
|
|
|
else if (opcode == 0x01) { // bcond opcodes
|
|
opcode = disinstr.immed_instr.RT;
|
|
if (opcode < 0x14)
|
|
pEntry = &opBcondTable[opcode];
|
|
else
|
|
pEntry = &UndefEntry;
|
|
}
|
|
|
|
else if ((opcode & ~0x3) == 0x10) { // coprocessor opcodes
|
|
temp = disinstr.immed_instr.RS;
|
|
if (temp & 0x10) { // test for CO bit
|
|
if (opcode == 0x10) { // test if COP0
|
|
temp = disinstr.special_instr.Funct;
|
|
if (temp == 0x01)
|
|
pEntry = &TlbrEntry;
|
|
else if (temp == 0x02)
|
|
pEntry = &TlbwiEntry;
|
|
else if (temp == 0x06)
|
|
pEntry = &TlbwrEntry;
|
|
else if (temp == 0x08)
|
|
pEntry = &TlbpEntry;
|
|
else if (temp == 0x10)
|
|
pEntry = &RfeEntry;
|
|
else if (temp == 0x18)
|
|
pEntry = &EretEntry;
|
|
}
|
|
else if (opcode == 0x11) { // coprocessor operations
|
|
opcode = disinstr.float_instr.Funct;
|
|
pEntry = &opFloatTable[opcode]; // get opcode
|
|
if (temp == 0x11)
|
|
chSuffix = 'd';
|
|
else if (temp == 0x12) {
|
|
chSuffix = 'e';
|
|
pEntry->fInstruction |= opnR4000;
|
|
}
|
|
else if (temp == 0x13) {
|
|
chSuffix = 'q';
|
|
pEntry->fInstruction |= opnR4000;
|
|
}
|
|
else if (temp == 0x14)
|
|
chSuffix = 'w';
|
|
else if (temp != 0x10)
|
|
pEntry = &UndefEntry;
|
|
}
|
|
}
|
|
else { // no CO bit, general COPz ops
|
|
if (!(temp & ~0x06)) // rs = 0, 2, 4, 6
|
|
pEntry = &opCopnTable[temp * 2 + (opcode - 0x10)];
|
|
else if ((temp & ~0x04) == 0x08) // rs = 8 or 0xc, rt = 0 to 3
|
|
pEntry = &opCopnTable[(4 + (disinstr.immed_instr.RT & 3)) * 4
|
|
+ (opcode - 0x10)];
|
|
}
|
|
}
|
|
|
|
// pEntry has the opcode string and operand template needed to
|
|
// output the instruction.
|
|
|
|
OutputString(pEntry->pszOpcode);
|
|
if (*(pBuf - 1) != '?' && chSuffix)
|
|
*(pBuf - 1) = chSuffix; // change xxx.s to xxx.d, xxx.w,
|
|
// xxx.e, or xxx.q (R4000 for e, q)
|
|
|
|
BlankFill(OPSTART);
|
|
|
|
// cache instruction has special codes for RT field value:
|
|
// 0 = 'i'; 1 = 'd'; 2 = 'si'; 3 = 'sd'
|
|
|
|
if (pEntry->fInstruction & opnCache) {
|
|
temp = disinstr.special_instr.RT;
|
|
if (temp > 3)
|
|
*pBuf++ = '?';
|
|
else {
|
|
if (temp > 1) {
|
|
*pBuf++ = 's';
|
|
temp -= 2;
|
|
}
|
|
if (temp == 0)
|
|
*pBuf++ = 'i';
|
|
else
|
|
*pBuf++ = 'd';
|
|
}
|
|
*pBuf++ = ',';
|
|
}
|
|
|
|
if (pEntry->fInstruction & opnPreRt) {
|
|
OutputReg(disinstr.special_instr.RT);
|
|
*pBuf++ = ',';
|
|
}
|
|
|
|
if (pEntry->fInstruction & opnRd)
|
|
OutputReg(disinstr.special_instr.RD);
|
|
|
|
if (pEntry->fInstruction & opnFd)
|
|
OutputFReg(disinstr.float_instr.FD);
|
|
|
|
if (pEntry->fInstruction & opnRdOptRs) {
|
|
if (disinstr.special_instr.RD != 0x1f) {
|
|
OutputReg(disinstr.special_instr.RD);
|
|
*pBuf++ = ',';
|
|
}
|
|
OutputReg(disinstr.immed_instr.RS);
|
|
}
|
|
|
|
if (pEntry->fInstruction & opnRdComma)
|
|
*pBuf++ = ',';
|
|
|
|
if (pEntry->fInstruction & opnRs)
|
|
OutputReg(disinstr.immed_instr.RS);
|
|
|
|
if (pEntry->fInstruction & opnFs)
|
|
OutputFReg(disinstr.float_instr.FS);
|
|
|
|
if (pEntry->fInstruction & opnRsComma)
|
|
*pBuf++ = ',';
|
|
|
|
if (pEntry->fInstruction & opnRt)
|
|
OutputReg(disinstr.immed_instr.RT);
|
|
|
|
if (pEntry->fInstruction & opnFt)
|
|
OutputFReg(disinstr.float_instr.FT);
|
|
|
|
if (pEntry->fInstruction & opnRtComma)
|
|
*pBuf++ = ',';
|
|
|
|
if (pEntry->fInstruction & opnPostRs)
|
|
OutputReg(disinstr.immed_instr.RS);
|
|
|
|
if (pEntry->fInstruction & opnImm10)
|
|
OutputHex((long)(short)disinstr.trap_instr.Value, 0, TRUE);
|
|
|
|
if (pEntry->fInstruction & opnImm16)
|
|
OutputHex((long)(short)disinstr.immed_instr.Value, 0, TRUE);
|
|
|
|
if (pEntry->fInstruction & opnRel16)
|
|
OutputDisSymbol(dp,((long)(short)disinstr.immed_instr.Value << 2)
|
|
+ *poffset + sizeof(ULONG));
|
|
|
|
if (pEntry->fInstruction & opnImm20)
|
|
OutputHex(disinstr.break_instr.Value, 0, TRUE);
|
|
|
|
if (pEntry->fInstruction & opnImm26)
|
|
OutputHex(disinstr.jump_instr.Target, 0, TRUE);
|
|
|
|
if (pEntry->fInstruction & opnAddr26)
|
|
OutputDisSymbol(dp,(disinstr.jump_instr.Target << 2)
|
|
+ (*poffset & 0xf0000000));
|
|
|
|
if (pEntry->fInstruction & opnAnyIndex) {
|
|
OutputHex((long)(short)disinstr.immed_instr.Value, 0, TRUE);
|
|
*pBuf++ = '(';
|
|
OutputReg(disinstr.immed_instr.RS);
|
|
*pBuf++ = ')';
|
|
|
|
if (fEAout) {
|
|
EAaddr = (DWORD)GetRegValue(dp, disinstr.immed_instr.RS + REGBASE)
|
|
+ (long)(short)disinstr.immed_instr.Value;
|
|
if (pEntry->fInstruction & opnByteIndex)
|
|
EAsize = 1;
|
|
else if (pEntry->fInstruction & opnWordIndex)
|
|
EAsize = 2;
|
|
else if (pEntry->fInstruction & opnDwordIndex)
|
|
EAsize = 4;
|
|
else if (pEntry->fInstruction & opnLeftIndex)
|
|
EAsize = (UCHAR)(4 - (EAaddr & 3));
|
|
else // if (pEntry->fInstruction & opnRightIndex)
|
|
EAsize = (UCHAR)((EAaddr & 3) + 1);
|
|
BlankFill(79 - 12 - (EAsize * 2));
|
|
OutputString("EA:");
|
|
OutputHex(EAaddr, 8, FALSE);
|
|
*pBuf++ = '=';
|
|
|
|
if (!DoMemoryRead( dp,
|
|
(LPVOID)EAaddr,
|
|
(LPVOID)&temp,
|
|
EAsize,
|
|
NULL
|
|
)) {
|
|
while (EAsize--) {
|
|
*pBuf++ = '?';
|
|
*pBuf++ = '?';
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
OutputHex(temp, (ULONG)(EAsize * 2), FALSE);
|
|
}
|
|
}
|
|
|
|
if (pEntry->fInstruction & opnShift)
|
|
OutputHex(disinstr.special_instr.RE, 2, FALSE);
|
|
|
|
*poffset += sizeof(ULONG);
|
|
*pBuf = '\0';
|
|
return TRUE;
|
|
}
|
|
|
|
/*** BlankFill - blank-fill buffer
|
|
*
|
|
* Purpose:
|
|
* To fill the buffer at *pBuf with blanks until
|
|
* position count is reached.
|
|
*
|
|
* Input:
|
|
* None.
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
void
|
|
BlankFill(ULONG count)
|
|
{
|
|
do
|
|
*pBuf++ = ' ';
|
|
while (pBuf < pBufStart + count);
|
|
}
|
|
|
|
/*** OutputHex - output hex value
|
|
*
|
|
* Purpose:
|
|
* Output the value in outvalue into the buffer
|
|
* pointed by *pBuf. The value may be signed
|
|
* or unsigned depending on the value fSigned.
|
|
*
|
|
* Input:
|
|
* outvalue - value to output
|
|
* length - length in digits
|
|
* fSigned - TRUE if signed else FALSE
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
void
|
|
OutputHex (ULONG outvalue, ULONG length, BOOLEAN fSigned)
|
|
{
|
|
UCHAR digit[8];
|
|
LONG index = 0;
|
|
|
|
if (fSigned && (long)outvalue < 0) {
|
|
*pBuf++ = '-';
|
|
outvalue = (ULONG)(-(long)outvalue);
|
|
}
|
|
if (fSigned) {
|
|
*pBuf++ = '0';
|
|
*pBuf++ = 'x';
|
|
}
|
|
do {
|
|
digit[index++] = HexDigit[outvalue & 0xf];
|
|
outvalue >>= 4;
|
|
}
|
|
while ((fSigned && outvalue) || (!fSigned && index < (LONG)length));
|
|
while (--index >= 0)
|
|
*pBuf++ = digit[index];
|
|
}
|
|
|
|
/*** OutputDisSymbol - output symbol for disassembly
|
|
*
|
|
* Purpose:
|
|
* Access symbol table with given offset and put string into buffer.
|
|
*
|
|
* Input:
|
|
* offset - offset of address to output
|
|
*
|
|
* Output:
|
|
* buffer pointed by pBuf updated with string:
|
|
* if symbol, no disp: <symbol>(<offset>)
|
|
* if symbol, disp: <symbol>+<disp>(<offset>)
|
|
* if no symbol, no disp: <offset>
|
|
*
|
|
*************************************************************************/
|
|
|
|
void
|
|
OutputDisSymbol (PDEBUGPACKET dp, ULONG offset)
|
|
{
|
|
ULONG displacement;
|
|
PUCHAR pszTemp;
|
|
UCHAR ch;
|
|
|
|
|
|
if (SymGetSymFromAddr( dp->hProcess, offset, &displacement, sym )) {
|
|
pszTemp = sym->Name;
|
|
if (!pszTemp) {
|
|
pszTemp = sym->Name;
|
|
}
|
|
while (ch = *pszTemp++) {
|
|
*pBuf++ = ch;
|
|
}
|
|
if (displacement) {
|
|
*pBuf++ = '+';
|
|
OutputHex(displacement, 8, TRUE);
|
|
}
|
|
*pBuf++ = '(';
|
|
OutputHex(offset, 8, FALSE);
|
|
*pBuf++ = ')';
|
|
}
|
|
else {
|
|
OutputHex(offset, 8, FALSE);
|
|
}
|
|
}
|
|
|
|
/*** OutputString - output string
|
|
*
|
|
* Purpose:
|
|
* Copy the string into the buffer pointed by pBuf.
|
|
*
|
|
* Input:
|
|
* *pStr - pointer to string
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
void
|
|
OutputString (PUCHAR pStr)
|
|
{
|
|
while (*pStr)
|
|
*pBuf++ = *pStr++;
|
|
}
|
|
|
|
void
|
|
OutputReg (ULONG regnum)
|
|
{
|
|
OutputString(RegNameFromIndex(regnum + REGBASE));
|
|
}
|
|
|
|
void
|
|
OutputFReg (ULONG regnum)
|
|
{
|
|
*pBuf++ = 'f';
|
|
if (regnum > 9)
|
|
*pBuf++ = (UCHAR)('0' + regnum / 10);
|
|
*pBuf++ = (UCHAR)('0' + regnum % 10);
|
|
}
|
|
|
|
/*** GetNextOffset - compute offset for trace or step
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*
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* Purpose:
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* From a limited disassembly of the instruction pointed
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* by the FIR register, compute the offset of the next
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* instruction for either a trace or step operation.
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*
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* Input:
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* fStep - TRUE for step offset; FALSE for trace offset
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*
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* Returns:
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* step or trace offset if input is TRUE or FALSE, respectively
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*
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*************************************************************************/
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void
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GetNextOffset (PDEBUGPACKET dp, PULONG result, BOOLEAN fStep)
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{
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ULONG returnvalue;
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ULONG opcode;
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ULONG firaddr;
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firaddr = (DWORD)GetRegValue(dp,REGFIR);
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DoMemoryRead( dp,
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(LPVOID)firaddr,
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(LPVOID)&disinstr.instruction,
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sizeof(ULONG),
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NULL
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);
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opcode = disinstr.jump_instr.Opcode;
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returnvalue = firaddr + sizeof(ULONG) * 2; // assume delay slot
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if (disinstr.instruction == 0x0000000c) {
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// stepping over a syscall instruction must set the breakpoint
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// at the caller's return address, not the inst after the syscall
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returnvalue = (DWORD)GetRegValue(dp,REGRA);
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}
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else
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if (opcode == 0x00L // SPECIAL
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&& (disinstr.special_instr.Funct & ~0x01L) == 0x08L) {
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// jr/jalr only
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if (disinstr.special_instr.Funct == 0x08L || !fStep) // jr or trace
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returnvalue = (DWORD)GetRegValue(dp,disinstr.special_instr.RS + REGBASE);
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}
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else if (opcode == 0x01L) {
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// For BCOND opcode, RT values 0x00 - 0x03, 0x10 - 0x13
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// are defined as conditional jumps. A 16-bit relative
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// offset is taken if:
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//
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// (RT is even and (RS) < 0 (0x00 = BLTZ, 0x02 = BLTZL,
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// 0x10 = BLTZAL, 0x12 = BLTZALL)
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// OR
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// RT is odd and (RS) >= 0 (0x01 = BGEZ, 0x03 = BGEZL
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// 0x11 = BGEZAL, 0x13 = BGEZALL))
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// AND
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// (RT is 0x00 to 0x03 (BLTZ BGEZ BLTZL BGEZL non-linking)
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// OR
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// fStep is FALSE (linking and not stepping over))
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//
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if (((disinstr.immed_instr.RT & ~0x13) == 0x00) &&
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(((LONG)GetRegValue(dp,disinstr.immed_instr.RS + REGBASE) >= 0) ==
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(BOOLEAN)(disinstr.immed_instr.RT & 0x01)) &&
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(((disinstr.immed_instr.RT & 0x10) == 0x00) || !fStep))
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returnvalue = ((LONG)(SHORT)disinstr.immed_instr.Value << 2)
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+ firaddr + sizeof(ULONG);
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}
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else if ((opcode & ~0x01L) == 0x02) {
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// J and JAL opcodes (0x02 and 0x03). Target is
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// 26-bit absolute offset using high four bits of the
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// instruction location. Return target if J opcode or
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// not stepping over JAL.
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//
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if (opcode == 0x02 || !fStep)
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returnvalue = (disinstr.jump_instr.Target << 2)
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+ (firaddr & 0xf0000000);
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}
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else if ((opcode & ~0x11L) == 0x04) {
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// BEQ, BNE, BEQL, BNEL opcodes (0x04, 0x05, 0x14, 0x15).
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// Target is 16-bit relative offset to next instruction.
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// Return target if (BEQ or BEQL) and (RS) == (RT),
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// or (BNE or BNEL) and (RS) != (RT).
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//
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if ((BOOLEAN)(opcode & 0x01) ==
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(BOOLEAN)((DWORD)GetRegValue(dp,disinstr.immed_instr.RS + REGBASE)
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!= (DWORD)GetRegValue(dp,disinstr.immed_instr.RT + REGBASE)))
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returnvalue = ((long)(short)disinstr.immed_instr.Value << 2)
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+ firaddr + sizeof(ULONG);
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}
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else if ((opcode & ~0x11L) == 0x06) {
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// BLEZ, BGTZ, BLEZL, BGTZL opcodes (0x06, 0x07, 0x16, 0x17).
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// Target is 16-bit relative offset to next instruction.
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// Return target if (BLEZ or BLEZL) and (RS) <= 0,
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// or (BGTZ or BGTZL) and (RS) > 0.
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//
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if ((BOOLEAN)(opcode & 0x01) ==
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(BOOLEAN)((long)GetRegValue(dp,disinstr.immed_instr.RS
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+ REGBASE) > 0))
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returnvalue = ((long)(short)disinstr.immed_instr.Value << 2)
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+ firaddr + sizeof(ULONG);
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}
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else if (opcode == 0x11L
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&& (disinstr.immed_instr.RS & ~0x04L) == 0x08L
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&& (disinstr.immed_instr.RT & ~0x03L) == 0x00L) {
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// COP1 opcode (0x11) with (RS) == 0x08 or (RS) == 0x0c and
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// (RT) == 0x00 to 0x03, producing BC1F, BC1T, BC1FL, BC1TL
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// instructions. Return target if (BC1F or BC1FL) and floating
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// point condition is FALSE or if (BC1T or BC1TL) and condition TRUE.
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//
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if ((disinstr.immed_instr.RT & 0x01) == (DWORD)GetRegFlagValue(dp,FLAGFPC))
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returnvalue = ((long)(short)disinstr.immed_instr.Value << 2)
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+ firaddr + sizeof(ULONG);
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}
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else if ((opcode == 0x38) && (fStep)) {
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//
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// stepping over an SC instruction, so skip the immediately following
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// BEQ instruction. The SC will fail because we are tracing over it,
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// the branch will be taken, and we will run through the LL/SC again
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// until the SC succeeds. Then the branch won't be taken, and we
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// will hit our breakpoint.
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//
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returnvalue += sizeof(ULONG); // skip BEQ and BEQ's delay slot
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}
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else
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returnvalue -= sizeof(ULONG); // remove delay slot
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*result = returnvalue;
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}
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/*** fDelayInstruction - returns flag TRUE if delayed instruction
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*
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* Purpose:
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* From a limited disassembly of the instruction pointed
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* by the FIR register, return TRUE if delayed, else FALSE.
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*
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* Input:
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* None.
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*
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* Returns:
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* set if instruction is delayed execution
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*
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*************************************************************************/
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BOOLEAN
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fDelayInstruction (PDEBUGPACKET dp)
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{
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BOOLEAN returnvalue;
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ULONG opcode;
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ULONG firaddr = (DWORD)GetRegValue(dp,REGFIR);
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|
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DoMemoryRead( dp,
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(LPVOID)firaddr,
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(LPVOID)&disinstr.instruction,
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sizeof(ULONG),
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NULL
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);
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opcode = disinstr.jump_instr.Opcode;
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if (opcode == 0x00)
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// for SPECIAL opcode, JR and JALR use a delay slot
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//
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returnvalue = (BOOLEAN)((disinstr.special_instr.Funct & ~1L)
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== 0x08);
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else if (opcode == 0x01)
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// for BCOND opcode, RT == 0x00 to 0x03 or 0x10 to 0x13 have slot
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// BLTZ, BGEZ, BLTZL, BGEZL, BLTZAL, BGEZAL, BLTZALL, BGEZALL
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//
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returnvalue = (BOOLEAN)((disinstr.special_instr.RT & ~0x13L)
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== 0x00);
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else if ((opcode & ~0x07L) == 0x00)
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// opcodes 0x02 to 0x07 have delay slot (0x00 and 0x01 tested above)
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// J, JAL, BEQ, BNE, BLEZ, BGTZ
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//
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returnvalue = TRUE;
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else if ((opcode & ~0x03L) == 0x14)
|
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// opcodes 0x14 to 0x17 have delay slot - BEQL, BNEL, BLEZL, BGTZL
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//
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returnvalue = TRUE;
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else
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// opcodes 0x10 to 0x13 - COPn - BCxF, BCxT, BCxFL, BCxTL
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//
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returnvalue = (BOOLEAN)((opcode & ~0x03L) == 0x10
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&& (disinstr.special_instr.RS & ~0x04L) == 0x08
|
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&& (disinstr.special_instr.RT & ~0x03L) == 0x00);
|
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return returnvalue;
|
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}
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