768 lines
26 KiB
C
768 lines
26 KiB
C
/*****************************************************************************
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BUILD Version: 0002 // Increment this if a change has global effects
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Copyright (c) 1993 Media Vision Inc. All Rights Reserved
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Module Name:
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hardware.h
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Abstract:
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This include file defines constants and types for
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the Media Vision Pro Audio Spectrum kernel mode device driver.
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Author:
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Robin Speed (RobinSp) 20-Oct-92
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Revision History:
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12-29-92 EPA Added PAS 16 support
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*****************************************************************************/
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//
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// Configuration info
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//
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#define PAS_DEFAULT_PORT 0x388
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#define PAS_DEFAULT_INT DEFAULT_IRQ_CHANNEL
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#define PAS_DEFAULT_DMACHANNEL DEFAULT_DMA_CHANNEL
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#define PAS_DEFAULT_DMA_BUFFERSIZE 0x4000
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//
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// Interrupt issues
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//
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#define INTERRUPT_MODE Latched
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#define IRQ_SHARABLE FALSE
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//
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// ProAudio Spectrum I/O ports
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//
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#define LOWEST_PAS_BASE_PORT 0x280 // Lowest Possible Base Port
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#define NUMBER_OF_PAS_PORTS 0x10000
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#define NUMBER_OF_SOUND_PORTS 0x0F
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#define NUMBER_OF_OPL3_PORTS 4
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//
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// Defaults Wave Sample rates
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//
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#define WAVE_INPUT_DEFAULT_RATE 11025 // Samples per second
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#define WAVE_OUTPUT_DEFAULT_RATE 11025 // Samples per second
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//
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// ********* Hardware state data **********
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//
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typedef struct
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{
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ULONG Key; // For debugging
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#define HARDWARE_KEY (*(ULONG *)"Hw ")
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//
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// Configuration
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//
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USHORT DSPVersion; // Card version
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BOOLEAN ThunderBoard; // it's a Thunderboard
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PUCHAR PortBase; // base port address for sound
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KSPIN_LOCK HwSpinLock; // Make sure we can write
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// or read after checking status
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// before someone else gets in!
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// (could it be a spectrum?)
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UCHAR Half; // For keeping in synch for SB1
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BOOLEAN SpeakerOn; // Logical speaker on
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// restarting DMA from Dpc routine
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//#if DBG
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#if 1
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BOOLEAN LockHeld; // Get spin lock right
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#endif // DBG
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//
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// Hardware data
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//
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BOOLEAN Stereo; // Was format stereo last time?
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UCHAR Format; // Current wave format sent to device
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UCHAR InputSource; // Where is input configured to?
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} SOUND_HARDWARE, *PSOUND_HARDWARE;
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//
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// Macros to assist in safely using our spin lock
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//
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//#if DBG
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#if 1
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#define HwEnter(pHw) \
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{ \
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KIRQL OldIrql; \
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KeAcquireSpinLock(&(pHw)->HwSpinLock, &OldIrql);\
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ASSERT((pHw)->LockHeld == FALSE); \
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(pHw)->LockHeld = TRUE;
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#define HwLeave(pHw) \
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ASSERT((pHw)->LockHeld == TRUE); \
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(pHw)->LockHeld = FALSE; \
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KeReleaseSpinLock(&(pHw)->HwSpinLock, OldIrql);\
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}
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#else
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#define HwEnter(pHw) \
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{ \
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KIRQL OldIrql; \
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ASSERT((pHw)->LockHeld == FALSE);\
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KeAcquireSpinLock(&(pHw)->HwSpinLock, &OldIrql);
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#define HwLeave(pHw) \
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ASSERT((pHw)->LockHeld == TRUE); \
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KeReleaseSpinLock(&(pHw)->HwSpinLock, OldIrql);\
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}
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#endif
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//
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// Devices - these values are also used as array indices
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//
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typedef enum
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{
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WaveInDevice = 0,
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WaveOutDevice,
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MidiOutDevice,
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MidiInDevice,
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LineInDevice,
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CDInternal,
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MixerDevice,
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NumberOfDevices
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} SOUND_DEVICES;
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//
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// macros for doing port reads
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//
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#define INPORT(pHw, port) \
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READ_PORT_UCHAR((PUCHAR)((pHw->PortBase) + (port)))
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#define OUTPORT(pHw, port, data) \
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WRITE_PORT_UCHAR((PUCHAR)((pHw->PortBase) + (port)), (UCHAR)(data))
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/****************************************************************************
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*
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* Definitions for Media Vision Pro Audio Spectrum
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*
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****************************************************************************/
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//==========================================================================
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//
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// Definitions from pasdef.h
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//
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//==========================================================================
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//
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// useful bit definitions
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//
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#define D0 (1<<0)
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#define D1 (1<<1)
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#define D2 (1<<2)
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#define D3 (1<<3)
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#define D4 (1<<4)
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#define D5 (1<<5)
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#define D6 (1<<6)
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#define D7 (1<<7)
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//
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// THESE DEFINITIONS FOR CAPABILITIES FILED
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//
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// default base I/O address of Pro AudioSpectrum
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#define DEFAULT_BASE 0x388
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#define PCM_CONTROL 0x0F8A //
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#define ENHANCED_SCSI_DETECT_REG 0x7F89 //
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#define SYSTEM_CONFIG_1 0x8388 //
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#define SYSTEM_CONFIG_2 0x8389 //
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#define SYSTEM_CONFIG_3 0x838A //
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#define SYSTEM_CONFIG_4 0x838B //
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#define IO_PORT_CONFIG_1 0xF388 //
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#define IO_PORT_CONFIG_2 0xF389 //
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#define IO_PORT_CONFIG_3 0xF38A //
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#define COMPATIBLE_REGISTER_ENABLE 0xF788 // SB and MPU emulation
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#define EMULATION_ADDRESS_POINTER 0xF789 // D0-D3 is SB; D4-D7 is MPU
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#define EMULATION_INTERRUPT_POINTER 0xFB8A // MPU and SB IRQ and SB DMA settings
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#define CHIP_REV 0xFF88 // MV101 chip revision number
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#define MASTER_MODE_READ 0xFF8B // aka Master Address Pointer
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//
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// Ports Locations (from COMMON.INC)
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//
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#define SYSSPKRTMR 0x0042 // System Speaker Timer Address
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#define SYSTMRCTLR 0x0043 // System Timer Control Register
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#define SYSSPKRREG 0x0061 // System Speaker Register
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#define JOYSTICK 0x0201 // Joystick Register
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#define LFMADDR 0x0388 // Left FM Synthesizer Address Register
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#define LFMDATA 0x0389 // Left FM Synthesizer Data Register
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#define RFMADDR 0x038A // Right FM Synthesizer Address Register
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#define RFMDATA 0x038B // Right FM Synthesizer Data Register
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#define DFMADDR 0x0788 // Dual FM Synthesizer Address Register
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#define DFMDATA 0x0789 // Dual FM Synthesizer Data Register
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#define AUDIOMIXR 0x0B88 // Audio Mixer Control Register
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#define AUDIOFILT 0x0B8A // Audio Filter Control Register
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#define INTRCTLRST 0x0B89 // Interrupt Control Status Register
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#define INTRCTLR 0x0B8B // Interrupt Control Register write
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#define INTRCTLRRB 0x0B8B // Interrupt Control Register read back
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#define PCMDATA 0x0F88 // PCM data I/O register
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#define CROSSCHANNEL 0x0F8A // Cross Channel Register
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#define SAMPLERATE 0x1388 // (t0) Sample Rate Timer Register
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#define SAMPLECNT 0x1389 // (t1) Sample Count Register
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#define SPKRTMR 0x138A // (t2) Local Speaker Timer Address
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#define TMRCTLR 0x138B // Local Timer Control Register
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#define MDIRQVECT 0x1788 // MIDI-1 IRQ Vector Register
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#define MDSYSCTLR 0x1789 // MIDI-2 System Control Register
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#define MDSYSSTAT 0x178A // MIDI-3 IRQ Status Register
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#define MDIRQCLR 0x178B // MIDI-4 IRQ Clear Register
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#define MDGROUP1 0x1B88 // MIDI-5 Group #1 Register
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#define MDGROUP2 0x1B89 // MIDI-6 Group #2 Register
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#define MDGROUP3 0x1B8A // MIDI-7 Group #3 Register
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#define MDGROUP4 0x1B8B // MIDI-8 Group #4 Register
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#define VU_LEFT_REG 0x2388 // Vu meter left (508 only)
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#define VU_RIGHT_REG 0x2389 // Vu meter right (508 only)
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#define AUXINTSTAT 0xE38A // Aux Int Status
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#define AUXINTENA 0xE38B // Aux Int Enable
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#define PAS2_MIDI_CTRL 0x178B
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#define PAS2_MIDI_STAT 0x1B88
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#define PAS2_MIDI_DAT 0x178A
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#define PAS2_FIFO_PTRS 0x1B89
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//
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// Cross Channel Bit definitions
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//
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#define fCCcrossbits 0x0F // 00001111B cross channel bit field
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#define fCCpcmbits 0xF0 // 11110000B pcm/dma control bit field
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#define bCCr2r 0x01 // 00000001B CROSSCHANNEL Right to Right
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#define bCCl2r 0x02 // 00000010B CROSSCHANNEL Left to Right
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#define bCCr2l 0x04 // 00000100B CROSSCHANNEL Right to Right
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#define bCCl2l 0x08 // 00001000B CROSSCHANNEL Left to Left
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#define bCCdac 0x10 // 00010000B DAC/ADC Control
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#define bCCmono 0x20 // 00100000B PCM Monaural Enable
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#define bCCenapcm 0x40 // 01000000B Enable PCM state machine
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#define bCCdrq 0x80 // 10000000B Enable DRQ bit
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//
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// Pro studion bits in the cross caps register
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//
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#define bLineBoost 0x02
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#define bCDBoost 0x04
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//
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// Interrupt Control Register Bits
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//
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#define fICintmaskbits 0x1F // 00011111B interrupt mask field bits
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#define fICrevbits 0xE0 // 11100000B revision mask field bits
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#define fICidbits 0xE0 // 11100000B Board revision ID field bits
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#define bICleftfm 0x01 // 00000001B Left FM interrupt enable
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#define bICritfm 0x02 // 00000010B Right FM interrupt enable
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#define bICaux 0x02 // 00000010B AUX interrupt enable
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#define bICsamprate 0x04 // 00000100B Sample Rate timer interrupt enable
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#define bICsampbuff 0x08 // 00001000B Sample buffer timer interrupt enable
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#define bICmidi 0x10 // 00010000B MIDI interrupt enable
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#define fICrevshr 5 // rotate rev bits to lsb
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//
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// Interrupt Status Register Bits
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//
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#define fISints 0x1F // 00011111B Interrupt bit field
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#define bISleftfm 0x01 // 00000001B Left FM interrupt active
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#define bISritfm 0x02 // 00000010B Right FM interrupt active
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#define bISaux 0x02 // 00000010B AUX interrupt active
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#define bISsamprate 0x04 // 00000100B Sample Rate timer interrupt active
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#define bISsampbuff 0x08 // 00001000B Sample buffer timer interrupt active
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#define bISmidi 0x10 // 00010000B MIDI interrupt active
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#define bISPCMlr 0x20 // 00100000B PCM left/right active
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#define bISActive 0x40 // 01000000B Hardware is active (not in reset)
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#define bISClip 0x80 // 10000000B Sample Clipping has occured
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//
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// FILTER_REGISTER
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//
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#define fFIdatabits 0x1f // 00011111B filter select and decode field bits
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#define fFImutebits D5 // filter mute field bit
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#define fFIpcmbits (D7+D6) // 11000000B filter sample rate field bits
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#define bFImute D5 // filter mute bit
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#define bFIsrate D6 // filter sample rate timer mask
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#define bFIsbuff D7 // filter sample buffer counter mask
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#define FILTERMAX 6 // six possible settings
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#define FILTER_MUTE 0 // mute - goes to PC speaker
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#define FILTER_LEVEL_1 1 // 20hz to 2.9khz
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#define FILTER_LEVEL_2 2 // 20hz to 5.9khz
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#define FILTER_LEVEL_3 3 // 20hz to 8.9khz
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#define FILTER_LEVEL_4 4 // 20hz to 11.9khz
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#define FILTER_LEVEL_5 5 // 20hz to 15.9khz
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#define FILTER_LEVEL_6 6 // 20hz to 17.8khz
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//
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// Misc DMA defines
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//
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#define polledmask bICsamprate+bICsampbuff // polled mask
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#define dmamask bICsampbuff // dma mask
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#define DMAOUTPUT 0 + dmamask // DMA is used to
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// drive the output
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#define POLLEDOUTPUT 0+polledmask // Polling routine drives output
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#define DMAINPUT 1+dmamask // DMA is used to read input
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#define POLLEDINPUT 1+polledmask // Polling routine reads input
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//
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// Used for volume setting
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//
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#define MIXER_508_REG 0x078B // Mixer 508 - 1 port
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#define SERIAL_MIXER 0x0B88 // for Pas 1 and Pas 8
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#define FEATURE_ENABLE 0x0B88 // for Pas 16 boards only
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#define INTERRUPT_ENABLE 0x0B89 //
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#define FILTER_REGISTER 0x0B8A //
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#define INTERRUPT_CTRL_REG 0x0B8B //
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//
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// Only one of each of these
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//
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#define PAS_2_WAKE_UP_REG 0x9a01 // aka Master Address Pointer
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//
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// Value to diable the Original PAS emulation on the PAS 16
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//
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#define DISABLE_ORG_PAS_EMULATION 0x02
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//
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// Initial Sys Config 3 Value
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//
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#define INIT_SYS_CONFIG3_VALUE 0x19
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//
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// Initial Audio Filter value
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//
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#define INIT_AUDIO_FILTER 0x21
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//
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// Disable PCM in the Feature Enable register
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//
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#define DISABLE_PCM 0x7F
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//
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// Min and Max Sample rates
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//
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#define MIN_SAMPLE_RATE 1500
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#define MAX_SAMPLE_RATE 66150
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//
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// Timer 0 defines
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//
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#define TIMER0_SQR_WAVE 0x36
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//
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// Timer 1 defines
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//
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#define TIMER1_RATE_GEN 0x74
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//
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// Midi Defines
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//
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#define PAS2_MIDI_RESET_FIFO 0x60
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#define PAS2_MIDI_RX_IRQ 0x04
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#define MIDI_INT_ENABLE 0x10
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#define MIDI_FRAME_ERROR 0x80
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#define MIDI_FIFO_ERROR 0x20
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#define MIDI_RESET_FIFO_PTR 0x20
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#define MIDI_FIFO_OUT_OK_STATUS 0xF0
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#define MIDI_FIFO_OUTPUT_WAIT 0x10
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#define MIDI_OUT_OK_RETRIES 1000
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//
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// FM Clock Override bit in Sys Config 1 (this correspondes to T:1 in MVSOUND.SYS)
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//
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#define FM_CLOCK_OVERRIDE_BIT D2 // Bit D2
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//
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// Not used here
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//
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#define TIMEOUT_COUNTER 0x4388 //
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#define TIMEOUT_STATUS 0x4389 //
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#define WAIT_STATE 0xBF88 //
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#define PRESCALE_DIVIDER 0xBF8A //
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#define SLAVE_MODE_READ 0xef8b // bits D0-D1
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//// BIT FIELDS FOR COMPATIBLE_REGISTER_ENABLE
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#define MPU_ENABLE_BIT D0
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#define SB_ENABLE_BIT D1
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#define SB_IRQ_ENABLE_BIT D2 // read only
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//// BIT FIELDS FOR FEATURE_ENABLE (0xb88)
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#define PCM_FEATURE_ENABLE D0
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#define FM_FEATURE_ENABLE D1
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#define MIXER_FEATURE_ENABLE D2
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//
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// Don't ask me what this is! But if it's not set in B88 then writing to
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// F8A has a bad effect on the CD and Line-in inputs for the Studio.
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//
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#define SB_FEATURE_ENABLE D4
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/// BIT FIELDS FOR PCM CONTROL
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#define PCM_STEREO D0+D3
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#define PCM_DAC D4
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#define PCM_MONO D5
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#define PCM_ENGINE D6
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#define PCM_DRQ D7
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/// BIT FIELDS FOR SYSTEM CONFIG 3
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#define C3_ENHANCED_TIMER D0
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#define C3_SB_CLOCK_EMUL D1 // don't set! see Brian Colvin
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#define C3_VCO_INVERT D2
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#define C3_INVERT_BCLK D3
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#define C3_SYNC_PULSE D4
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#define C3_PSEUDO_PCM_STEREO D5
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/// BIT FIELDS FOR INTERRUPT ENABLE
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#define INT_LEFT_FM D0
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#define INT_RIGHT_FM D1
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#define INT_SB D1
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#define INT_SAMPLE_RATE D2
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#define INT_SAMPLE_BUFFER D3
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#define INT_MIDI D4
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/// BIT FIELDS FOR COMPATIBLE REGISTER ENABLE
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#define COMPAT_MPU D0
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#define COMPAT_SB D1
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/// IRQ POINTER VALUES FOR EMULATION INTERRUPT POINTER
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#define EMUL_IRQ_NONE 0
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#define EMUL_IRQ_2 1
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#define EMUL_IRQ_3 2
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#define EMUL_IRQ_5 3
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#define EMUL_IRQ_7 4
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#define EMUL_IRQ_10 5
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#define EMUL_IRQ_11 6
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#define EMUL_IRQ_12 7
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/// DMA POINTER VALUES FOR EMULATION DMA POINTER
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#define EMUL_DMA_NONE 0
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#define EMUL_DMA_1 1
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#define EMUL_DMA_2 2
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#define EMUL_DMA_3 3
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/// BIT VALUES FOR FILTER REGISTER
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#define FILTER_NOMUTE D5
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//
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// Port I/O Macros
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//
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#define READ_PAS(pGDI, port) \
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READ_PORT_UCHAR((PUCHAR)((port) ^ (pGDI->TranslateCode)))
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#define WRITE_PAS(pGDI, port, data) \
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WRITE_PORT_UCHAR((PUCHAR)((port) ^ (pGDI->TranslateCode)), (UCHAR)(data))
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#define PASX_IN(pFI, port) \
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READ_PORT_UCHAR((pFI)->PROBase + ( (port) ^ (pFI)->TranslateCode) )
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#define PASX_OUT(pFI, port, data) \
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WRITE_PORT_UCHAR((pFI)->PROBase + ((port) ^ (pFI)->TranslateCode), (UCHAR)(data))
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//
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// Weird write to fix old pas basic timing bug
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//
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#define PASX_508_OUT(pFI, data) \
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WRITE_PORT_USHORT((PUSHORT)((pFI)->PROBase + ((MIXER_508_REG - 1) ^ (pFI)->TranslateCode)),\
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(USHORT)((USHORT)(data) | ((USHORT)(data) << 8)))
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//==========================================================================
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//
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// Definitions from patch.h (mixer stuff)
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//
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//==========================================================================
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// INPUT LINES
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#define IN_SYNTHESIZER 0
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#define IN_MIXER 1
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#define IN_EXTERNAL 2
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#define IN_INTERNAL 3
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#define IN_MICROPHONE 4
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#define IN_PCM 5
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#define IN_PC_SPEAKER 6
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#define IN_SNDBLASTER 7
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#define OUT_AMPLIFIER 0 // Output Select - Mixer A
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#define OUT_PCM 1 // Output Select - Mixer B
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#define NUM_IN_PATCHES 9
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#define NUM_OUT_PATCHES 3
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#define MIXCROSSCAPS_NORMAL_STEREO 0 // Left->Left, Right->Right
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#define MIXCROSSCAPS_RIGHT_TO_BOTH 1 // Right->Left, Right->Right
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#define MIXCROSSCAPS_LEFT_TO_BOTH 2 // Left->Left, Left->Right
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#define MIXCROSSCAPS_REVERSE_STEREO 4 // Left->Right, Right->Left
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#define MIXCROSSCAPS_RIGHT_TO_LEFT 8 // Right->Left, Right->Right
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#define MIXCROSSCAPS_LEFT_TO_RIGHT 0x10 // Left->Left, Left->Right
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#define _LEFT 1
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#define _RIGHT 2
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#define _BASS 0
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#define _TREBLE 1
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#define MV_508_ADDRESS D7
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#define MV_508_INPUT D4
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#define MV_508_SWAP D6
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#define MV_508_BASS (D0+D1)
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#define MV_508_TREBLE (D2)
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#define MV_508_EQMODE (D2+D0)
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#define MV_508_LOUDNESS D2
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#define MV_508_ENHANCE (D1+D0)
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/// DEFINES FOR SERIAL MIXER
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#define NATIONAL_SELECTMUTE_REG 0x40
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#define NATIONAL_LOUD_ENH_REG 0x41
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#define NATIONAL_BASS_REG 0x42
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#define NATIONAL_TREB_REG 0x43
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#define NATIONAL_LEFT_VOL_REG 0x44
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#define NATIONAL_RIGHT_VOL_REG 0x45
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#define NATIONAL_MODESELECT_REG 0x46
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#define NATIONAL_COMMAND D7
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#define NATIONAL_LOUDNESS D0
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#define NATIONAL_ENHANCE D1
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#define SERIAL_MIX_LEVEL D0
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#define SERIAL_MIX_CLOCK D1
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#define SERIAL_MIX_STROBE D2
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#define SERIAL_MIX_MASTER D4
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#define SERIAL_MIX_REALSOUND D6
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#define SERIAL_MIX_DUALFM D7
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/// SLAVE_MODE_READ BITS
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#define SLAVE_MODE_OPL3 D2
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#define SLAVE_MODE_16 D3
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//==========================================================================
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//
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// Definitions from findpas.h (card searching)
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//
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//==========================================================================
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typedef struct {
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USHORT wBoardRev;
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USHORT wChipRev;
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union
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{
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struct /* Our PAS_16 gives */
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{
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unsigned long CDInterfaceType:2; /* 3 */
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unsigned long EnhancedSCSI:1; /* 0 - not enhanced SCSI*/
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unsigned long DAC16:1; /* 1 DAC16 */
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unsigned long OPL_3:1; /* 1 OPL3 */
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unsigned long Mixer_508:1; /* 1 Mixer 508 */
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unsigned long DualDAC:1; /* 1 Dual DAC */
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unsigned long MPU401:1; /* 0 NO mpu401 */
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unsigned long Slot16:1; /* 1 - slot 16 */
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unsigned long MCA:1; /* 0 - not MCA */
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unsigned long CDPC:1; /* 0 - not CDPC */
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unsigned long SoundBlaster:1; /* 1 - sound blaster */
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unsigned long SCSI_IO_16:1; /* 1 - ? */
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unsigned long reserved:2;
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unsigned long Did_HW_Init:1; /* 0 - ? */
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unsigned long unused:16;
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} CapsBits;
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ULONG dwCaps;
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} Caps;
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ULONG ProPort;
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UCHAR ProDMA;
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UCHAR ProIRQ;
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USHORT SBPort;
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UCHAR SBDMA;
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UCHAR SBIRQ;
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USHORT MPUPort;
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UCHAR MPUIRQ;
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UCHAR CDIRQ;
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ULONG TranslateCode;
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UCHAR ReservedB1;
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UCHAR ReservedB2;
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PUCHAR PROBase;
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} FOUNDINFO, *PFOUNDINFO;
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#define IS_MIXER_508(pGDI) \
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( (pGDI)->PASInfo.Caps.CapsBits.Mixer_508 )
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#define IS_MIXER_508B(pGDI) \
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(IS_MIXER_508(pGDI) && \
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((pGDI)->PASInfo.wBoardRev == PAS_CDPC_LC || \
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(pGDI)->PASInfo.wBoardRev == PAS_BASIC))
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#define HAS_AUX2(pGDI) \
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((pGDI)->PASInfo.wBoardRev == PAS_CDPC_LC)
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// these version numbers are found in 0B8Bh
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#define PAS_VERSION_1 0x000 // original
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#define PAS_PLUS 0x001 // Pro Audio Spectrum Plus with SCSI
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#define PAS_SIXTEEN 0x001 // Pro Audio Spectrum 16 with SCSI
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#define PAS_STUDIO 0x003 // Pro Audio Studio 16 with SCSI
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#define PAS_CDPC_LC 0x004 // aka Memphis
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#define PAS_BASIC 0x005 // PAS Basic w/508-B mixer
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#define PAS_CDPC 0x007 //
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#define VERSION_CDPC 0x007 // Same as PAS_CDPC
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#define BOARD_REV_MASK 07
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#define CHIP_REV_B 0x002
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#define CHIP_REV_D 0x004
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#define NO_PAS_INSTALLED 0x000 // can't find board
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// CD interface type definitions
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#define NO_INTERFACE 0
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#define MITSUMI_TYPE 1
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#define SONY_TYPE 2
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#define SCSI_TYPE 3
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/*****************************************************************************
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* PAS 16 Support *
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*****************************************************************************/
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//
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// PAS 16 shadow registers for the GDI structure
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//
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typedef struct
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{
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// BYTE _sysspkrtmr; // 42 System Speaker Timer Address
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// BYTE _systmrctlr; // 43 System Timer Control Register
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// BYTE _sysspkrreg; // 61 System Speaker Register
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// BYTE _joystick; // 201 Joystick Register
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// BYTE _lfmaddr; // 388 Left FM Synthesizer Address Register
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// BYTE _lfmdata; // 389 Left FM Synthesizer Data Register
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// BYTE _rfmaddr; // 38A Right FM Synthesizer Address Register
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// BYTE _rfmdata; // 38B Right FM Synthesizer Data Register
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// BYTE _dfmaddr; // 788 Dual FM Synthesizer Address Register
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// BYTE _dfmdata; // 789 Dual FM Synthesizer Data Register
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BYTE _audiomixr; // B88 Audio Mixer Control Register
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// BYTE _intrctlrst; // B89 Interrupt Status Register write
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BYTE _audiofilt; // B8A Audio Filter Control Register (0x39)
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BYTE _intrctlr; // B8B Interrupt Control Register write
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BYTE _pcmdata; // F88 PCM data I/O register
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// BYTE _regF89; // F89 reserved for future use
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BYTE _crosschannel; // F8A Cross Channel (+bCCdac)
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// BYTE _regF8B; // F8B reserved for future use
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// WORD _samplerate; // 1388 Sample Rate Timer Register
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// WORD _samplecnt; // 1389 Sample Count Register
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// WORD _spkrtmr; // 138A Local Speaker Timer Address
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// BYTE _mdirqvect; // 1788 MIDI IRQ Vector Register
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// BYTE _mdsysctlr; // 1789 MIDI System Control Register
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// BYTE _mdsysstat; // 178A MIDI IRQ Status Register
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// BYTE _mdirqclr; // 178B MIDI IRQ Clear Register
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// BYTE _mdgroup1; // 1B88 MIDI Group #1 Register
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// BYTE _mdgroup2; // 1B89 MIDI Group #2 Register
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// BYTE _mdgroup3; // 1B8A MIDI Group #3 Register
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// BYTE _mdgroup4; // 1B8B MIDI Group #4 Register
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BYTE TypeOfSetup; // Polled DMA Input or Output
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BYTE SampleFilterSetting; // Index into Table to set B8A
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} PASREGISTERS;
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//
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// Save the MV101 registers at startup and restore on unload
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//
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typedef struct
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{
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BYTE SaveReg_B88;
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BYTE SaveReg_F8A;
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BYTE SaveReg_8388;
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BYTE SaveReg_8389;
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BYTE SaveReg_838A;
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BYTE SaveReg_BF8A;
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BYTE SaveReg_F388;
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BYTE SaveReg_F389;
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BYTE SaveReg_F38A;
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BYTE SaveReg_F788;
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BYTE SaveReg_F789; // NOT USED, Rev D doesn't allow readback
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BYTE fSavedFlag; // Set at save time
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} MV101REGISTERS;
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#define NUM_INPUTS 8
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#define NUM_OUTPUTS 2
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//
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// Cache the current state of the mixer variables
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//
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typedef struct {
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USHORT DestinationMask; // 0 - OUT_AMPLIFIER, 1 = OUT_PCM
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struct {
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USHORT Left; // Volume levels for inputs
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USHORT Right; // Volume levels for inputs
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UCHAR Output;
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} InputSettings[NUM_INPUTS];
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struct {
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USHORT Left; // Outputs levels
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USHORT Right;
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} OutputSettings[NUM_OUTPUTS];
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USHORT Treble;
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USHORT Bass;
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#ifdef LOUDNESS
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BOOLEAN Loudness;
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BOOLEAN StereoEnh;
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#endif // LOUDNESS
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BOOLEAN Mute;
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} PAS_MIXER_STATE;
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/************************************ END ***********************************/
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