260 lines
6.7 KiB
C
260 lines
6.7 KiB
C
//---------------------------------------------------------------------------------
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// BUILD Version: 0002 // Increment this if a change has global effects
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// "@(#) NEC hardware.h 1.1 95/03/22 21:23:28"
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//
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// Copyright (c) 1992-1993 NEC Corporation
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// Copyright (c) 1992-1993 Microsoft Corporation
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//
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// Module Name:
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//
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// hardware.h
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//
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// Abstract:
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// This include file defines constants and types for
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// the Microsoft sound system card.
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//
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// Revision History:
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//---------------------------------------------------------------------------------
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#include <necsnd.h>
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//
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// Don't support microphone mix
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//
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// #define MICMIX
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//
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// Low 6 bits of BOARD_CONFIG register
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//
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#define FH_PAL_PRODUCTREV_RQD 0x04 /* board revision required */
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//
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// CODEC version values
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//
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#define VER_AD1848J 0x09
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#define VER_AD1848K 0x0A
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#define VER_AD1845J 0X8A
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#define VER_CS4248 0x8A
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#define CS4231_MISC_MODE2 0x40 // MODE 2 select/detect
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#define AD1845_MISC_MODE2 0x40 // MODE 2 select/detect
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//
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// CODEC classifications
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//
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#define CODEC_J_CLASS 0x00 // AD1848J
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#define CODEC_K_CLASS 0x01 // AD1848K & CS4248
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#define CODEC_KPLUS_CLASS 0x02 // AD1845
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#define CODEC_JPLUS_CLASS 0x03 // AD1845
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//
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// Sound system registers
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//
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//#define BOARD_CONFIG (0x00)
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//#define BOARD_ID (0x03)
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#define CODEC_ADDRESS (0x00)
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#define CODEC_DATA (0x01)
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#define CODEC_STATUS (0x02)
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#define CODEC_DIRECT (0x03)
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// The following registers are selected by writing bits 0-3 of the
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// wave address register (CODEC_ADDRESS)
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// AD1848 and standard AD1845 registers
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#define REGISTER_LEFTINPUT (0x00)
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#define REGISTER_RIGHTINPUT (0x01)
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#define REGISTER_LEFTAUX1 (0x02)
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#define REGISTER_RIGHTAUX1 (0x03)
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#define REGISTER_LEFTAUX2 (0x04)
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#define REGISTER_RIGHTAUX2 (0x05)
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#define REGISTER_LEFTOUTPUT (0x06)
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#define REGISTER_RIGHTOUTPUT (0x07)
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#define REGISTER_DATAFORMAT (0x08)
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#define REGISTER_INTERFACE (0x09)
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#define REGISTER_DSP (0x0a)
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#define REGISTER_TEST (0x0b)
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#define REGISTER_MISC (0x0c)
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#define REGISTER_LOOPBACK (0x0d)
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#define REGISTER_UPPERBASE (0x0e)
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#define REGISTER_LOWERBASE (0x0f)
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//AD1845 Extended registers
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#define REGISTER_LEFTMIC (0x10)
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#define REGISTER_RIGHTMIC (0x11)
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#define REGISTER_LEFTLINE (0x12)
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#define REGISTER_RIGHTLINE (0x13)
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#define REGISTER_LOWER_TIMER (0x14)
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#define REGISTER_UPPER_TIMER (0x15)
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#define REGISTER_UPPER_FREQSEL (0x16)
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#define REGISTER_LOWER_FREQSEL (0x17)
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#define REGISTER_TIMER (0x18)
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#define REGISTER_REVID (0x19)
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#define REGISTER_MONO (0x1A)
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#define REGISTER_PWRDWN (0x1B)
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#define REGISTER_CAP_FORMAT (0x1C)
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#define REGISTER_CLOCK_SELECT (0x1D)
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#define REGISTER_CAP_UPPERBASE (0x1E)
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#define REGISTER_CAP_LOWERBASE (0x1F)
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#define NUMBER_OF_REGISTERS 32
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// The initial values for these registers
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// BUGFIX - no num yet - get rid of whining when start up
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#define SOUND_REGISTER_INIT { \
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0x00, 0x00, 0x8f, 0x8f, \
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0x8f, 0x8f, 0x3f, 0x3f, \
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0x4b, 0x00, 0x40, 0x00, \
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0x00, 0xfc, 0xff, 0xff }
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// High order bits of CODEC_ADDRESS register
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#define CODEC_IS_BUSY (0x80)
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#define LOW_POWER (0x40)
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#define HIGH_POWER (0x00)
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// ?
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#define AUTO_CAL (0x08)
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#define SYNTH_PORT 0x388
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#define NUMBER_OF_SYNTH_PORTS 4
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#define NUMBER_OF_SOUND_PORTS 8
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#define SOUND_DEF_DMACHANNEL 1 // DMA channel no
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#define SOUND_DEF_INT 19
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#define SOUND_DEF_PORT 0x80010000
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#define INTERRUPT_MODE LevelSensitive // Level sensitive
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//#define INTERRUPT_MODE Latched
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#define IRQ_SHARABLE TRUE // Gordon Griesbach says
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//#define IRQ_SHARABLE FALSE // the card drives the interrupt
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// 'continuously'
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/* supported formats */
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#define FORMAT_8BIT (0x00)
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#define FORMAT_MULAW (0x01)
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#define FORMAT_16BIT (0x02)
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#define FORMAT_ALAW (0x03)
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#define FORMAT_IMA_ADPCM (0x05)
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//
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// Sound system hardware and device-level variables
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//
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typedef struct {
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ULONG Key; // For debugging
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#define HARDWARE_KEY (*(ULONG *)"Hw ")
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PUCHAR PortBase; // base port address for sound
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PUCHAR CompaqBA; // Compaq Hw address or NULL
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ULONG WaitLoop; // Maximum number of microseconds to
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// wait
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USHORT ValidInterrupts; // Use card's 'snoop' ability
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BOOLEAN ValidSet; // Is ValidInterrupts initialized?
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//
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// Hardware data
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//
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KMUTEX CODECMutex; // Access to CODEC
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UCHAR Format; // Current wave format sent to device
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UCHAR bPower; // Power bit of CODEC_ADDRESS register
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UCHAR gbMuteFilter; // Mute filter
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UCHAR CODECClass; // Class of CODEC
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BOOLEAN Paused; // Set by HwPause
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BOOLEAN BadBoard; // Board is bad (timed out)
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BOOLEAN NoPCR; // Compaq machine with no config info
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} SOUND_HARDWARE, *PSOUND_HARDWARE;
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#define HwInterruptAcknowledge(Hw) OUTPORT((Hw), CODEC_STATUS, 0)
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#define TIMEDELAY 15 // 15 milliseconds
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//
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// Devices - these values are also used as array indices
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//
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typedef enum {
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WaveInDevice = 0,
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WaveOutDevice,
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#ifdef MIDI
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MidiOutDevice,
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#endif
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MixerDevice,
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LineInDevice,
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NumberOfDevices
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} SOUND_DEVICES;
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//
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// macros for doing port reads
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//
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#define INPORT(pHw, port) \
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READ_PORT_UCHAR((PUCHAR)(((pHw)->PortBase) + (port)))
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#define OUTPORT(pHw, port, data) \
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WRITE_PORT_UCHAR((PUCHAR)(((pHw)->PortBase) + (port)), (UCHAR)(data))
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//
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// Exported routines
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//
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BOOLEAN
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HwInitialize(
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PWAVE_INFO WaveInfo,
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PSOUND_HARDWARE pHw,
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ULONG DmaChannel,
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ULONG Interrupt,
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ULONG InputSource
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);
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BOOLEAN
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HwIsIoValid(
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PSOUND_HARDWARE pHw
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);
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BOOLEAN
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HwIsDMAValid(
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PSOUND_HARDWARE pHw,
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ULONG DmaChannel
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);
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BOOLEAN
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HwIsInterruptValid(
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PSOUND_HARDWARE pHw,
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ULONG Interrupt
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);
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VOID
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HwSetVolume(
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IN PLOCAL_DEVICE_INFO pLDI
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);
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ULONG
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HwNearestRate(
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ULONG samPerSec
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);
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VOID
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HwEnter(
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PSOUND_HARDWARE pHw
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);
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VOID
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HwLeave(
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PSOUND_HARDWARE pHw
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);
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WAVE_INTERFACE_ROUTINE HwSetWaveFormat;
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VOID
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CODECRegisterWrite(
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PSOUND_HARDWARE pHw,
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UCHAR RegisterNumber,
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UCHAR Value
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);
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UCHAR
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CODECRegisterRead(
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PSOUND_HARDWARE pHw,
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UCHAR RegisterNumber
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);
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