364 lines
11 KiB
C
364 lines
11 KiB
C
/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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oliesc1.h
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Abstract:
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This module contains the structures, specific to the Olivetti ESC-1
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and ESC-2 host bus adapter, used by the SCSI port driver. Data
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structures that are part of standard ANSI SCSI will be defined
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in a header file that will be available to all SCSI device drivers.
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Author:
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Bruno Sartirana (o-obruno) 13-Dec-1991
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Revision History:
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Bruno Sartirana (o-obruno) 8-Nov-1992
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Added error codes of the ESC-2 adapter.
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Increased the board reset timeout to 6 secs.
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--*/
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#include <scsi.h>
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//
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// Minimum define
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//
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#define MIN(x,y) ((x) > (y) ? (y) : (x))
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//
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// Maximun number of EISA slots in the system
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//
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#define MAX_EISA_SLOTS_STD 16 // # of EISA slots possible (per EISA std)
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#define MAX_EISA_SLOTS 8 // max # that Oli machines support
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//
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// Base of the EISA address space
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//
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#define EISA_ADDRESS_BASE 0x0C80
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//
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// Define constants for request completion in case of bus reset
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//
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#define ALL_TARGET_IDS -1
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#define ALL_LUNS -1
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//
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// Maximum number of scatter/gather descriptors (the ESC-1 has no limit)
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//
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#define MAXIMUM_SGL_DESCRIPTORS 20
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//
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// Maximum data transfer length
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//
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#define MAXIMUM_TRANSFER_SIZE 0xffffffff
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//
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// The ESC-1 SCSI ID is fixed to 7
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//
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#define ADAPTER_ID 7
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//
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// ESC-1 8-bit command codes (for CCB)
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//
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#define START_CCB 0x01
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#define SEND_CONF_INFO 0x02
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#define RESET_TARGET 0x04
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#define SET_CONFIGURATION 0x40
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#define GET_CONFIGURATION 0x41
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#define GET_FW_VERSION 0x42
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#define CHECK_DEVICE_PRESENT 0x43
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//
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// ESC-1 configuration registers
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//
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#define IRQL_REGISTER 0x2
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#define ATCFG_REGISTER 0X1
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//
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// First byte of the Command Control Block:
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//
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// Drive Number / Transfer Direction
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//
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// --------------------------------------
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// | XFER Dir | Target ID | LU Number |
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// --------------------------------------
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// 7 6 5 4 3 2 1 0
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//
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//
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// Subfield constants:
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#define CCB_DATA_XFER_ANY_DIR 0 // The adapter decides
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#define CCB_DATA_XFER_IN 0x40 // XFER Dir = 01
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#define CCB_DATA_XFER_OUT 0x80 // XFER Dir = 10
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#define CCB_DATA_XFER_NONE 0xC0 // XFER Dir = 11
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#define CCB_TARGET_ID_SHIFT 3
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//
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// Status Register: bit 15-8: adapter status, bits 7-0: target status
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//
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// Adapter status after a power cycle:
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#define DIAGNOSTICS_RUNNING 0x53
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#define DIAGNOSTICS_OK_CONFIG_RECEIVED 0x01
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#define DIAGNOSTICS_OK_NO_CONFIG_RECEIVED 0x02
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// Adapter status after a CCB command:
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#define NO_ERROR 0x00
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#define INVALID_COMMAND 0x01
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#define SELECTION_TIMEOUT_EXPIRED 0x11
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#define DATA_OVERRUN_UNDERRUN 0x12
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#define UNEXPECTED_BUS_FREE 0x13
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#define SCSI_PHASE_SEQUENCE_FAILURE 0x14
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#define COMMAND_ABORTED 0x15
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#define COMMAND_TO_BE_ABORTED_NOT_FOUND 0x16
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#define QUEUE_FULL 0x1F
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#define INVALID_CONFIGURATION_COMMAND 0x20
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#define INVALID_CONFIGURATION_REGISTER 0x21
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#define NO_REQUEST_SENSE_ISSUED 0x3B
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#define AUTO_REQUEST_SENSE_FAILURE 0x80
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#define PARITY_ERROR 0x81
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#define UNEXPECTED_PHASE_CHANGE 0x82
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#define BUS_RESET_BY_TARGET 0x83
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#define PARITY_ERROR_DURING_DATA_PHASE 0x84
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#define PROTOCOL_ERROR 0x85
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// Codes to identify logged errors related to H/W malfunction.
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// These codes must be shifted left by 8 bits, to distinguish them from
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// the adapter status after a CCB command.
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//
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// For use with ScsiPortLogError().
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#define ESC1_BAD_PHYSICAL_ADDRESS (0x01 << 16)
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#define ESCX_RESET_FAILED (0x06 << 16)
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#define ESCX_INIT_FAILED (0x07 << 16)
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//
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// Define various timeouts:
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//
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// RESET_REACTION_TIME number of microseconds the adapter takes to
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// change the status register on the reset command.
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//
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// ESC_RESET_DELAY number of microseconds the driver waits for after
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// a ESC-1 reset command. The minimum value for
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// this define is RESET_REACTION_TIME.
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//
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// ESC_RESET_LOOPS maximum number of attempts made by the driver to
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// get the diagnostics result from the status
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// register after a ESC-1 reset command.
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//
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// ESC_RESET_INTERVAL number of microseconds the driver waits for after
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// each read of the status register (on the reset
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// command).
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//
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// INTERRUPT_POLLING_TIME maximum time (in microseconds) spent by driver
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// polling the adapter's interrupt register on a
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// synchronous get configuration command.
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//
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// POST_RESET_DELAY number of microseconds the adpater needs (!) after
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// a successful reset in order to accept the first
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// command (this should not happen and needs to be
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// investigated).
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//
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//
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#define RESET_REACTION_TIME 80
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#define ESC_RESET_DELAY 100000 // 100 msec.
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#define ESC_RESET_LOOPS 140 // 14 sec.
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#define ESC_RESET_INTERVAL 100000 // 100 msec.
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#define INTERRUPT_POLLING_TIME 1000000
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#define POST_RESET_DELAY 50000
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//
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// If the reset is not completed before the next ESC1_RESET_NOTIFICATION usec.
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// unit, we call the "ScsiPortNotification(ResetDetected...)" routine.
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// After the call the ScsiPort stops the delivery of SRBs for a little bit
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// (~4 sec.). The value of this define is lower than 4 sec. because:
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// a) it's more implementation indipendent.
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// b) we want really really to make sure that the SRBs are held at the ScsiPort
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// level during the reset phase.
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//
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#define ESC1_RESET_NOTIFICATION 1000000 // 1 sec. (in usec).
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//
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// System/Local Interrupt Mask Register constants
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//
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#define INTERRUPTS_DISABLE 0x00
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#define INTERRUPTS_ENABLE 0x80
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//
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// SystemIntEnable register bit definition(s) (bellinte)
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//
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#define SYSTEM_INTS_ENABLE 0x01
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//
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// System/Local Interrupt register
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//
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// bit 3: Adpater reset w/out reconfiguration (Local Interrupt Register only)
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// bit 4: Adapter reset w/ reconfiguration (Local Interrupt Register only)
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// bit 7: Interrupt pending (read), reset (write)
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//
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#define ADAPTER_RESET 0x08
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#define INTERRUPT_PENDING 0x80
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#define INTERRUPT_RESET 0x80
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//
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// Semaphore constants
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//
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#define SEM_LOCK 1
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#define SEM_TAKEN 1
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#define SEM_TAKEN_MASK 0x03
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#define SEM_UNLOCK 0
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//
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// Global Configuration Register bits
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//
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// Bit 3: 1 = edge-triggered interrupts
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// 0 = level-triggered interrupts
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//
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#define EDGE_SENSITIVE 8
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//
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// Command Control Block length (includes only the fields meaningful to the
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// ESC-1, SCSI Command Descriptor Block excluded)
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//
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#define CCB_FIXED_LENGTH 18
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//
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// ESC-1 registers model
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//
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typedef struct _EISA_CONTROLLER {
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UCHAR BoardId[4]; // xC80
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UCHAR Unused[4];
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UCHAR GlobalConfiguration; // xC88 - Indicates level- or edge-triggered
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// interrupts
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UCHAR SystemIntEnable; // xC89 - system int enab/ctrl reg (bellinte)
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UCHAR CommandSemaphore; // xC8A - Semaphore port 0 for the Incoming
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// Mailbox Registers
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UCHAR ResultSemaphore; // xC8B - Semaphore port 1 for the Outgoing
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// Mailbox Registers
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UCHAR LocalDoorBellMask; // xC8C - Interrupt mask register for the
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// Local Doorbell register
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UCHAR LocalDoorBell; // xC8D - Local Doorbell register
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UCHAR SystemDoorBellMask; // xC8E - Interrupt mask register for the
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// System Doorbel register
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UCHAR SystemDoorBell; // xC8F - System Doorbell register
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UCHAR InTaskId; // xC90 - 8-bit Incoming Mailbox Register
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UCHAR Command; // xC91 - 8-bit Incoming Mailbox Register
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USHORT CommandLength; // xC92 - 16-bit Incoming Mailbox Register
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ULONG InAddress; // xC94 - 32-bit Incoming Mailbox Register
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UCHAR OutTaskId; // xC98 - 8-bit Outgoing Mailbox register
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UCHAR Reserved; // xC99
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USHORT Status; // xC9A - 16-bit Outgoing Mailbox register
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ULONG OutAddress; // xC9C - 32-bit Outgoing Mailbox register
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// Other use: XC9C: Target ID
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// XC9D: Device Present/
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// not Present
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} EISA_CONTROLLER, *PEISA_CONTROLLER;
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//
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// Scatter Gather descriptor
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//
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typedef struct _SG_DESCRIPTOR {
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ULONG Length;
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ULONG Address;
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} SG_DESCRIPTOR, *PSG_DESCRIPTOR;
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//
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// Scatter Gather descriptor list (SGL)
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//
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typedef struct _SGL {
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SG_DESCRIPTOR Descriptor[MAXIMUM_SGL_DESCRIPTORS];
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} SGL, *PSGL;
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//
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// ESC-1 Command Control Block (byte-aligned)
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//
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#pragma pack(1)
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typedef struct _CCB {
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//
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// This first portion is the structure expected by the ESC-1.
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// Its size is CCB_FIXED_LENGTH and does NOT include the variable
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// length field Cdb (which can be 6, 10 or 12 bytes long).
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//
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UCHAR TaskId; // CCB byte 0 (bits 7-6: xfer dir;
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// bits 5-3: target ID;
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// bits 2-0: LUN)
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UCHAR CdbLength; // CCB byte 1 SCSI Command Descriptor
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// Block length
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ULONG DataLength; // CCB bytes 2-5 Total data transfer
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// length
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ULONG DataAddress; // CCB bytes 6-9 Data segment address
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ULONG AdditionalRequestBlockLength; // CCB bytes 10-13 Length of the
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// scatter/gather list
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ULONG LinkedCommandAddress; // CCB bytes 14-17 Not used
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UCHAR Cdb[12]; // CCB bytes 18-29 SCSI Command
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// Descriptor Block
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//
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// The following portion is for the miniport driver use only
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//
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PVOID SrbAddress; // Address of the related SRB
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SGL Sgl; // Scatter/gather data segment list
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} CCB, *PCCB;
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#pragma pack()
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//
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// This structure is allocated on a per logical unit basis. It is necessary
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// for the Abort request handling.
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//
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typedef struct _LU_EXTENSION {
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SHORT NumberOfPendingRequests; // Number of SRBs for a logical unit
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// not completed yet
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} LU_EXTENSION, *PLU_EXTENSION;
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//
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// Device extension
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//
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typedef struct _HW_DEVICE_EXTENSION {
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PEISA_CONTROLLER EisaController;
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ULONG ResetInProgress; // >0 if reset is in progress.
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ULONG ResetTimerCalls; // # of timer calls before time-out.
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ULONG ResetNotification; // Reset notification trigger.
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} HW_DEVICE_EXTENSION, *PHW_DEVICE_EXTENSION;
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