219 lines
5.0 KiB
C
219 lines
5.0 KiB
C
/*++
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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wd7000.h
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Abstract:
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This is the header file in support of the Western Digital
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WD7000EX EISA SCSI adapter driver.
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Author:
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mglass
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Notes:
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The adapter supports up to 32 scatter gather descriptors.
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But the system is tuned for up to 17 pages and allocating 32
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descriptors out of noncached pool is expensive so the maximum
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is set to 17.
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Revision History:
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--*/
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#include <scsi.h>
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#define MAXIMUM_EISA_SLOTS 0x08
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#define MAXIMUM_TRANSFER_SIZE 0xFFFFFFFF
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#define MAXIMUM_SDL_SIZE 0x11
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#define REQUEST_SENSE_BUFFER_SIZE 0x18
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#define EISA_SLOT_SHIFT 0x0C
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#define EISA_ADDRESS_BASE 0x0C80
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//
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// Scatter Gather descriptor list (SDL)
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//
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typedef struct _SG_DESCRIPTOR {
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ULONG Address;
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ULONG Length;
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} SG_DESCRIPTOR, *PSG_DESCRIPTOR;
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typedef struct _SDL {
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SG_DESCRIPTOR Descriptor[MAXIMUM_SDL_SIZE];
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} SDL, *PSDL;
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//
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// Command Control Block (CCB)
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//
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typedef struct _CCB {
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USHORT CommandFlags;
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UCHAR CompletionStatus;
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UCHAR ScsiDeviceStatus;
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ULONG DataBufferAddress;
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ULONG TransferCount;
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ULONG LinkCommand;
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ULONG RequestSenseAddress;
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USHORT RequestSenseLength;
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UCHAR Cdb[12];
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UCHAR TargetId;
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UCHAR Lun;
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UCHAR Reserved[4];
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PVOID SrbAddress;
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PVOID AbortSrb;
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SDL Sdl;
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UCHAR RequestSenseBuffer[REQUEST_SENSE_BUFFER_SIZE];
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} CCB, *PCCB;
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//
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// Command Flag bit definitions
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//
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#define RETURN_CCB_STATUS 0x0080
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#define DIRECTION_WRITE 0x0000 + 0x0040
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#define DIRECTION_READ 0x0020 + 0x0040
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#define SCATTER_GATHER 0x0010
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#define AUTO_REQUEST_SENSE 0x0008
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#define DISCONNECTION 0x0004
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#define SYNCHRONOUS_NEGOCIATION 0x0002
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#define SUPPRESS_SHORT_RECORD_EXCEPTION 0x0001
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#define CHAINED_COMMAND 0x8000
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//
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// Internal Control Block (ICB)
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//
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typedef struct _ICB {
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USHORT IcbFlags;
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UCHAR CompletionStatus;
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UCHAR Reserved;
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ULONG DataBufferAddress;
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ULONG TransferCount;
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UCHAR OpCode;
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UCHAR IcbCommand[15];
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} ICB, *PICB;
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//
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// ICB Operation code definitions
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//
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#define ADAPTER_INQUIRY_COMMAND 0x00
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//
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// Adapter Inquiry buffer
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//
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typedef struct _ADAPTER_INQUIRY {
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USHORT HardwareRevisionLevel;
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USHORT FirmwareRevisionLevel;
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ULONG BiosBaseAddress;
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UCHAR BusPreemptTime;
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UCHAR Irq;
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UCHAR AdapterInformation;
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UCHAR ChannelInformation;
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UCHAR ReservedBytes[8];
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UCHAR VendorId[8];
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UCHAR ProductId[8];
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} ADAPTER_INQUIRY, *PADAPTER_INQUIRY;
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//
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// Bus ID masks
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//
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#define BUS_ID_MASK 0x07
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#define DUAL_CHANNEL 0x02
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//
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// EISA Controller registers
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//
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typedef struct _EISA_CONTROLLER {
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UCHAR BoardId[4]; // zC80
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UCHAR Undefined1; // zC84
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UCHAR AutoConfiguration[3]; // zC85
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UCHAR Undefined2; // zC88
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UCHAR SystemInterruptEnable; // zC89
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UCHAR Undefined3[3]; // zC8A
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UCHAR CommandRegister; // zC8D
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UCHAR ResponseInterruptMask; // zC8E
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UCHAR ResponseRegister; // zC8F
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ULONG CommandMailbox; // zC90
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ULONG ResponseMailbox; // zC94
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UCHAR Undefined4[26]; // zC98
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UCHAR ControlRegister; // zCB2
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} EISA_CONTROLLER, *PEISA_CONTROLLER;
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//
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// Command definitions
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//
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#define ILLEGAL_OPCODE 0x00
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#define PROCESS_CCB 0x01
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#define PROCESS_ICB 0x02
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#define RESET_DEVICE 0x03
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#define ABORT_CCB 0x04
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#define RESET_ACKNOWLEDGE 0x05
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//
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// Response Status
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//
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#define ILLEGAL_STATUS 0x00
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#define COMPLETE_SUCCESS 0x01
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#define COMPLETE_ERROR 0x02
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#define DEVICE_TIMEOUT 0x03
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#define BUS_RESET 0x04
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#define SHORT_RECORD_EXCEPTION 0x05
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#define LONG_RECORD_EXCEPTION 0x06
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#define PARITY_ERROR 0x07
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#define UNEXPECTED_BUS_FREE 0x08
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#define INVALID_STATE 0x09
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#define REQUEST_SENSE_COMPLETE 0x0A
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#define HOST_DMA_ERROR 0x0B
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#define INVALID_COMMAND 0x0C
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#define COMMAND_ABORTED 0x0D
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#define RESET_DEVICE_COMPLETE 0x0E
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#define ABORT_COMMAND_COMPLETE 0x0F
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#define ABORT_CCB_NOT_FOUND 0x10
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#define INCORRECT_COMMAND_DIRECTION 0x11
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//
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// System Interrupt Enable bits
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//
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#define SYSTEM_INTERRUPTS_DISABLE 0x00
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#define SYSTEM_INTERRUPTS_ENABLE 0x01
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#define SYSTEM_INTERRUPT_PENDING 0x02
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//
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// Control Register bit definitions
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//
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#define ADAPTER_RESET 0x01
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#define SCSI_BUS_RESET_CHANNEL_0 0x02
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#define ADAPTER_INTERRUPT_ENABLE 0x08
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#define SCSI_BUS_RESET_CHANNEL_1 0x10
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#define STATUS_MASK 0x3F
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//
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// Send ICB or CCB macro
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//
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#define SEND_COMMAND(Opcode, Address, Registers) { \
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while (ScsiPortReadPortUchar(Registers->CommandRegister)); \
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ScsiPortWritePortUlong(Registers->CommandMailbox, Address); \
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ScsiPortWritePortUchar(Registers->CommandRegister, Opcode); \
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}
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