257 lines
7.1 KiB
C
257 lines
7.1 KiB
C
/*++
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Copyright (c) 1992, 1993, 1994 Corollary Inc.
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Module Name:
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cbusapic.h
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Abstract:
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Cbus APIC architecture definitions for the Corollary Cbus1
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and Cbus2 multiprocessor HAL modules.
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Author:
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Landy Wang (landy@corollary.com) 05-Oct-1992
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#ifndef _CBUSAPIC_
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#define _CBUSAPIC_
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//
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//
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// THE APIC HARDWARE ARCHITECTURE DEFINITIONS
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//
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//
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#define LOCAL_APIC_ENABLE 0x100 // all APIC intrs now enabled
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#define APIC_INTR_UNMASKED 0x0 // this interrupt now enabled
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#define APIC_INTR_MASKED 0x1 // this interrupt now disabled
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#define APIC_INTR_FIXED 0x0 // this interrupt is tied to a CPU
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#define APIC_INTR_LIG 0x1 // this interrupt is lowest-in-group
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#define APIC_INTR_NMI 0x4 // this interrupt is an NMI
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#define APIC_EDGE 0x0 // this interrupt is edge-triggered
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#define APIC_LEVEL 0x1 // this interrupt is level-triggered
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#define APIC_LOGICAL_MODE 0x1 // only logical mode is being used
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#define APIC_ALL_PROCESSORS (ULONG)-1 // Destination format reg default
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//
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// left shift needed to convert processor_bit to Intel APIC ID.
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// this applies to the:
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//
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// I/O unit ID register
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// I/O unit ID redirection entry destination registers
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// local unit ID register
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// local unit logical destination register
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//
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#define APIC_BIT_TO_ID 24 // also in cbusapic.asm
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//
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// both LOCAL and I/O APICs must be on page-aligned boundaries
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// for the current HalpMapPhysicalMemory() calls to work.
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//
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//
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// The physical address of the local and I/O APICs are architecture
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// dependent, and therefore reside in cbus1.h & cbus2.h. The size
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// of the APIC is not architecture dependent, and thus is declared here.
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//
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#define LOCAL_APIC_SIZE 0x400
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#define IO_APIC_SIZE 0x11
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//
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// I/O APIC registers. note only register select & window register are
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// directly accessible in the address space. other I/O registers are
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// reached via these two registers, similar to the CMOS access method.
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//
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#define IO_APIC_REGSEL 0x00
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#define IO_APIC_WINREG 0x10
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#define IO_APIC_ID_OFFSET 0x00
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#define IO_APIC_VERSION 0x01
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#define IO_APIC_REDIRLO 0x10
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#define IO_APIC_REDIRHI 0x11
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//
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// Each I/O APIC has one redirection entry for each interrupt it handles.
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// note that since it is not directly accessible (instead the window register
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// must be used), consecutive entries are byte aligned, not 16 byte aligned.
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//
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typedef union _redirection_t {
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struct {
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ULONG Vector : 8;
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ULONG Delivery_mode : 3;
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ULONG Dest_mode : 1;
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ULONG Delivery_status : 1; // read-only
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ULONG Reserved0 : 1;
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ULONG Remote_irr : 1;
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ULONG Trigger : 1;
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ULONG Mask : 1;
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ULONG Reserved1 : 15;
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ULONG Destination;
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} ra;
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struct {
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ULONG dword1;
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ULONG dword2;
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} rb;
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} REDIRECTION_T;
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//
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// The Interrupt Command register format is used for IPIs, and is
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// here purely for reference. It is actually only used by cbusapic.asm,
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// which has its internal (identical) conception of this register.
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// No C code references this structure.
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//
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typedef struct _intrcommand_t {
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ULONG vector : 8;
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ULONG delivery_mode : 3;
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ULONG dest_mode : 1;
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ULONG delivery_status : 1; // read-only
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ULONG reserved0 : 1;
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ULONG level : 1;
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ULONG trigger : 1;
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ULONG remote_read_status : 2;
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ULONG destination_shorthand : 2;
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ULONG reserved1 : 12;
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ULONG pad[3];
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ULONG destination;
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} INTRCOMMAND_T, *PINTRCOMMAND;
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typedef struct _apic_registers_t {
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UCHAR fill0[0x20];
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ULONG LocalUnitID; // 0x20
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UCHAR fill1[0x80 - 0x20 - sizeof(ULONG)];
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TASKPRI_T ApicTaskPriority; // 0x80
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UCHAR fill2[0xB0 - 0x80 - sizeof(TASKPRI_T)];
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ULONG ApicEOI; // 0xB0
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UCHAR fill3[0xD0 - 0xB0 - sizeof(ULONG)];
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ULONG ApicLogicalDestination; // 0xD0
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UCHAR fill4[0xE0 - 0xD0 - sizeof(ULONG)];
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ULONG ApicDestinationFormat; // 0xE0
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UCHAR fill5[0xF0 - 0xE0 - sizeof(ULONG)];
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ULONG ApicSpuriousVector; // 0xF0
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UCHAR fill6[0x300 - 0xF0 - sizeof(ULONG)];
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INTRCOMMAND_T ApicICR; // 0x300
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UCHAR fill7[0x360 - 0x300 - sizeof(INTRCOMMAND_T)];
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REDIRECTION_T ApicLocalInt1; // 0x360
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UCHAR fill8[0x4D0 - 0x360 - sizeof(REDIRECTION_T)];
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//
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// Note that APMode is also the PolarityPortLow register
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//
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UCHAR APMode; // 0x4D0
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UCHAR PolarityPortHigh; // 0x4D1
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} APIC_REGISTERS_T, *PAPIC_REGISTERS;
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#define LOWEST_APIC_PRI 0x00
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#define LOWEST_APIC_DEVICE_PRI 0x40
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#define HIGHEST_APIC_PRI 0xF0
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//
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//
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// PURE SOFTWARE DEFINITIONS HERE
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//
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//
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//
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// this structure is used for communications between processors
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// when modifying the I/O APIC.
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//
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typedef struct _redirport_t {
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ULONG Status;
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ULONG ApicID;
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ULONG BusNumber;
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ULONG RedirectionAddress;
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ULONG RedirectionCommand;
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ULONG RedirectionDestination;
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} REDIR_PORT_T, *PREDIR_PORT_T;
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#define REDIR_ACTIVE_REQUEST 0x01
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#define REDIR_ENABLE_REQUEST 0x02
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#define REDIR_DISABLE_REQUEST 0x04
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#define REDIR_LASTDETACH_REQUEST 0x08
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#define REDIR_FIRSTATTACH_REQUEST 0x10
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//
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// declare APIC-related external functions
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//
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VOID
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CbusInitializeLocalApic(
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IN ULONG Processor,
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IN PVOID PhysicalApicLocation,
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IN ULONG SpuriousVector
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);
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VOID
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CbusInitializeIOApic(
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IN ULONG Processor,
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IN PVOID PhysicalApicLocation,
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IN ULONG RedirVector,
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IN ULONG RebootVector,
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IN ULONG IrqPolarity
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);
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VOID
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CbusEnableApicInterrupt(
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IN ULONG ApicBusNumber,
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IN ULONG Vector,
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IN PVOID HardwarePtr,
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IN ULONG FirstAttach,
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IN BOOLEAN LowestInGroup,
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IN BOOLEAN LevelTriggered
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);
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VOID
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CbusDisableApicInterrupt(
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IN ULONG ApicBusNumber,
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IN ULONG Vector,
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IN PVOID HardwarePtr,
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IN ULONG LastDetach
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);
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PVOID
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CbusApicLinkVector(
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IN PBUS_HANDLER Bus,
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IN ULONG Vector,
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IN ULONG Irqline
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);
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VOID
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CbusApicBrandIOUnitID(
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IN ULONG Processor
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);
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//
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// end of APIC-related external function declarations
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//
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#endif // _CBUSAPIC_
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