233 lines
8.5 KiB
C
233 lines
8.5 KiB
C
/*
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* Copyright (c) 1995 FirePower Systems, Inc.
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* DO NOT DISTRIBUTE without permission
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*
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* $RCSfile: fpi2csup.h $
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* $Revision: 1.6 $
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* $Date: 1996/02/19 23:54:29 $
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* $Locker: $
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*/
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#ifndef FPI2CSUP_H
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#define FPI2CSUP_H
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// C4103 : "used #pragma pack to change alignment"
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//#pragma warning(disable:4103) // disable C4103 warning
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//#pragma pack(1)
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/* This is an implementation according to 1.5 specification */
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/*
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*
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* Each data structure has in common a STRUCT_HEADER which holds clues
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* about the 'DataType' of the structure and it's 'OffSet'. The data
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* type tells software what data is in the structure hence how to
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* interpret the data. The OffSet indicates how far to the next
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* data structure, or, if the value is 0, whether there is another data
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* structure. return to index
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*
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*/
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#define EMPTY_DATA 0x00000000 // indicates there is no data.
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#define SYS_DATA 0x00000001 // general system registers
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#define CPU_DATA 0x00000002 // processor
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#define CACHE_DATA 0x00000004 // cache control
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#define DRAM_DATA 0x00000008 // memory control
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#define SRAM_DATA 0x00000010 // memory control
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#define VRAM_DATA 0x00000020 // memory control
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#define EDORAM_DATA 0x00000040 // memory control
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#define INT_DATA 0x00000080 // int control, not initialization.
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#define BUS_DATA 0x00000400 // I O control, mainly configuration and
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// initialization.
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#define DMA_DATA 0x00000100
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#define DISPLAY_DATA 0x00000200
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// mogawa
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#define BOARD_DATA 0x40000000
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#define META_DATA 0x80000000
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#define STRUCT_HEADER \
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ULONG DataType; UCHAR OffSet
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// The type of data contained in the structure
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// The Offset to the next data structure, relative
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// the beginning of this structure. Typically, it's
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// value is set as the length of the structure, but
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// is set to zero if no more structures exist.
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/*
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*
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*
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* Meta data effectively describes the structure of the IIC rom data.
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* The size of the total rom is given, along with pointers to the beginning of
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* the other data areas. Finally, there is a major/minor version numbering
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* system to provide some means of evaluating what data the rom contains.
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* return to index
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*
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*/
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#define CURRENT_META_REV 0x0103 // this is in the form of: USHORT 0x0101
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#define CURRENT_SIGNATURE 0x31415926 // numbers of PI: e is (27182818) next
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typedef struct _Meta_ {
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STRUCT_HEADER;
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ULONG Signature;
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USHORT ChkSum; // a sum of byte pairs (USHORT) in little endian
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// order.
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USHORT Revision;
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UCHAR Size; // in bytes, the size of the entire rom.
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} META;
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/*
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*
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* Manufacturing's part number is built out of four pieces: a two letter
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* description of the item ( BA for board assembly ), a five digit part
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* designator, a two digit board version, and a two letter board turn
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* identifier ( as in AA, AB, AC, AD ... ).
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*
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* E.G. BA-007393-01-AD is an LX series Board Assembly (BA) whose board
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* variation is 01, and board revision is "AD."
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*
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*/
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#define BOARD_REV_MASK 0x000000ff // the manufacturing number's rev bits
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#define BOARD_PART_MSK 0xffffff00 // the 6 digits used as the part number
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// ( 4 digits actually )
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/*
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*
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*
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* The general board data contains data fields common to all boards. A version
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* to correlate this structure with the meta data structure, along with
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* the type of board, cpu or mlu, the board system, lx or tx, the board family
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* as in PREP, CHRP or something else, return to index
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*
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*/
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typedef struct _Board_ {
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STRUCT_HEADER;
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UCHAR PartType[2]; // Currently a two ascii value 'B''A' that stands
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// for Board Assembly.
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UCHAR PartRev[2]; // Colloquially the Board Rev. E.G. Mx has this as
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// 'A''D' for the Rev AD board.
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ULONG BoardNumber; // Board ID consists of two parts: Rev fields
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// which are the least two significant nibbles,
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// and Part Number field which is the 6 most
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// nificant nibbles. The digits are stored
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// in "BCD" format as in one decimal digit per
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// nibble, in little endian order.
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USHORT Version; // major/minor versioning value of this board.
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UCHAR SerialNumber[8]; // board serial number. Format TBD....
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} BOARD;
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/*
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* :
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* System data structure: Mainly a catch all for data needed but not readily
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* associated with any one hardware function. for instance, we use it here to
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* say whether the system is TX, LX, MX or whatever. return * to index
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*
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*/
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#define DEV_SYS 0x0000
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#define LX_SYSTEM 0x0001
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#define MX_SYSTEM 0x0002
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#define TX_SYSTEM 0x0003
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#define TX_PROTO 0x0004
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typedef struct _SYSTEM_ {
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STRUCT_HEADER;
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USHORT type; // what kind of system is this: This is a value field
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// rather than a bit map....
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} SYSTEM;
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/*
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* For the board specific information, there is a specific structure. This
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* allows for varying data requirements of different boards such as a changing
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* sense of where some registers may sit.
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*
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*/
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typedef struct _Processor_ {
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STRUCT_HEADER;
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UCHAR Total; // total number of cpus on this board.
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UCHAR BusFrequency; // frequency of the bus serving the cpu(s)
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UCHAR TenXFactor; // 10 times the bus frequency multiplier for the cpu.
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// This allows fractional multipliers as in 3/2
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// (becomes 15) or 5/2 ( becomes 25 ).
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} PROCESSOR;
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#define LOOKASIDE_L2 0x00000001 // this cache is a look aside cache
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#define INLINE_L2 0x00000002 // this cache is an inline cache
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#define PIPELINED_L2 0x00010000 // pipelined cache
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typedef struct _Cache_ {
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STRUCT_HEADER;
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UCHAR MaxSets; // Maximum number of "sets" available for this cache.
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// direct mapped, then there is only 1.
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UCHAR Bytes2Line; // line size in bytes: i.e. number of bytes per set.
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USHORT Lines2Set; // number of lines per set.
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UCHAR SramBanks; // # of memory banks: indicates both cache
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// size and max set associativity.
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ULONG Performance; // 3-1-1-1, 2-1-1-1 or some other cycle latency.
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// the data is stored in BCD format.
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ULONG MaxSize; // size of cache in bytes.
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ULONG Properties; // properties of the cache's behavior: pipelined
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// or not, lookaside or not...
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} CACHE;
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typedef struct _Memory_Device_ {
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STRUCT_HEADER;
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ULONG BaseAddress; // the base physical address for this memory.
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USHORT MaxBankSize; // Maximum size of banks in Megabytes
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UCHAR MaxNumBanks; // Maximum number of memory banks on this board;
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} MEMORY;
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/*
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*
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*
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* Describe any busses on the system. Current plans account only
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* for the pci bus but will expand to allow for complete bus typing.
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* return to index
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*
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*/
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typedef struct _BUS_ {
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STRUCT_HEADER;
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UCHAR NumIoBus; // number of io busses on main logic board.
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ULONG ConfigAddr; // the location of the config space. Zero
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// means there is no config space. This value
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// points to the first device's address, and is
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// assumed to be device 0.
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} BUS;
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/*
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*
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* The INT structure describes some set of interrupts on the system that
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* software needs knowledge of. In this case software needs to know what
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* pci config addresses map to what interrupts.
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* In a later implementation, this should fully describe the system's
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* interrupt space. return to index
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*
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*/
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struct PAIRS {
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UCHAR Int;
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UCHAR SlotNumber;
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};
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typedef struct _INTS_ {
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STRUCT_HEADER;
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UCHAR Total; // how many interrupts are we talking about here?
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struct PAIRS Pairs[0]; // pairs of numbers in the form: int, slot number:
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// for ints on config addresses on a secondary
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// bus, the slot number will be greater than 10
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// where the more significant nibble describes
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// bus number as seen from a low to high descending
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// bus probe.
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} INTS;
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//#pragma warning(enable:4103) // disable C4103 warning
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//#pragma pack
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#endif // FPI2CSUP_H
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