168 lines
7.2 KiB
C
168 lines
7.2 KiB
C
/*++
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Copyright (c) 1995 DeskStation Technology
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Module Name:
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apoc.h
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Abstract:
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This file contains definitions specific to the Apocalypse (ALPHA EV5)
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and Rogue (ALPHA EV4) processor modules.
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Author:
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Michael D. Kinney 1-May-1995
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Environment:
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Kernel mode
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Revision History:
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--*/
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#define DTI_QVA_ENABLE (0x80000000) // Identify VA as a QVA
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#define DTI_QVA_SELECTORS (0xc0000000) // QVA identification mask
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#define IO_BIT_SHIFT 0x05 // Bits to shift QVA
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#define IO_BYTE_OFFSET 0x20 // Offset to next byte
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#define IO_SHORT_OFFSET 0x40 // Offset to next short
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#define IO_LONG_OFFSET 0x80 // Offset to next long
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#define IO_BYTE_LEN 0x00 // Byte length
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#define IO_WORD_LEN 0x08 // Word length
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#define IO_TRIBYTE_LEN 0x10 // TriByte length
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#define IO_LONG_LEN 0x18 // Longword length
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//
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// Constant used by dense space I/O routines
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//
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#define APOC1_PCI_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffcfb00000000)
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#define APOC2_PCI_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffcfe00000000)
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#define ROGUE_PCI_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffc0100000000)
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//
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// Noncached Dense Memory address spaces.
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//
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#define APOC1_NONCACHED_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffcfb00000000)
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#define APOC2_NONCACHED_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffcfb00000000)
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#define ROGUE_NONCACHED_DENSE_BASE_PHYSICAL_SUPERPAGE ((ULONGLONG)0xfffffc0100000000)
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//
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// QVA
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// HAL_MAKE_QVA(
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// ULONGLONG PhysicalAddress
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// )
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//
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// Routine Description:
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//
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// This macro returns the Qva for a physical address in system space.
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//
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// Arguments:
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//
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// PhysicalAddress - Supplies a 64-bit physical address.
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//
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// Return Value:
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//
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// The Qva associated with the physical address.
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//
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#define HAL_MAKE_QVA(PA) \
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( (PVOID)( DTI_QVA_ENABLE | (ULONG)((PA) >> IO_BIT_SHIFT) & ~(DTI_QVA_SELECTORS) ) )
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//
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// Define physical address spaces for Apocalypse
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//
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#define TREB1_APOC1_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB1_APOC1_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB1_APOC1_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB1_APOC1_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB1_APOC1_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB1_APOC1_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB1_APOC1_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0800000000)
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#define TREB1_APOC2_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB1_APOC2_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB1_APOC2_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB1_APOC2_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB1_APOC2_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB1_APOC2_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB1_APOC2_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0800000000)
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#define TREB2_APOC1_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB2_APOC1_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB2_APOC1_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB2_APOC1_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB2_APOC1_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB2_APOC1_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB2_APOC1_PCI1_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB2_APOC1_PCI1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB2_APOC1_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0800000000)
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#define TREB2_APOC2_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB2_APOC2_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB2_APOC2_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB2_APOC2_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB2_APOC2_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0d00000000)
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#define TREB2_APOC2_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0900000000)
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#define TREB2_APOC2_PCI1_IO_BASE_PHYSICAL ((ULONGLONG)0x0c00000000)
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#define TREB2_APOC2_PCI1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB2_APOC2_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0800000000)
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#define APOC1_PCI_CONFIG_BASE_PHYSICAL ((ULONGLONG)0xfffffcfe00000000)
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#define APOC1_PCI_CONFIG0_BASE_PHYSICAL ((ULONGLONG)0xfffffcfe00000000)
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#define APOC1_PCI_CONFIG1_BASE_PHYSICAL ((ULONGLONG)0xfffffcff00000000)
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#define APOC1_PCI_DENSE_BASE_PHYSICAL ((ULONGLONG)0x0b00000000)
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#define APOC2_PCI_CONFIG_BASE_PHYSICAL ((ULONGLONG)0xfffffcb800000000)
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#define APOC2_PCI_CONFIG0_BASE_PHYSICAL ((ULONGLONG)0xfffffcb800000000)
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#define APOC2_PCI_CONFIG1_BASE_PHYSICAL ((ULONGLONG)0xfffffcd800000000)
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#define APOC2_PCI_DENSE_BASE_PHYSICAL ((ULONGLONG)0x0e00000000)
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#define APOC2_TRANSLATED_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0f00000000)
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#define APOC_DMA_CACHE_BASE_PHYSICAL ((ULONGLONG)0x0b007c0000)
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#define APOC_CACHE_FLUSH_BASE_PHYSICAL ((ULONGLONG)0x003fe00000)
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#define APOC_DMA_CACHE_SIZE 0x00040000
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#define APOC_CACHE_FLUSH_SIZE 0x00200000
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//
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// Define physical address spaces for Rogue
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//
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#define ROGUE_TRANSLATED_BASE_PHYSICAL ((ULONGLONG)0x0a00000000)
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#define TREB1_ROGUE_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0000000000)
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#define TREB1_ROGUE_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0040000000)
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#define TREB1_ROGUE_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0080000000)
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#define TREB1_ROGUE_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x00c0000000)
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#define TREB1_ROGUE_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0080000000)
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#define TREB1_ROGUE_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x00c0000000)
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#define TREB1_ROGUE_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0100000000)
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#define TREB2_ROGUE_ISA_IO_BASE_PHYSICAL ((ULONGLONG)0x0080000000)
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#define TREB2_ROGUE_ISA_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x00c0000000)
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#define TREB2_ROGUE_ISA1_IO_BASE_PHYSICAL ((ULONGLONG)0x0000000000)
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#define TREB2_ROGUE_ISA1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0040000000)
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#define TREB2_ROGUE_PCI_IO_BASE_PHYSICAL ((ULONGLONG)0x0080000000)
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#define TREB2_ROGUE_PCI_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x00c0000000)
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#define TREB2_ROGUE_PCI1_IO_BASE_PHYSICAL ((ULONGLONG)0x0000000000)
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#define TREB2_ROGUE_PCI1_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0040000000)
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#define TREB2_ROGUE_PCI_HIGH_MEMORY_BASE_PHYSICAL ((ULONGLONG)0x0100000000)
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#define ROGUE_PCI_CONFIG0_BASE_PHYSICAL ((ULONGLONG)0x0200000000)
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#define ROGUE_PCI_CONFIG1_BASE_PHYSICAL ((ULONGLONG)0x03c0000000)
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#define ROGUE_PCI_DENSE_BASE_PHYSICAL ((ULONGLONG)0x0100000000)
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#define ROGUE_DMA_CACHE_BASE_PHYSICAL ((ULONGLONG)0x01007c0000)
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#define ROGUE_CACHE_FLUSH_BASE_PHYSICAL ((ULONGLONG)0x003fc00000)
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#define ROGUE_DMA_CACHE_SIZE 0x00040000
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#define ROGUE_CACHE_FLUSH_SIZE 0x00400000
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