139 lines
3.0 KiB
C
139 lines
3.0 KiB
C
/*++ BUILD Version: 0000 Increment this if a change has global effects
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Copyright (C) 1994,1995 Microsoft Corporation
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Copyright (C) 1994,1995 Digital Equipment Corporation
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Module Name:
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pcip.h
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Abstract:
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This header file defines the private PCI bus HAL interfaces and
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data types.
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--*/
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//
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// Hal specific PCI bus structures
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//
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#define PCI_CONFIG_TYPE(PciData) ((PciData)->HeaderType & ~PCI_MULTIFUNCTION)
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#define PCI_MAX_BUSSES 256
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#define PciBitIndex(Dev,Fnc) (Fnc*32 + Dev)
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//
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// Define PCI configuration cycle types.
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//
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typedef enum _PCI_CONFIGURATION_TYPES {
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PciConfigTypeInvalid = -1,
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PciConfigType0 = 0,
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PciConfigType1 = 1
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} PCI_CONFIGURATION_TYPES, *PPCI_CONFIGURATION_TYPES;
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typedef struct _PCI_CFG_CYCLE_BITS {
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union {
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struct {
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ULONG Reserved1:2;
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ULONG Reserved2:30;
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} bits; // Generic Config Cycle
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struct {
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ULONG Reserved1:2;
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ULONG RegisterNumber:6;
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ULONG FunctionNumber:3;
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ULONG Idsel:21;
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} bits0; // Type0 Config Cycle
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struct {
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ULONG Reserved1:2;
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ULONG RegisterNumber:6;
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ULONG FunctionNumber:3;
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ULONG DeviceNumber:5;
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ULONG BusNumber:8;
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ULONG Reserved2:7;
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ULONG Enable:1;
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} bits1; // Type 1 Config Cycle
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ULONG AsULONG;
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} u;
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} PCI_CFG_CYCLE_BITS, *PPCI_CFG_CYCLE_BITS;
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//
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// Define PCI cycle/command types.
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//
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typedef enum _PCI_COMMAND_TYPES{
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PciCommandInterruptAcknowledge = 0x0,
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PciCommandSpecialCycle = 0x1,
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PciCommandIoRead = 0x2,
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PciCommandIoWrite = 0x3,
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PciCommandMemoryRead = 0x6,
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PciCommandMemoryWrite = 0x7,
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PciCommandConfigurationRead = 0xa,
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PciCommandConfigurationWrite = 0xb,
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PciCommandMemoryReadMultiple = 0xc,
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PciCommandDualAddressCycle = 0xd,
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PciCommandMemoryReadLine = 0xe,
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PciCommandMemoryWriteAndInvalidate = 0xf,
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MaximumPciCommand
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} PCI_COMMAND_TYPES, *PPCI_COMMAND_TYPES;
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//
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// PCI platform-specific functions
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//
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PCI_CONFIGURATION_TYPES
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HalpPCIConfigCycleType (
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IN ULONG BusNumber
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);
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VOID
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HalpPCIConfigAddr (
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IN ULONG BusNumber,
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IN PCI_SLOT_NUMBER Slot,
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PPCI_CFG_CYCLE_BITS pPciAddr
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);
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//
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// Define PCI configuration cycle types.
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//
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typedef enum _PCI_TYPE0_CONFIG_TYPE {
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PciConfigType0AsIdsel,
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PciConfigType0AsDeviceNumber
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} PCI_TYPE0_CONFIG_TYPE, *PPCI_TYPE0_CONFIG_TYPE;
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typedef struct tagPCIPBUSDATA {
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//
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// NT Defined PCI data
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//
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PCIBUSDATA CommonData;
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//
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// Common alpha hal specific data
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//
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PVOID ConfigBaseQva;
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PCI_TYPE0_CONFIG_TYPE PciType0ConfigType;
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BOOLEAN BusIsAcrossPPB;
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RTL_BITMAP DevicePresent;
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ULONG DevicePresentBits[PCI_MAX_DEVICES * PCI_MAX_FUNCTION / 32];
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ULONG MaxDevice;
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//
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// Platform-specific storage
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//
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PVOID PlatformSpecificData;
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} PCIPBUSDATA, *PPCIPBUSDATA;
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