156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
/*++
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Copyright (c) 1993 Digital Equipment Corporation
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Module Name:
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avantdef.h
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Abstract:
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This module specifies platform-specific definitions for the
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Avanti modules.
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Author:
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Joe Notarangelo 25-Oct-1993
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Revision History:
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--*/
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#ifndef _LX3DEF_
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#define _LX3DEF_
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#include "alpharef.h"
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#include "apecs.h"
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#include "isaaddr.h"
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//
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// Highest Virtual local PCI Slot is 14 == IDSEL PCI_AD[25]
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//
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#define PCI_MAX_LOCAL_DEVICE 14
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//
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// Highest PCI interrupt vector is in ISA Vector Space
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//
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#define PCI_MAX_INTERRUPT_VECTOR (MAXIMUM_ISA_VECTOR - ISA_VECTORS)
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//
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// Define the per-processor data structures allocated in the PCR
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// for each EV4 processor.
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//
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#if !defined (_LANGUAGE_ASSEMBLY) && !defined (AXP_FIRMWARE)
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typedef struct _AVANTI_PCR{
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ULONGLONG HalpCycleCount; // 64-bit per-processor cycle count
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EV4ProfileCount ProfileCount; // Profile counter state do not move
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EV4IrqStatus IrqStatusTable[MaximumIrq];// Irq status table
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} AVANTI_PCR, *PAVANTI_PCR;
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//
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// Short form for PCR access
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//
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#define HAL_PCR ( (PAVANTI_PCR)(&(PCR->HalReserved)) )
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#endif //!_LANGUAGE_ASSEMBLY
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//
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// define base of sparse I/O space
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//
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#define PCI_SPARSE_IO_BASE_QVA ((ULONG)(HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL)))
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//
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// PCI-E/ISA Bridge chip configuration space base is at physical address
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// 0x1.e000.0000. The equivalent QVA is:
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//
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// ((0x1.e000.0000 + cache line offset) >> IO_BIT_SHIFT) | QVA_ENABLE
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// which equals 0xaf000000.
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//
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// NB: The PCI configuration space address is what we're really referring
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// to, here; both symbols are useful.
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//
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#define PCI_CONFIGURATION_BASE_QVA 0xaf000000
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#define PCI_BRIDGE_CONFIGURATION_BASE_QVA 0xaf000000
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//
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// ISA memory space base starts at 0x2.0000.0000.
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// The equivalent QVA is:
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//
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// ((0x2.0000.0000 + cache line offset) >> IO_BIT_SHIFT) | QVA_ENABLE
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//
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#define ISA_MEMORY_BASE_QVA 0xb0000000
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//
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// I/O space base starts at 0x3.0000.0000.
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// The equivalent QVA is:
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//
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// ((0x3.0000.0000 + cache line offset) >> IO_BIT_SHIFT) | QVA_ENABLE
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//
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#define IO_BASE_QVA 0xAE000000
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//
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// Define the PCI config cycle type
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//
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#define PCI_CONFIG_CYCLE_TYPE_0 0x0 // Local PCI device
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#define PCI_CONFIG_CYCLE_TYPE_1 0x1 // Nested PCI device
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#define PCI_REVISION (0x0100 >> IO_BIT_SHIFT)
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//
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// Define the location of the PCI/ISA bridge IDSEL: AD[18]
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//
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#define PCI_ISA_BRIDGE_HEADER_OFFSET (0x00070000 >> IO_BIT_SHIFT)
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//
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// Define primary (and only) CPU on an Avanti system
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//
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#define HAL_PRIMARY_PROCESSOR ((ULONG)0x0)
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#define HAL_MAXIMUM_PROCESSOR ((ULONG)0x0)
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//
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// Define the default processor clock frequency used before the actual
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// value can be determined.
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//
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#define DEFAULT_PROCESSOR_FREQUENCY_MHZ (233)
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#define DEFAULT_PROCESSOR_CYCLE_COUNT (1000000/233)
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//
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// define configuration register
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// (see page 5-3) of the LX3 spec.
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//
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#define CONFIG_REGISTER_PHYS 0x100100000
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#define CONFIG_REGISTER_SMALL 0x1001
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#define CONFIG_SELECT_DISABLE_AUDIO 0x0
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#define CONFIG_SELECT_ENABLE_AUDIO 0x1
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#define CONFIG_SELECT_SELECT_AUDIO1_530 0x10
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#define CONFIG_SELECT_SELECT_AUDIO1_E80 0x11
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#define CONFIG_SELECT_SELECT_AUDIO2_F40 0x20
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#define CONFIG_SELECT_SELECT_AUDIO2_604 0x21
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#define CONFIG_SELECT_ECP_DMA_0 0x30
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#define CONFIG_SELECT_ECP_DMA_1 0x31
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#define CONFIG_SELECT_DISABLE_87303 0x40
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#define CONFIG_SELECT_ENABLE_87303 0x41
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#define CONFIG_SELECT_LIGHT_LED 0x60
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#define CONFIG_SELECT_UNLIGHT_LED 0x61
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#define CONFIG_SELECT_RESET_SYSTEM 0x71
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#define CONFIG_SELECT_IDLE 0x80
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#endif // _LX3DEF_
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