146 lines
3.7 KiB
C
146 lines
3.7 KiB
C
// #pragma comment(exestr, "@(#) mipsdat.c 1.1 95/09/28 15:42:43 nec")
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/*++
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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ixdat.c
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Abstract:
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Declares various data which is initialize data, or pagable data.
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Author:
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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/*++
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Revision History:
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ADD001 ataka@oa2.kb.nec.co.jp Mon Oct 17 20:53:16 JST 1994
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- add HalpMapRegisterMemorySpace
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BUG001 ataka@oa2.kb.nec.co.jp Mon Oct 17 21:49:18 JST 1994
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- change HalpMapRegisterMemorySpace Size
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CNG001 ataka@oa2.kb.nec.co.jp Mon Oct 17 21:58:30 JST 1994
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- change HalpIDTUsage size to MAXIMUM_VECTOR
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CMP001 ataka@oa2.kb.nec.co.jp Tue Oct 18 15:34:47 JST 1994
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- resolve compile error
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A002 ataka@oa2.kb.nec.co.jp 1995/6/17
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- merge 1050
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--*/
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#include "halp.h"
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#ifdef ALLOC_DATA_PRAGMA
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#pragma data_seg("INIT")
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#endif
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//
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// The following data is only valid during system initialiation
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// and the memory will be re-claimed by the system afterwards
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//
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ADDRESS_USAGE HalpDefaultPcIoSpace = {
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NULL, CmResourceTypePort, InternalUsage,
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{
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EISA_CONTROL_PHYSICAL_BASE+0x000, 0x10, // ISA DMA
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EISA_CONTROL_PHYSICAL_BASE+0x0C0, 0x10, // ISA DMA
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EISA_CONTROL_PHYSICAL_BASE+0x080, 0x10, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x020, 0x2, // PIC
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EISA_CONTROL_PHYSICAL_BASE+0x0A0, 0x2, // Cascaded PIC
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EISA_CONTROL_PHYSICAL_BASE+0x040, 0x4, // Timer1, Referesh, Speaker, Control Word
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EISA_CONTROL_PHYSICAL_BASE+0x048, 0x4, // Timer2, Failsafe
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EISA_CONTROL_PHYSICAL_BASE+0x061, 0x1, // NMI (system control port B)
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EISA_CONTROL_PHYSICAL_BASE+0x092, 0x1, // system control port A
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EISA_CONTROL_PHYSICAL_BASE+0x070, 0x2, // Cmos/NMI enable
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EISA_CONTROL_PHYSICAL_BASE+0x0F0, 0x10, // coprocessor ports
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0,0
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}
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};
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ADDRESS_USAGE HalpEisaIoSpace = {
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NULL, CmResourceTypePort, InternalUsage,
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{
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EISA_CONTROL_PHYSICAL_BASE+0x0D0, 0x10, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x400, 0x10, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x480, 0x10, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x4C2, 0xE, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x4D4, 0x2C, // DMA
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EISA_CONTROL_PHYSICAL_BASE+0x461, 0x2, // Extended NMI
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EISA_CONTROL_PHYSICAL_BASE+0x464, 0x2, // Last Eisa Bus Muster granted
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EISA_CONTROL_PHYSICAL_BASE+0x4D0, 0x2, // edge/level control registers
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EISA_CONTROL_PHYSICAL_BASE+0xC84, 0x1, // System board enable
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0, 0
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}
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};
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#define R94A_MAPREGISTER_BASE 100 // CMP001
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// BUG001
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ADDRESS_USAGE HalpMapRegisterMemorySpace = {
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NULL, CmResourceTypeMemory, InternalUsage,
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{
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R94A_MAPREGISTER_BASE, (USHORT)(DMA_TRANSLATION_LIMIT/(sizeof(TRANSLATION_ENTRY))*PAGE_SIZE), // for Map Register Area CMP001
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0, 0
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}
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};
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//
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// From usage.c
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//
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ADDRESS_USAGE *HalpAddressUsageList;
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//
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// Misc hal stuff in the registry
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//
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WCHAR rgzHalClassName[] = L"Hardware Abstraction Layer";
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//
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// From ixpcibus.c
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//
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WCHAR rgzMultiFunctionAdapter[] = L"\\Registry\\Machine\\Hardware\\Description\\System\\MultifunctionAdapter";
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WCHAR rgzConfigurationData[] = L"Configuration Data";
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WCHAR rgzIdentifier[] = L"Identifier";
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WCHAR rgzPCIIndetifier[] = L"PCI";
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WCHAR rgzReservedResources[] = L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\SystemResources\\ReservedResources"; // A002
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#ifdef ALLOC_DATA_PRAGMA
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#pragma data_seg()
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#endif
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//
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// IDT vector usage info
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//
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// CNG001
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#if defined(MIPS)
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IDTUsage HalpIDTUsage[MAXIMUM_VECTOR]; // Size of PCR->InterruptRoutine[]
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#else // CMP001
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IDTUsage HalpIDTUsage[MAXIMUM_IDTVECTOR];
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#endif
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