215 lines
4.9 KiB
C
215 lines
4.9 KiB
C
/*++
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Copyright (c) 1989 Microsoft Corporation
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Module Name:
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ixsysbus.c
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Abstract:
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Author:
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Environment:
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Revision History:
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--*/
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#include "halp.h"
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ULONG HalpDefaultInterruptAffinity;
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extern UCHAR HalpPciLogical2PhysicalInt[];
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(PAGE,HalpGetSystemInterruptVector)
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#endif
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BOOLEAN
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HalpTranslateSystemBusAddress(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PHYSICAL_ADDRESS BusAddress,
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IN OUT PULONG AddressSpace,
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OUT PPHYSICAL_ADDRESS TranslatedAddress
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)
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/*++
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Routine Description:
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This function translates a bus-relative address space and address into
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a system physical address.
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Arguments:
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BusAddress - Supplies the bus-relative address
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AddressSpace - Supplies the address space number.
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Returns the host address space number.
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AddressSpace == 0 => memory space
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AddressSpace == 1 => I/O space
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TranslatedAddress - Supplies a pointer to return the translated address
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Return Value:
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A return value of TRUE indicates that a system physical address
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corresponding to the supplied bus relative address and bus address
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number has been returned in TranslatedAddress.
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A return value of FALSE occurs if the translation for the address was
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not possible
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--*/
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{
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PSUPPORTED_RANGE pRange;
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#if DBG
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PULONG datap;
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PULONG datap2;
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#endif
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pRange = NULL;
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switch (*AddressSpace) {
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case 0:
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// verify memory address is within buses memory limits
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for (pRange = &BusHandler->BusAddresses->PrefetchMemory; pRange; pRange = pRange->Next) {
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if (BusAddress.QuadPart >= pRange->Base &&
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BusAddress.QuadPart <= pRange->Limit) {
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break;
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}
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}
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if (!pRange) {
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for (pRange = &BusHandler->BusAddresses->Memory; pRange; pRange = pRange->Next) {
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if (BusAddress.QuadPart >= pRange->Base &&
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BusAddress.QuadPart <= pRange->Limit) {
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break;
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}
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}
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}
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break;
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case 1:
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// verify IO address is within buses IO limits
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for (pRange = &BusHandler->BusAddresses->IO; pRange; pRange = pRange->Next) {
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if (BusAddress.QuadPart >= pRange->Base &&
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BusAddress.QuadPart <= pRange->Limit) {
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break;
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}
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}
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break;
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}
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if (pRange) {
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TranslatedAddress->QuadPart = BusAddress.QuadPart + pRange->SystemBase;
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*AddressSpace = pRange->SystemAddressSpace;
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#if 0
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datap = (PULONG)&(BusAddress.QuadPart);
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DbgPrint("HAL T BusAddress HIGH:LOW = %08lX:%08lX \n",
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datap[1],
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datap[0]
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);
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datap = (PULONG)&(pRange->Base);
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datap2 =(PULONG)&(pRange->Limit);
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DbgPrint("HAL T RBase-RLimit HIGH:LOW = %08lX:%08lX -- %08lX:%08lX\n",
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datap[1],
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datap[0],
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datap2[1],
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datap2[0]
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);
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datap = (PULONG)&(pRange->SystemBase);
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DbgPrint("HAL T RSysbase HIGH:LOW = %08lX:%08lX \n",
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datap[1],
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datap[0]
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);
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DbgPrint("HAL T BusNo = (0x%x) AddrSpace = 0x%x TransAddr HIGH:LOW = %08lX:%08lX \n",
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BusHandler->BusNumber,
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*AddressSpace,
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TranslatedAddress->u.HighPart,
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TranslatedAddress->u.LowPart
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);
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#endif
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return TRUE;
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}
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return FALSE;
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}
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ULONG
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HalpGetSystemInterruptVector(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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)
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/*++
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Routine Description:
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Arguments:
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BusInterruptLevel - Supplies the bus specific interrupt level.
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BusInterruptVector - Supplies the bus specific interrupt vector.
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Irql - Returns the system request priority.
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Affinity - Returns the system wide irq affinity.
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Return Value:
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Returns the system interrupt vector corresponding to the specified device.
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--*/
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{
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ULONG SystemVector;
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ULONG NumCpu;
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ULONG PhysicalInterrupt;
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UNREFERENCED_PARAMETER( RootHandler );
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//
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// R98B
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//
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if(BusHandler->InterfaceType == PCIBus){
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PhysicalInterrupt= (ULONG)HalpPciLogical2PhysicalInt[BusInterruptVector];
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SystemVector = PhysicalInterrupt + DEVICE_VECTORS;
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}else{
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PhysicalInterrupt= BusInterruptVector;
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SystemVector = BusInterruptVector + DEVICE_VECTORS;
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}
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*Irql = (KIRQL)(INT0_LEVEL + HalpIntLevelofIpr[HalpMachineCpu][PhysicalInterrupt]);
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//For MRCINT
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if(PhysicalInterrupt < 43){
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*Affinity = 0x1 <<HalpResetValue[PhysicalInterrupt].Cpu;
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}else{
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NumCpu = (**((PULONG *)(&KeNumberProcessors)));
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*Affinity = (0x1 <<NumCpu)-1;
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}
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return SystemVector;
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}
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