302 lines
9.7 KiB
C
302 lines
9.7 KiB
C
/*++
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Copyright (c) 1995 Digital Equipment Corporation
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Module Name:
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rawerror.h
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Abstract:
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This file defines the structures and definitions of correctable and
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uncorrectable Rawhide error frames, as well as various optional
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subpackets, snapshots, and frames.
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Author:
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Eric Rehm 20-June-1995
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Environment:
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Kernel mode
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Revision History:
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--*/
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#ifndef _RAWERRORH_
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#define _RAWERRORH_
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//
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// Error Frame Revision definitions.
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//
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#define UNCORRECTABLE_REVISION_1 (0)
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#define UNCORRECTABLE_REVISION_2 (1)
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#define CORRECTABLE_FRAME_REVISION_1 (0)
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#define CORRECTABLE_FRAME_REVISION_2 (1)
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//
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// CPU Daughter Card (CUD) Header
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//
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// #pragma pack(1)
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typedef struct _CUD_HEADER { // As Per Rawhide SPM
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ULONG Reserved0[4]; // (0x00-0x0c)
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ULONG ActiveCpus; // (0x10)
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ULONG Reserved1; // (0x14)
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UCHAR SystemSN[10]; // (0x18-0x21) Same as FRU System Serial Number
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UCHAR Reserved2[6]; // (0x22-0x27)
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UCHAR ProcessorSN[10]; // (0x28-0x31) Module (processor) S/N, if available
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USHORT ModType; // (0x32)
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ULONG Reserved3; // (0x34)
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ULONG DisabledResources; // (0x38)
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ULONG SystemRev; // (0x3c) Same as FRY System Revision Level?
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} CUD_HEADER, *PCUD_HEADER;
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//
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// IOD Error Frame
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//
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// N.B. Used in Uncorrectable *and* correctable error frames for
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// information on the IOD that recevied the machine check.
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// It is uses as well in MC Bus snapshot (for each IOD) and Iod Register
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// Subpacket.
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// As far as I'm concerned, they IOD information is the same in each case.
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// We can use the ValidBits field to optionally disable irrelevant
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// fields.
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//
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typedef struct _IOD_ERROR_FRAME {
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ULONGLONG IodBaseAddr; // (0x00)
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ULONG WhoAmI; // (0x08) - (Reserved in Rawhide SPM)
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ULONG ValidBits; // (0x0c)
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ULONG PciRev; // (0x10)
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ULONG CapCtrl; // (0x14)
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ULONG HaeMem; // (0x18)
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ULONG HaeIo; // (0x1c)
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ULONG IntCtrl; // (0x20)
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ULONG IntReq; // (0x24)
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ULONG IntMask0; // (0x28)
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ULONG IntMask1; // (0x2c)
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ULONG McErr0; // (0x30)
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ULONG McErr1; // (0x34)
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ULONG CapErr; // (0x38)
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ULONG Reserved0; // (0x3c)
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ULONG PciErr1; // (0x40)
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ULONG MdpaStat; // (0x44)
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ULONG MdpaSyn; // (0x48)
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ULONG MdpbStat; // (0x4c)
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ULONG MdpbSyn; // (0x50)
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ULONG Reserved1[3]; // (0x54-0x5f)
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} IOD_ERROR_FRAME, *PIOD_ERROR_FRAME;
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//
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// IOD Error Frame Valid Bits
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//
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// Corresponds to bitfields of ValidBits in the Iod Error Frame
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//
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typedef union _IOD_ERROR_FRAME_VALID_BITS {
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struct {
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ULONG IodBaseAddrValid: 1; // <0>
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ULONG WhoAmIValid: 1; // <1>
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ULONG PciRevValid: 1; // <2>
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ULONG CapCtrlValid: 1; // <3>
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ULONG HaeMemValid: 1; // <4>
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ULONG HaeIoValid: 1; // <5>
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ULONG IntCtrlValid: 1; // <6>
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ULONG IntReqValid: 1; // <7>
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ULONG IntMask0Valid: 1; // <8>
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ULONG IntMask1Valid: 1; // <9>
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ULONG McErr0Valid: 1; // <10>
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ULONG McErr1Valid: 1; // <11>
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ULONG CapErrValid: 1; // <12>
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ULONG PciErr1Valid: 1; // <13>
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ULONG MdpaStatValid: 1; // <14>
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ULONG MdpaSynValid: 1; // <15>
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ULONG MdpbStatValid: 1; // <16>
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ULONG MdpbSynValid: 1; // <17>
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};
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ULONG all;
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} IOD_ERROR_FRAME_VALID_BITS, *PIOD_ERROR_FRAME_VALID_BITS;
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//
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// Optional Snapshots for which headers or frames are defined below:
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// PCI Bus Snapshot
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// MC Bus Snapshot
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// Memory Size Frame
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// System Managment Frame
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// ESC Frame
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//
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//
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// Flags indicating which of the optional snapshots or frames are present
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// in a correctable or uncorrectable error frame
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//
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typedef union _ERROR_SUBPACKET_FLAGS {
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struct {
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ULONGLONG Reserved0: 10; // <0:9> Reserved
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ULONGLONG SysEnvPresent : 1; // <10>
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ULONGLONG MemSizePreset : 1; // <11>
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ULONGLONG Reserved1: 8; // <12:19> Reserved
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ULONGLONG McBusPresent: 1; // <20>
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ULONGLONG GcdBusPresent: 1; // <21>
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ULONGLONG Reserved2: 8; // <22:29> Reserved
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ULONGLONG IodSubpacketPresent: 1; // <30>
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ULONGLONG PciSnapshotPresent: 1; // <31>
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ULONGLONG EscSubpacketPresent: 1; // <32>
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ULONGLONG Reserved3: 7; // <33:39> Reserved
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ULONGLONG Iod2SubpacketPresent: 1; // <40> ???
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ULONGLONG Pci2SnapshotPresent: 1; // <41> ???
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};
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ULONGLONG all;
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} ERROR_SUBPACKET_FLAGS, *PERROR_SUBPACKET_FLAGS;
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//
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// PCI Bus Snapshot Header
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//
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// Header is followed PCI_COMMON_CONFIG packets (256 bytes each) for each PCI
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// device present in the system. Therefore,
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// Length = sizeof (PCI_BUS_SNAPSHOT) + NumberOfNodes*sizeof(PCI_COMMON_CONFIG)
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//
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// N.B. PCI_COMMON_CONFIG is defined \nt\private\ntos\inc\pci.h
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//
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typedef struct _PCI_BUS_SNAPSHOT {
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ULONG Length; // (0x00)
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USHORT BusNumber; // (0x04)
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USHORT NumberOfNodes; // (0x06)
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//
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// NumberOfNodes packets follow (0x08)
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//
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} PCI_BUS_SNAPSHOT, *PPCI_BUS_SNAPSHOT;
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//
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// MC Bus Snapshot Header
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//
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// Header is followed a IOD_ERROR_FRAME for each IOD on the system;
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// Therefore,
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// Length = sizeof (MC_BUS_SNAPSHOT) + NumberOfIods*sizeof(IOD_ERROR_FRAME)
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//
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typedef struct _MC_BUS_SNAPSHOT {
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ULONG Length; // (0x00)
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ULONG NumberOfIods; // (0x04)
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ULONGLONG ReportingCpuBaseAddr; // (0x08)
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//
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// NumberOfIods packets follow (0x10)
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//
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} MC_BUS_SNAPSHOT, *PMC_BUS_SNAPSHOT;
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//
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// Memory Size Frame
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//
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typedef struct _MEMORY_SIZE_FRAME {
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ULONGLONG MemorySize; // (0x00)
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} MEMORY_SIZE_FRAME, *PMEMORY_SIZE_FRAME;
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typedef union _MEMORY_SIZE {
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struct {
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ULONGLONG MemorySize0: 8; // <0:7>
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ULONGLONG MemorySize1: 8; // <8:15>
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ULONGLONG MemorySize2: 8; // <16:23>
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ULONGLONG MemorySize3: 8; // <24:31>
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ULONGLONG Reserved: 24; // <32:55>
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ULONGLONG MemorySize0Valid: 1; // <56>
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ULONGLONG MemorySize1Valid: 1; // <57>
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ULONGLONG MemorySize2Valid: 1; // <58>
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ULONGLONG MemorySize3Valid: 1; // <59>
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};
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ULONGLONG all;
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} MEMORY_SIZE, *PMEMORY_SIZE;
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//
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// System Managment Frame
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//
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typedef struct _SYSTEM_MANAGEMENT_FRAME {
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ULONGLONG SystemEnvironment; // (0x00)
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ULONG Elcr2; // (0x08) (see IOD_ELCR2 in iod.h)
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ULONG Reserved0; // (0x0c)
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} SYSTEM_MANAGEMENT_FRAME, *PSYSTEM_MANAGEMENT_FRAME;
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typedef union _SYSTEM_ENVIRONMENT {
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struct {
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ULONGLONG FanFailReg: 8; // <0:7> I2C Fain Fail Register
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ULONGLONG SensorReg1: 8; // <8:15> I2C Sensor Register 1
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ULONGLONG OpcControl: 8; // <16:23> I2C OPC Control
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ULONGLONG SensorReg2: 8; // <24:31> I2C Sensor Register 2
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ULONGLONG Reserved: 24; // <32:55> I2C Sensor Register 1
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ULONGLONG FanFailValid: 1; // <56>
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ULONGLONG SensorReg1Valid: 1; // <57>
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ULONGLONG OpcControlValid: 1; // <58>
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ULONGLONG SensorReg2Valid: 1; // <59>
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};
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ULONGLONG all;
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} SYSTEM_ENVIRONMENT, *PSYSTEM_ENVIRONMENT;
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//
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// ESC Frame
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//
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// This isn't just and ESC frame. EISA Id information is also contained herein.
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//
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// N.B. "index" refers to an indexed config ESC register accessed at index/data
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// ports 0x22/0x23.
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//
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typedef struct _ESC_FRAME {
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UCHAR Id[4]; // (0x00) "ESC\0"
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ULONG ByteCount; // (0x04) ???
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UCHAR EscId; // (0x08) ESC ID Register (index 0x02)
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UCHAR Filler0[7]; // (0x09-0x0f)
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UCHAR Rid; // (0x0c) Revision Id (index 0x08)
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UCHAR Filler1[3]; // (0x0d-0x0f)
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UCHAR ModeSel; // (0x10) Mode Select Reg (index 0x40)
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UCHAR Filler2[3]; // (0x11-0x13)
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UCHAR EisaId[4]; // (0x14-0x17) EisaId of devices in EISA Slots
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UCHAR SgRba; // (0x18) S-G Reloate Base Addr Reg (index 57)
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UCHAR Filler3[3]; // (0x19-0x1b)
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UCHAR Pirq[4]; // (0x1c-0x1f) PIRQ Route Ctrl (index 0x60-0x63)
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UCHAR NmiSc; // (0x20) NMI Status & Ctrl (port 0x61)
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UCHAR Filler4[3]; // (0x21-0x23)
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UCHAR NmiEsc; // (0x24) NMI Ext. Status & Ctrl (port 0x461)
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UCHAR Filler5[3]; // (0x25-0x27)
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UCHAR LEisaMg; // (0x28) Last EISA Master Granted (port 0x464)
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UCHAR Filler6[3]; // (0x29-0x2b)
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} ESC_FRAME, *PESC_FRAME;
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//
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// Rawhide Uncorrectable (Hard) Error Frame
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// Rawhide Correctable (Soft) Error Frame
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//
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typedef union _RAWHIDE_CORRECTABLE_FRAME {
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ULONG Revision; // (0x00)
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ULONG Reserved0; // (0x04)
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ULONGLONG ErrorSubpacketFlags; // (0x08)
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CUD_HEADER CudHeader; // (0x10-0x4f)
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IOD_ERROR_FRAME IodErrorFrame; // (0x50-0xaf)
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//
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// Optional Error Subpackets // (0xb0)
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// as per ErrorSubpackFlags
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//
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} RAWHIDE_CORRECTABLE_FRAME, *PRAWHIDE_CORRECTABLE_FRAME,
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RAWHIDE_UNCORRECTABLE_FRAME, *PRAWHIDE_UNCORRECTABLE_FRAME;
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#endif // _RAWERRORH_
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