201 lines
4.1 KiB
C
201 lines
4.1 KiB
C
/*++
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Copyright (c) 1995 Digital Equipment Corporation
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Module Name:
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rwintbal.h
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Abstract:
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This file contains definitions specific to the Rawhide platform
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Author:
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Matthew Buchman 29-Nov-1995
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Environment:
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Kernel mode
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Revision History:
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--*/
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#ifndef _RWINTBALH_
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#define _RWINTBALH_
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#if !defined (_LANGUAGE_ASSEMBLY)
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//
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// Define the structures for assigning vector affinity
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//
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//
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// Generic weighted list. The weight field is used by the
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// affinity assignment algorithm when selecting IOD and CPU's
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//
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typedef struct _WEIGHTED_LIST_ENTRY {
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LIST_ENTRY ListEntry;
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LONG Weight;
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} WEIGHTED_LIST_ENTRY, *PWEIGHTED_LIST_ENTRY;
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//
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// Search Criteria enum for MAX/MIN search
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//
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typedef enum _WEIGHTED_SEARCH_CRITERIA {
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FindMaxWeight,
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FindMinWeight
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} WEIGHTED_SEARCH_CRITERIA, *PWEIGHTED_SEARC_CRITERIA;
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//
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// Define CPU vector information structure.
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//
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typedef struct _CPU_VECTOR_DATA {
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WEIGHTED_LIST_ENTRY ListEntry; // Generic list
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ULONG LogicalNumber; // Logical Id for this CPU
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} CPU_VECTOR_DATA, *PCPU_VECTOR_DATA;
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//
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// Define IOD vector data structure. This structure
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// contains information on devices present on an IOD, their
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// vectors, and shadow registers for IntReq and IntTarg
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//
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typedef struct _IOD_VECTOR_DATA {
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WEIGHTED_LIST_ENTRY ListEntry; // Generic list
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PCPU_VECTOR_DATA TargetCpu[2]; // Target CPU vector data
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RTL_BITMAP VectorPresent[2]; // IOD device vectors present
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RTL_BITMAP SharedVector[2]; // IOD device vectors shared
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ULONG VectorPresentBits[2]; // bitmap storage
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ULONG SharedVectorBits[2]; // bitmap storage
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ULONG BusNumber; // Logical bus number for this IOD
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ULONG HwBusNumber; // Physical bus number for this IOD
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ULONG Affinity[2]; // Vector AFFINITY for targets 0/1
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IOD_INT_MASK IntMask[2]; // Shadow of IOD IntMaskX
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MC_DEVICE_ID IntTarg[2]; // Shadow of IOD IntTargX
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} IOD_VECTOR_DATA, *PIOD_VECTOR_DATA;
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typedef enum _IOD_IRR_BITS{
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IodPci0IrrBit = 0,
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IodPci1IrrBit = 1,
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IodPci2IrrBit = 2,
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IodPci3IrrBit = 3,
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IodPci4IrrBit = 4,
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IodPci5IrrBit = 5,
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IodPci6IrrBit = 6,
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IodPci7IrrBit = 7,
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IodPci8IrrBit = 8,
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IodPci9IrrBit = 9,
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IodPci10IrrBit = 10,
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IodPci11IrrBit = 11,
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IodPci12IrrBit = 12,
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IodPci13IrrBit = 13,
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IodPci14IrrBit = 14,
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IodPci15IrrBit = 15,
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IodEisaIrrBit = 16,
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IodScsiIrrBit = 16,
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IodI2cCtrlIrrBit = 17,
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IodI2cBusIrrBit = 18,
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IodEisaNmiIrrBit = 21,
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IodSoftErrIrrBit = 22,
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IodHardErrIrrBit = 23
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} IOD_IRR_BITS, *PIOD_IRR_BITS;
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extern PIOD_VECTOR_DATA HalpIodVectorData;
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extern PCPU_VECTOR_DATA HalpCpuVectorData;
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extern MC_DEVICE_ID HalpProcessorMcDeviceId[];
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extern LIST_ENTRY HalpIodVectorDataHead;
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extern LIST_ENTRY HalpCpuVectorDataHead;
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//
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// Weighted list manipulation routines
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//
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PWEIGHTED_LIST_ENTRY
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HalpFindWeightedList(
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PLIST_ENTRY ListHead,
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WEIGHTED_SEARCH_CRITERIA SearchCriteria
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);
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//
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// Rawhide interrupt routine prototypes.
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//
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#if 0
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VOID
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HalpFindAllPciVectors(
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IN PCONFIGURATION_COMPONENT_DATA Root
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);
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VOID
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HalpFindPciBusVectors(
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IN PCONFIGURATION_COMPONENT Component,
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IN PVOID ConfigurationData
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);
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VOID
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HalpInitializeIoVectorAffinity(
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PLOADER_PARAMETER_BLOCK AFFINITYerBlock
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);
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VOID
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HalpBalanceIoVectorLoad(
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PLIST_ENTRY pIodListHead
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);
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VOID
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HalpBalanceVectorLoadForIod(
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PIOD_VECTOR_DATA IodVectorData
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);
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#endif
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VOID
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HalpInitializeVectorBalanceData(
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VOID
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);
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VOID
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HalpInitializeCpuVectorData(
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ULONG LogicalCpu
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);
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VOID
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HalpAssignPrimaryProcessorVectors(
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PLIST_ENTRY
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);
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ULONG
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HalpAssignInterruptForIod(
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PIOD_VECTOR_DATA IodVectorData,
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ULONG InterruptVector
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);
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#ifdef HALDBG
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VOID
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HalpDumpIoVectorAffinity(
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VOID
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);
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#endif
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#endif // !defined (_LANGUAGE_ASSEMBLY)
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#endif //_RWINTBALH_
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