216 lines
7.6 KiB
C
216 lines
7.6 KiB
C
//#pragma comment(exestr, "$Header: /usr4/winnt/SOURCES/ddk35/src/hal/halsni/mips/RCS/snidef.h,v 1.6 1995/04/07 10:00:01 flo Exp $")
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/*+++
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Copyright (c) 1993-1994 Siemens Nixdorf Informationssysteme AG
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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SNIdef.h
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Abstract:
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This module is the header file that describes hardware addresses
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common for all SNI systems.
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---*/
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#ifndef _SNIDEF_
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#define _SNIDEF_
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#if DBG
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#define DebugPrint(arg) DbgPrint arg
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#else
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#define DebugPrint(arg) ;
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#endif
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#include "DESKdef.h"
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#include "MINIdef.h"
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#define VESA_BUS_PHYSICAL_BASE 0x1d000000
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#define VESA_BUS (VESA_BUS_PHYSICAL_BASE | KSEG1_BASE)
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#define VESA_IO_PHYSICAL_BASE 0x1e000000
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#define VESA_IO (VESA_IO_PHYSICAL_BASE | KSEG1_BASE)
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#define PROM_PHYSICAL_BASE 0x1fc00000 // physical base of boot PROM
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#define EISA_MEMORY_PHYSICAL_BASE 0x10000000 // physical base of EISA memory
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#define EISA_CONTROL_PHYSICAL_BASE 0x14000000 // physical base of EISA I/O Space
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#define EISA_MEMORY_BASE (EISA_MEMORY_PHYSICAL_BASE | KSEG1_BASE)
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#define EISA_IO (EISA_CONTROL_PHYSICAL_BASE | KSEG1_BASE)
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#define MPAGENT_RESERVED 0x17c00000 // KSEG1 address of a 4M segment stolen
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// in the upper part of the I/O EISA space
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// to be used for cache replace operation.
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#define NET_PHYSICAL_BASE 0x18000000 // physical base of ethernet control
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#define SCSI_PHYSICAL_BASE 0x19000000 // physical base of SCSI control 1
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#define FLOPPY_CHANNEL 0x2 // Floppy DMA channel
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#define FLOPPY_RELATIVE_BASE 0x3f0 // base of floppy control
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#define PARALLEL_RELATIVE_BASE 0x3bc // base of parallel port
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#define SERIAL0_RELATIVE_BASE 0x3f8 // base of serial port 0
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#define SERIAL1_RELATIVE_BASE 0x2f8 // base of serial port 1
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#define FLOPPY_PHYSICAL_BASE 0x160003f0 // base of floppy control
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#define PARALLEL_PHYSICAL_BASE 0x160003bc // base of parallel port
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#define SERIAL0_PHYSICAL_BASE 0x160003f8 // base of serial port 0
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#define SERIAL1_PHYSICAL_BASE 0x160002f8 // base of serial port 1
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//
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// the UCONF, MachineStatus, LED and MachineConfig Registers in the ASIC
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// (identical on all SNI machines)
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//
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#define UCONF_PHYSICAL_ADDR 0x1fff0000 // interruptions, interface protocol
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#define UCONF_ADDR 0xbfff0000 // interruptions, | KSEG1_BASE
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#define IOMEMCONF_PHYSICAL_ADDR 0x1fff0010 // I/O and Memory Config (for disable Timeout int)
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#define IOMEMCONF_ADDR 0xbfff0010 // I/O and memconf | KSEG1_BASE
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//
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// some debugging information registers in the ASIC
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// common on all SNI machines
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//
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#define DMACCES_PHYSICAL_ADDR 0x1fff0028 // Counter: # of DMA accesses
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#define DMACCES 0xbfff0028 // Counter: # of DMA accesses | KSEG1_BASE
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#define DMAHIT_PHYSICAL_ADDR 0x1fff0030 // Counter: # of DMA hits
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#define DMAHIT 0xbfff0030 // Counter: # of DMA hits | KSEG1_BASE
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#define IOMMU_PHYSICAL_ADDR 0x1fff0018 // Select IO space addressing
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#define IOMMU 0xbfff0018 // Select IO space addressing | KSEG1_BASE
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#define IOADTIMEOUT1_PHYSICAL_ADDR 0x1fff0020 // Current IO context for the first CPU timeout
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#define IOADTIMEOUT1 0xbfff0020 // first CPU timeout | KSEG1_BASE
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#define IOADTIMEOUT2_PHYSICAL_ADDR 0x1fff0008 // Current IO context on all CPU timeouts
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#define IOADTIMEOUT2 0xbfff0008 // all CPU timeouts | KSEG1_BASE
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//
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// Define system time increment value.
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//
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#define TIME_INCREMENT (10 * 1000 * 10) // Time increment in 100ns units
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#define MAXIMUM_INCREMENT (10 * 1000 * 10)
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#define MINIMUM_INCREMENT (1 * 1000 * 10)
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#define EXTRA_TIMER_CLOCK_IN 3686400 // 3.6864 Mhz
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#define PRE_COUNT 3 //
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//
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// Define basic Interrupt Levels which correspond to Cause register bits.
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//
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#define INT0_LEVEL 3
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#define INT3_LEVEL 3
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#define SCSIEISA_LEVEL 4 // SCSI/EISA device int. vector
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#define EISA_DEVICE_LEVEL 4 // EISA bus interrupt level ???
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#define DUART_VECTOR 5 // DUART SC 2681 int. vector
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#define EXTRA_CLOCK_LEVEL 6 // this is one of the extra timers on RM400
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#define PROFILE_LEVEL 8 // Profiling level via Count/compare Interrupt
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#define CLOCK_LEVEL (ONBOARD_VECTORS + 0) // Timer channel 0 in the PC core
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//
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// all others are vectors in the interrupt dispatch table.
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//
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#define SCSI_VECTOR 9 // SCSI device interrupt vector
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#define NET_DEFAULT_VECTOR 7 // ethernet device internal vector on R4x00 PC !!!
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// configured in the Firmware Tree !!!!!
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#define NET_LEVEL 10 // ethernet device int. vector
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#define OUR_IPI_LEVEL 7 // multipro machine
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#define NETMULTI_LEVEL 5 // multipro machine : ethernet device int. vector
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#define EIP_VECTOR 15 // EIP Interrupt routine
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#define CLOCK2_LEVEL CLOCK_LEVEL // System Clock Level
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#define ONBOARD_VECTORS 16
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#define MAXIMUM_ONBOARD_VECTOR (15 + ONBOARD_VECTORS) // maximum Onboard (PC core) vector
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//
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// Define EISA device interrupt vectors.
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// they only occur when an Eisa Extension is installed in the Desktop model
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//
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#define EISA_VECTORS 32
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#define MAXIMUM_EISA_VECTOR (15 + EISA_VECTORS) // maximum EISA vector
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//
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// relative interrupt vectors
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// only the interrupt vectors relative to the Isa/EISA bus are defined
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//
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#define KEYBOARD_VECTOR 1 // Keyboard device interrupt vector
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#define SERIAL1_VECTOR 3 // Serial device 1 interrupt vector
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#define SERIAL0_VECTOR 4 // Serial device 0 interrupt vector
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#define FLOPPY_VECTOR 6 // Floppy device interrupt vector
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#define PARALLEL_VECTOR 7 // Parallel device interrupt vector
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#define MOUSE_VECTOR 12 // PS/2 Mouse device interrupt vector
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#define MACHINE_TYPE_ISA 0
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#define MACHINE_TYPE_EISA 1
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//
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// The MAXIMUM_MAP_BUFFER_SIZE defines the maximum map buffers which the system
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// will allocate for devices which require phyically contigous buffers.
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//
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#define MAXIMUM_MAP_BUFFER_SIZE 0xc0000 // 768KB for today
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//
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// Define the initial buffer allocation size for a map buffers for systems with
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// no memory which has a physical address greater than MAXIMUM_PHYSICAL_ADDRESS.
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//
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#define INITIAL_MAP_BUFFER_SMALL_SIZE 0x10000
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//
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// Define the initial buffer allocation size for a map buffers for systems with
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// no memory which has a physical address greater than MAXIMUM_PHYSICAL_ADDRESS.
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//
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#define INITIAL_MAP_BUFFER_LARGE_SIZE 0xc0000 // 256KB as start
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//
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// Define the incremental buffer allocation for a map buffers.
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//
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#define INCREMENT_MAP_BUFFER_SIZE 0x10000
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//
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// Define the maximum number of map registers that can be requested at one time
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// if actual map registers are required for the transfer.
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//
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#define MAXIMUM_ISA_MAP_REGISTER 512
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//
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// Define the maximum physical address which can be handled by an Isa card.
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// (16MB)
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//
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#define MAXIMUM_PHYSICAL_ADDRESS 0x01000000
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//
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// Define the maximum physical address of Main memory on SNI machines
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// (256 MB)
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//
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#define MAXIMUM_MEMORY_PHYSICAL_ADDRESS 0x10000000
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#define COPY_BUFFER 0xFFFFFFFF
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#define NO_SCATTER_GATHER 0x00000001
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#endif /* _SNIDEF_ */
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