140 lines
3.8 KiB
ArmAsm
140 lines
3.8 KiB
ArmAsm
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/*++
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Copyright (c) 1994 Digital Equipment Corporation
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Module Name:
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eb164io.s
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Abstract:
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This module implements flashrom I/O access routines for EB164.
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Author:
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Chao Chen 14-Sep-1994
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Joe Notarangelo 14-Sep-1994
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Jeff Wiedermeier 14-Sep-1994
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Environment:
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Executes in kernel mode.
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Revision History:
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--*/
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#include "halalpha.h"
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#define EB164_FLASH_BASE -0x37a9 // negative of 0xc857
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#define CIA_SPARSE_IO_SVA -0x37a8 // negative of 0xc858
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#define IO_BIT_SHIFT 5
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//++
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//
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// UCHAR
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// EB164_READ_FLASH_BYTE(
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// ULONG Offset
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// )
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//
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// Routine Description:
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//
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// Read a byte of data from the flash rom at the specified offset.
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//
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// Arguments:
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//
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// Offset (a0) - Supplies a byte offset from the base of the flash rom.
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//
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// Return Value:
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//
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// (v0) Returns the byte of data read from the flash rom.
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//
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//--
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LEAF_ENTRY(EB164_READ_FLASH_BYTE)
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and a0, 3, t2 // save byte lane to read
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srl a0, 19,t1 // get bank select to lsb
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and t1, 1, t1 // mask it
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lda t3, CIA_SPARSE_IO_SVA(zero) // 0xffff ffff ffff c858
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sll t3, 28, t3 // 0xffff fc85 8000 0000
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lda t4, 0x800(zero) // get port number for bank sel
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sll t4, IO_BIT_SHIFT, t4 // put it in place
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or t3, t4, t3 // and merge it
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stl t1, 0(t3) // write the bank select
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mb
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lda t0, EB164_FLASH_BASE(zero) // 0xffff ffff ffff c857
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sll t0, 4, t0 // 0xffff ffff fffc 8570
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lda t0, 0xf(t0) // 0xffff ffff fffc 857f
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sll t0, 24, t0 // 0xffff fc85 7f00 0000
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sll a0, IO_BIT_SHIFT, a0 // shift offset to sparse space
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bis t0, a0, t0 // merge offset and base
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ldl v0, 0(t0) // read flash rom
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extbl v0, t2, v0 // extract byte from appropriate lane
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ret zero, (ra) // return
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.end EB164_READ_FLASH_BYTE
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//++
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//
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// VOID
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// EB164_WRITE_FLASH_BYTE(
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// ULONG Offset,
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// UCHAR Data
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// )
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//
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// Routine Description:
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//
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// Write a byte of data to the flash rom at the specified offset.
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//
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// Arguments:
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//
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// Offset (a0) - Supplies a byte offset from the base of the flash rom.
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//
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// Data (a1) - Supplies the data to write.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(EB164_WRITE_FLASH_BYTE)
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and a0, 3, t2 // save byte lane to read
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srl a0, 19,t1 // get bank select to lsb
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and t1, 1, t1 // mask it
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lda t3, CIA_SPARSE_IO_SVA(zero) // 0xffff ffff ffff c858
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sll t3, 28, t3 // 0xffff fc85 8000 0000
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lda t4, 0x800(zero) // get port number for bank sel
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sll t4, IO_BIT_SHIFT, t4 // put it in place
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or t3, t4, t3 // and merge it
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stl t1, 0(t3) // write the bank select
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mb
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lda t0, EB164_FLASH_BASE(zero) // 0xffff ffff ffff c857
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sll t0, 4, t0 // 0xffff ffff fffc 8570
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lda t0, 0xf(t0) // 0xffff ffff fffc 857f
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sll t0, 24, t0 // 0xffff fc85 7f00 0000
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sll a0, IO_BIT_SHIFT, a0 // shift offset to sparse space
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bis t0, a0, t0 // merge offset and base
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insbl a1, t2, a1 // put data into correct lane
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stl a1, 0(t0) // write the flash rom
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mb // order the write
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ret zero, (ra) // return
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.end EB164_WRITE_FLASH_BYTE
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