613 lines
16 KiB
NASM
613 lines
16 KiB
NASM
title "Operand Decoding"
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;++
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;
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;Copyright (c) 1991 Microsoft Corporation
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;
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;Module Name:
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;
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; vdmoprnd.asm
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;
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;Abstract:
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;
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; This module contains support for decoding 386/486 instruction operands.
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; This is used by the opcode 0f emulation.
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;
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;
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;Author:
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;
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; Dave Hastings (daveh) 20-Feb-1992
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;
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;Notes:
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;
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; The only instruction which uses the operand decodeing (3/10/92) is
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; LMSW. This instruction only has 16 bit operands, so only the 16 bit
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; operand decode has been tested. The 32 bit decode will be tested
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; (or removed?) during clean up, after code freeze.
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;
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;Revision History:
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;
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;--
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.386p
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.xlist
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include ks386.inc
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include callconv.inc ; calling convention macros
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include mi386.inc
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include vdm.inc
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include vdmtb.inc
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page ,132
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_PAGE SEGMENT DWORD PUBLIC 'CODE'
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ASSUME DS:NOTHING, ES:NOTHING, SS:NOTHING, FS:NOTHING, GS:NOTHING
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EXTRNP _Ki386GetSelectorParameters,4
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extrn CheckEip:proc
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_PAGE ENDS
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_DATA SEGMENT DWORD PUBLIC 'DATA'
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;
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; This table is used to dispatch base on the mod code for 16 bit address size.
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; When these locations are dispatched to,
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; edi = linear address of next byte of instruction
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; esi = pointer to register info
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; ecx = R/M value for the instruction
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modtab16 dd offset FLAT:do20 ; no displacement
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dd offset FLAT:do40 ; 8 bit displacement
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dd offset FLAT:do50 ; 16 bit displacement
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dd offset FLAT:do60 ; Register operand
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;
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; This table is used to dispatch based on the RM code for 16 bit address size.
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; When these locations are dispatched to,
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; edi = pointer to trap frame
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; esi = pointer to register info
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; ebx = partial linear address of operand
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rmtab16 dd offset FLAT:do70 ; [bx + si]
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dd offset FLAT:do80 ; [bx + di]
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dd offset FLAT:do90 ; [bp + si]
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dd offset FLAT:do100 ; [bp + di]
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dd offset FLAT:do95 ; [si]
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dd offset FLAT:do85 ; [di]
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dd offset FLAT:do105 ; [bp]
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dd offset FLAT:do75 ; [bx]
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;
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; This table is used to dispatch base on the mod code for 32 bit address size.
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; When these locations are dispatched to,
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; edi = linear address of next byte of instruction
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; esi = pointer to register info
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; ecx = R/M value for the instruction
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modtab32 dd offset FLAT:do220 ; no displacement
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dd offset FLAT:do240 ; 8 bit displacement
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dd offset FLAT:do250 ; 32 bit displacement
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dd offset FLAT:do260 ; Register operand
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;
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; This table is used to pick up register offsets in the trap frame.
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; N.B. This table cannot be used to find byte registers!!
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;
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public RegTab
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RegTab dd TsEax
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dd TsEcx
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dd TsEdx
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dd TsEbx
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dd TsHardwareEsp
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dd TsEbp
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dd TsEsi
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dd TsEdi
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_DATA ENDS
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_PAGE SEGMENT DWORD PUBLIC 'CODE'
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ASSUME DS:FLAT, ES:NOTHING, SS:FLAT, FS:NOTHING, GS:NOTHING
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page ,132
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subttl "Decode Operands"
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;++
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;
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; Routine Description:
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;
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; This routine decodes the operands for 386/486 instructions. It returns
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; the linear address of the operand. For register operands, this is
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; an address in the stack frame. The read/write flag is used for
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; operand verification.
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;
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; Arguments:
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;
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; esi = address of reg info
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; eax = 1 -- Read of operand
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; 0 -- Write of operand
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;
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; Returns:
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;
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; eax = True -- operand ok, and reg info operand field filled in
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; eax = False -- operand not ok.
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; reg info eip updated
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;
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; Notes:
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;
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; This routine DOES NOT decode the reg field of the mod r/m byte of the
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; opcode. This is not a problem because it will only return one operand
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; address anyway. It does not decode byte registers correctly!!.
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;
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; check grow down ss handling
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public VdmDecodeOperand
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VdmDecodeOperand proc
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SegBase equ [ebp] - 04h
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SegLimit equ [ebp] - 08h
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SegFlags equ [ebp] - 0ch
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SelLookupResult equ [ebp] - 010h
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ReadWrite equ [ebp] - 014h
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ModRm equ [ebp] - 018h
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SIB equ [ebp] - 01ch
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push ebp
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mov ebp,esp
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sub esp,01ch
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push edi
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push ecx
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push ebx
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mov ReadWrite,eax
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;
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; Get the info on DS (assumed default selector)
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;
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lea edx,SegLimit
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push edx
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lea edx,SegBase
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push edx
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lea edx,SegFlags
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push edx
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mov edi,[esi].RiTrapFrame
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push [edi].TsSegDs
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax ; check result after override check
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mov edi,[esi].RiEip
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add edi,[esi].RiCsBase
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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movzx edx,byte ptr [edi] ; get mod r/m byte
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inc [esi].RiEip
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inc edi
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mov ecx,edx
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mov ModRm,edx
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and edx,MI_MODMASK
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shr edx,MI_MODSHIFT ; form jump table index from mod
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and ecx,MI_RMMASK ; form index for RM jump table
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test [esi].RiPrefixFlags,PREFIX_ADDR32
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; 32 bit segments.
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jnz do210 ; 32 bit instructions have diff form
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jmp modtab16[edx * 4]
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do20:
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;
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; These forms have no displacement, except for the "bp" form, which
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; is just a 16 bit immediate displacement
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;
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mov ebx,0 ; assume no displacement
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cmp ecx,MI_RMBP
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jne do30 ; dispatch through jmp table
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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movzx ebx,word ptr [edi] ; get displacement
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inc [esi].RiEip ; update eip
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inc [esi].RiEip
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jmp do120 ; go add in seg
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do30: mov edi,[esi].RiTrapFrame
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jmp rmtab16[ecx * 4] ; go get register info.
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do40:
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;
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; These forms have an 8 bit displacement
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;
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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movsx ebx,byte ptr [edi]
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inc [esi].RiEip
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mov edi,[esi].RiTrapFrame
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jmp rmtab16[ecx * 4]
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do50:
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;
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; These forms have an 16 bit displacement
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;
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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movzx ebx,word ptr [edi]
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inc [esi].RiEip
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inc [esi].RiEip
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mov edi,[esi].RiTrapFrame
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jmp rmtab16[ecx * 4]
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do60:
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;
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; These forms are register operands
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;
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mov ebx,RegTab[ecx * 4] ; get offset into stackframe
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add ebx,[esi].RiTrapFrame ; form linear address
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jmp do194 ; return success
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do70:
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;
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; This is the [bx + si] operand
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;
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movzx edx,word ptr [edi].TsEsi
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add ebx,edx
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do75:
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;
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; This is the [bx] operand, and a fall through to finish forming [bx + si]
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;
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movzx edx,word ptr [edi].TsEbx
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add ebx,edx
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jmp do120 ; go add seg info
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do80:
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;
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; This is the [bx + di] operand
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;
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movzx edx,word ptr [edi].TsEbx
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add ebx,edx
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do85:
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;
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; This is the [di] operand, and the fall through to finish [bx + di]
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;
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movzx edx,word ptr [edi].TsEdi
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add ebx,edx
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jmp do120 ; go add seg info
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do90:
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;
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; This is the [bp + si] operand
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;
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movzx edx,word ptr [edi].TsEbp
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add ebx,edx
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;
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; Change default segment to be ss
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;
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lea edx,SegLimit
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push edx
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lea edx,SegBase
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push edx
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lea edx,SegFlags
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push edx
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mov edi,[esi].RiTrapFrame
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push [edi].TsHardwareSegSs
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax
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do95:
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;
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; This is the [si] operand, and the fall through for forming [bp + si]
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;
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movzx edx,word ptr [edi].TsEsi
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add ebx,edx
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jmp do120 ; go add seg info
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do100:
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;
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; This is the [bp + di] operand
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;
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movzx edx,word ptr [edi].TsEdi
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add ebx,edx
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do105:
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;
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; This is the [bp] operand, and the fall through for forming [bp + di]
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;
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movzx edx,word ptr [edi].TsEbp
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add ebx,edx
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;
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; Change default segment to be SS
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;
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lea edx,SegLimit
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push edx
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lea edx,SegBase
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push edx
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lea edx,SegFlags
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push edx
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mov edi,[esi].RiTrapFrame
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push [edi].TsHardwareSegSs
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax
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do120: test [esi].RiPrefixFlags,PREFIX_SEG_ALL ; check for seg prefixes
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jz do190 ; no prefixes, use default.
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; Note: we could use a bsr instruction here, but it has a high
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; overhead relative to a test and a jump, and I expect that
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; es overrides will be by far the most common
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mov edi,[esi].RiTrapFrame
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test [esi].RiPrefixFlags,PREFIX_ES
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jz do130
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movzx edx,word ptr [edi].TsSegEs
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jmp do180
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do130: test [esi].RiPrefixFlags,PREFIX_CS
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jz do140
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movzx edx,word ptr [edi].TsSegCs
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jmp do180
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do140: test [esi].RiPrefixFlags,PREFIX_SS
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jz do150
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movzx edx,word ptr [edi].TsHardwareSegSs
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jmp do180
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do150: test [esi].RiPrefixFlags,PREFIX_DS
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jz do160
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movzx edx,word ptr [edi].TsSegDs
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jmp do180
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do160: test [esi].RiPrefixFlags,PREFIX_FS
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jz do170
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movzx edx,word ptr [edi].TsSegFs
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jmp do180
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do170: ; assert that seg gs bit is set
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movzx edx,word ptr [edi].TsSegGs
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;
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; Get information on new default segment
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;
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do180: lea ecx,SegLimit
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push ecx
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lea ecx,SegBase
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push ecx
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lea ecx,SegFlags
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push ecx
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push edx
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax
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test byte ptr SelLookupResult,0fh
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jz do200 ; return error
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cmp dword ptr ReadWrite,0
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jnz do190 ; we can read all sels
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test dword ptr SegFlags,SEL_TYPE_WRITE
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jz do200 ; return error.
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cmp ebx,SegLimit
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jae do200 ; gp fault
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do190: add ebx,SegBase
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do194: mov [esi].RiOperand,ebx ; update op pointer
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mov eax,1
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do195: pop ebx
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pop ecx
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pop edi
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mov esp,ebp
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pop ebp
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ret
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do200: xor eax,eax
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jmp do195
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;
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; Get the SIB if there is one, and save it for later.
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;
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do210: cmp ecx,MI_RMSIB
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jne do215 ; no Sib, dispatch for displacement
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call CheckEip
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test al,0fh
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jz do200 ; report GP fault
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movzx eax,byte ptr [edi]
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mov Sib,eax
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inc edi
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inc [esi].RiEip
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do215: jmp modtab32[edx * 4]
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do220:
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;
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; These forms have no displacement, except for the "bp" form, which
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; is just a 32 bit immediate displacement
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;
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mov ebx,0 ; assume no displacement
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cmp ecx,MI_RMBP
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jne do270
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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mov ebx,[edi] ; get displacement
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add [esi].RiEip,4 ; update eip
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jmp do120 ; go add in seg
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do240:
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;
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; These forms have an 8 bit displacement
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;
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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movsx ebx,byte ptr [edi]
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inc [esi].RiEip
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jmp do270
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do250:
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;
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; These forms have an 32 bit displacement
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;
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call CheckEip
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test al,0fh
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jz do200 ; Gp fault, report error
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mov ebx, [edi]
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add [esi].RiEip,4
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jmp do270
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do260:
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;
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; These forms are register operands
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;
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mov ebx,RegTab[ecx * 4] ; get offset into stackframe
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add ebx,[esi].RiTrapFrame ; form linear address
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jmp do195 ; return success
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do270:
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;
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; Add in the RM portion of the effective address.
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;
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cmp ecx,MI_RMSIB
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je do290 ; handle SIB specially
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mov edi,[esi].RiTrapFrame
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mov edx,RegTab[ecx * 4] ; get offset of register
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add ebx,[edx+edi] ; add register to displacement
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cmp ecx,MI_RMBP ; bp is base?
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je do280 ; set up ss as default
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jmp do120 ; get segment info.
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do280:
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;
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; Change default segment to be SS
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;
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lea edx,SegLimit
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push edx
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lea edx,SegBase
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push edx
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lea edx,SegFlags
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push edx
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mov edi,[esi].RiTrapFrame
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push [edi].TsHardwareSegSs
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax
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jmp do120
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do290:
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;
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; Decode the Sib
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;
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mov edx,Sib
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mov edi,[esi].RiTrapFrame
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and edx,MI_SIB_BASEMASK ; isolate base
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cmp edx,MI_SIB_BASENONE ; no base
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je do300
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mov eax,RegTab[edx * 4]
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add ebx,[edi+eax] ; get register contents, and add
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do300: mov edx,Sib
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and ecx,MI_SIB_INDEXMASK
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shr ecx,MI_SIB_INDEXSHIFT ; make index out of "index" field
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cmp ecx,MI_SIB_INDEXNONE
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je do310 ; no index
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mov eax,RegTab[ecx * 4]
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mov eax,[eax+edi] ; get reg contents for multiply.
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mov ecx,Sib
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and ecx,MI_SIB_SSMASK
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shr ecx,MI_SIB_SSSHIFT ; for shift count
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shl eax,cl
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add ebx,eax
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do310: cmp edx,MI_SIB_BASENONE
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jne do120
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;
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; If mod != 0, then we have to add in EBP, and make ss the default seg
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;
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mov edx,ModRm
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and edx,MI_MODMASK
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shr edx,MI_MODSHIFT
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cmp edx,MI_MODNONE
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jne do120
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;
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; Add in Ebp, and change default segment to ss
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;
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add ebx,[edi].TsEbp
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lea edx,SegLimit
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push edx
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lea edx,SegBase
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push edx
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lea edx,SegFlags
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push edx
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mov edi,[esi].RiTrapFrame
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push [edi].TsHardwareSegSs
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call VdmSegParams
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add esp,010h
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mov SelLookupResult,eax
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jmp do120 ; add in segment info
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VdmDecodeOperand endp
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public VdmSegParams
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VdmSegParams proc
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push edi
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mov edi,[esi].RiTrapFrame
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test dword ptr [edi].TsEFlags,EFLAGS_V86_MASK
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jz vsp20
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Segmt equ word ptr [ebp + 8]
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SegFlags equ [ebp + 0Ch]
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SegBase equ [ebp + 010h]
|
|
SegLimit equ [ebp + 014h]
|
|
|
|
pop edi
|
|
push ebp
|
|
mov ebp,esp
|
|
push edi
|
|
|
|
movzx eax,Segmt
|
|
shl eax,4
|
|
mov edi,SegBase
|
|
mov [edi],eax
|
|
mov edi,SegLimit
|
|
mov dword ptr [edi],0FFFFh
|
|
mov edi,SegFlags
|
|
mov [edi],dword ptr SEL_TYPE_WRITE
|
|
mov eax,1
|
|
|
|
pop edi
|
|
mov esp,ebp
|
|
pop ebp
|
|
ret
|
|
|
|
vsp20: pop edi
|
|
IFDEF STD_CALL
|
|
jmp _Ki386GetSelectorParameters@16
|
|
ELSE
|
|
jmp _Ki386GetSelectorParameters
|
|
ENDIF
|
|
|
|
VdmSegParams endp
|
|
_PAGE ENDS
|
|
end
|