1879 lines
47 KiB
C
1879 lines
47 KiB
C
/*++
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Copyright (c) 1990 Microsoft Corporation
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Module Name:
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mapcache.c
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Abstract:
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This module contains the routines which implement mapping views
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of sections into the system-wide cache.
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Author:
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Lou Perazzoli (loup) 22-May-1990
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Landy Wang (landyw) 02-Jun-1997
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Revision History:
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--*/
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#include "mi.h"
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(INIT,MiInitializeSystemCache )
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#endif
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extern ULONG MmFrontOfList;
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VOID
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MiFreeInPageSupportBlock(
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IN PMMINPAGE_SUPPORT Support
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);
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VOID
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MiRemoveMappedPtes(
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IN PVOID BaseAddress,
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IN ULONG NumberOfPtes,
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IN PCONTROL_AREA ControlArea,
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IN PMMSUPPORT WorkingSetInfo
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);
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#define X256K 0x40000
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PMMPTE MmFirstFreeSystemCache;
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PMMPTE MmLastFreeSystemCache;
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PMMPTE MmFlushSystemCache;
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PMMPTE MmSystemCachePteBase;
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LONG
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MiMapCacheExceptionFilter(
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IN PNTSTATUS Status,
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IN PEXCEPTION_POINTERS ExceptionPointer
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);
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NTSTATUS
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MmMapViewInSystemCache(
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IN PVOID SectionToMap,
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OUT PVOID* CapturedBase,
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IN OUT PLARGE_INTEGER SectionOffset,
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IN OUT PULONG CapturedViewSize
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)
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/*++
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Routine Description:
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This function maps a view in the specified subject process to
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the section object. The page protection is identical to that
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of the prototype PTE.
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This function is a kernel mode interface to allow LPC to map
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a section given the section pointer to map.
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This routine assumes all arguments have been probed and captured.
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Arguments:
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SectionToMap - Supplies a pointer to the section object.
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BaseAddress - Supplies a pointer to a variable that will receive
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the base address of the view. If the initial value
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of this argument is not null, then the view will
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be allocated starting at the specified virtual
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address rounded down to the next 64kb address
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boundary. If the initial value of this argument is
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null, then the operating system will determine
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where to allocate the view using the information
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specified by the ZeroBits argument value and the
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section allocation attributes (i.e. based and
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tiled).
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SectionOffset - Supplies the offset from the beginning of the
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section to the view in bytes. This value must be a multiple
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of 256k.
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ViewSize - Supplies a pointer to a variable that will receive
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the actual size in bytes of the view.
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The initial values of this argument specifies the
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size of the view in bytes and is rounded up to the
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next host page size boundary and must be less than or equal
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to 256k.
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Return Value:
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Returns the status
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TBS
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Environment:
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Kernel mode.
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--*/
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{
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PSECTION Section;
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ULONG PteOffset;
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KIRQL OldIrql;
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PMMPTE PointerPte;
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PMMPTE LastPte;
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PMMPTE ProtoPte;
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PMMPTE LastProto;
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PSUBSECTION Subsection;
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PVOID EndingVa;
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PCONTROL_AREA ControlArea;
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Section = SectionToMap;
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// Assert the view size is less 256kb and the section offset
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// is aligned on a 256k boundary.
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ASSERT(*CapturedViewSize <= 256L * 1024L);
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ASSERT((SectionOffset->LowPart & (256L * 1024L - 1)) == 0);
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// Make sure the section is not an image section or a page file
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// backed section.
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if (Section->u.Flags.Image) {
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return STATUS_NOT_MAPPED_DATA;
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}
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ControlArea = Section->Segment->ControlArea;
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ASSERT(*CapturedViewSize != 0);
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ASSERT(ControlArea->u.Flags.GlobalOnlyPerSession == 0);
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Subsection = (PSUBSECTION)(ControlArea + 1);
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LOCK_PFN(OldIrql);
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ASSERT(ControlArea->u.Flags.BeingCreated == 0);
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ASSERT(ControlArea->u.Flags.BeingDeleted == 0);
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ASSERT(ControlArea->u.Flags.BeingPurged == 0);
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// Find a free 256k base in the cache.
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if (MmFirstFreeSystemCache == (PMMPTE)MM_EMPTY_LIST) {
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UNLOCK_PFN(OldIrql);
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return STATUS_NO_MEMORY;
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}
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if (MmFirstFreeSystemCache == MmFlushSystemCache) {
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// All system cache PTEs have been used, flush the entire
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// TB to remove any stale TB entries.
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KeFlushEntireTb(TRUE, TRUE);
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MmFlushSystemCache = NULL;
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}
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PointerPte = MmFirstFreeSystemCache;
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// Update next free entry.
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ASSERT(PointerPte->u.Hard.Valid == 0);
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if (PointerPte->u.List.NextEntry == MM_EMPTY_PTE_LIST) {
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KeBugCheckEx(MEMORY_MANAGEMENT,
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0x778,
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(ULONG_PTR)PointerPte,
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0,
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0);
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MmFirstFreeSystemCache = (PMMPTE)MM_EMPTY_LIST;
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} else {
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MmFirstFreeSystemCache = MmSystemCachePteBase + PointerPte->u.List.NextEntry;
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ASSERT(MmFirstFreeSystemCache <= MiGetPteAddress(MmSystemCacheEnd));
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}
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// Increment the count of the number of views for the
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// section object. This requires the PFN lock to be held.
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ControlArea->NumberOfMappedViews += 1;
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ControlArea->NumberOfSystemCacheViews += 1;
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ASSERT(ControlArea->NumberOfSectionReferences != 0);
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UNLOCK_PFN(OldIrql);
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*CapturedBase = MiGetVirtualAddressMappedByPte(PointerPte);
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EndingVa = (PVOID)(((ULONG_PTR)*CapturedBase +
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*CapturedViewSize - 1L) | (PAGE_SIZE - 1L));
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// An unoccupied address range has been found, put the PTEs in
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// the range into prototype PTEs.
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#if DBG
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// Zero out the next pointer field.
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PointerPte->u.List.NextEntry = 0;
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#endif //DBG
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LastPte = MiGetPteAddress(EndingVa);
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// Calculate the first prototype PTE address.
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PteOffset = (ULONG)(SectionOffset->QuadPart >> PAGE_SHIFT);
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// Make sure the PTEs are not in the extended part of the
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// segment.
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while (PteOffset >= Subsection->PtesInSubsection) {
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PteOffset -= Subsection->PtesInSubsection;
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Subsection = Subsection->NextSubsection;
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}
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ProtoPte = &Subsection->SubsectionBase[PteOffset];
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LastProto = &Subsection->SubsectionBase[Subsection->PtesInSubsection];
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while (PointerPte <= LastPte) {
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if (ProtoPte >= LastProto) {
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// Handle extended subsections.
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Subsection = Subsection->NextSubsection;
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ProtoPte = Subsection->SubsectionBase;
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LastProto = &Subsection->SubsectionBase[
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Subsection->PtesInSubsection];
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}
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ASSERT(PointerPte->u.Long == ZeroKernelPte.u.Long);
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PointerPte->u.Long = MiProtoAddressForKernelPte(ProtoPte);
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ASSERT(((ULONG_PTR)PointerPte & (MM_COLOR_MASK << PTE_SHIFT)) ==
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(((ULONG_PTR)ProtoPte & (MM_COLOR_MASK << PTE_SHIFT))));
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PointerPte += 1;
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ProtoPte += 1;
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}
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return STATUS_SUCCESS;
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}
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VOID
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MiAddMappedPtes(
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IN PMMPTE FirstPte,
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IN ULONG NumberOfPtes,
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IN PCONTROL_AREA ControlArea
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)
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/*++
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Routine Description:
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This function maps a view in the current address space to the
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specified control area. The page protection is identical to that
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of the prototype PTE.
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This routine assumes the caller has called MiCheckPurgeAndUpMapCount,
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hence the PFN lock is not needed here.
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Arguments:
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FirstPte - Supplies a pointer to the first PTE of the current address
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space to initialize.
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NumberOfPtes - Supplies the number of PTEs to initialize.
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ControlArea - Supplies the control area to point the PTEs at.
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Return Value:
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None.
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Environment:
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Kernel mode.
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--*/
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{
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PMMPTE PointerPte;
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PMMPTE ProtoPte;
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PMMPTE LastProto;
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PMMPTE LastPte;
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PSUBSECTION Subsection;
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if (ControlArea->u.Flags.GlobalOnlyPerSession == 0) {
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Subsection = (PSUBSECTION)(ControlArea + 1);
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} else {
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Subsection = (PSUBSECTION)((PLARGE_CONTROL_AREA)ControlArea + 1);
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}
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PointerPte = FirstPte;
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ASSERT(NumberOfPtes != 0);
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LastPte = FirstPte + NumberOfPtes;
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ASSERT(ControlArea->NumberOfMappedViews >= 1);
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ASSERT(ControlArea->NumberOfUserReferences >= 1);
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ASSERT(ControlArea->u.Flags.HadUserReference == 1);
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ASSERT(ControlArea->NumberOfSectionReferences != 0);
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ASSERT(ControlArea->u.Flags.BeingCreated == 0);
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ASSERT(ControlArea->u.Flags.BeingDeleted == 0);
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ASSERT(ControlArea->u.Flags.BeingPurged == 0);
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ProtoPte = Subsection->SubsectionBase;
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LastProto = &Subsection->SubsectionBase[Subsection->PtesInSubsection];
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while (PointerPte < LastPte) {
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if (ProtoPte >= LastProto) {
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// Handle extended subsections.
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Subsection = Subsection->NextSubsection;
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ProtoPte = Subsection->SubsectionBase;
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LastProto = &Subsection->SubsectionBase[
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Subsection->PtesInSubsection];
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}
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ASSERT(PointerPte->u.Long == ZeroKernelPte.u.Long);
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PointerPte->u.Long = MiProtoAddressForKernelPte(ProtoPte);
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ASSERT(((ULONG_PTR)PointerPte & (MM_COLOR_MASK << PTE_SHIFT)) ==
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(((ULONG_PTR)ProtoPte & (MM_COLOR_MASK << PTE_SHIFT))));
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PointerPte += 1;
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ProtoPte += 1;
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}
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return;
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}
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VOID
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MmUnmapViewInSystemCache(
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IN PVOID BaseAddress,
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IN PVOID SectionToUnmap,
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IN ULONG AddToFront
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)
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/*++
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Routine Description:
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This function unmaps a view from the system cache.
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NOTE: When this function is called, no pages may be locked in
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the cache for the specified view.
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Arguments:
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BaseAddress - Supplies the base address of the section in the
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system cache.
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SectionToUnmap - Supplies a pointer to the section which the
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base address maps.
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AddToFront - Supplies TRUE if the unmapped pages should be
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added to the front of the standby list (i.e., their
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value in the cache is low). FALSE otherwise
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Return Value:
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none.
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Environment:
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Kernel mode.
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--*/
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{
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PMMPTE PointerPte;
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PMMPFN Pfn1;
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PMMPTE FirstPte;
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MMPTE PteContents;
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KIRQL OldIrql;
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KIRQL OldIrqlWs;
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PFN_NUMBER i;
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WSLE_NUMBER WorkingSetIndex;
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PCONTROL_AREA ControlArea;
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ULONG WsHeld;
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PFN_NUMBER PdeFrameNumber;
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WsHeld = FALSE;
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ASSERT(KeGetCurrentIrql() <= APC_LEVEL);
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PointerPte = MiGetPteAddress(BaseAddress);
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FirstPte = PointerPte;
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ControlArea = ((PSECTION)SectionToUnmap)->Segment->ControlArea;
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PdeFrameNumber = MI_GET_PAGE_FRAME_FROM_PTE(MiGetPteAddress(PointerPte));
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// Get the control area for the segment which is mapped here.
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i = 0;
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do {
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// The cache is organized in chunks of 256k bytes, clear
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// the first chunk then check to see if this is the last
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// chunk.
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// The page table page is always resident for the system cache.
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// Check each PTE, it is in one of two states, either valid or
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// prototype PTE format.
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PteContents = *(volatile MMPTE*)PointerPte;
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if (PteContents.u.Hard.Valid == 1) {
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if (!WsHeld) {
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WsHeld = TRUE;
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LOCK_SYSTEM_WS(OldIrqlWs);
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continue;
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}
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Pfn1 = MI_PFN_ELEMENT(PteContents.u.Hard.PageFrameNumber);
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WorkingSetIndex = MiLocateWsle(BaseAddress,
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MmSystemCacheWorkingSetList,
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Pfn1->u1.WsIndex);
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MiRemoveWsle(WorkingSetIndex,
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MmSystemCacheWorkingSetList);
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MiReleaseWsle(WorkingSetIndex, &MmSystemCacheWs);
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MI_SET_PTE_IN_WORKING_SET(PointerPte, 0);
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// The PTE is valid.
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LOCK_PFN(OldIrql);
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// Capture the state of the modified bit for this PTE.
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MI_CAPTURE_DIRTY_BIT_TO_PFN(PointerPte, Pfn1);
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// Decrement the share and valid counts of the page table
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// page which maps this PTE.
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MiDecrementShareAndValidCount(PdeFrameNumber);
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// Decrement the share count for the physical page.
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#if DBG
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if (ControlArea->NumberOfMappedViews == 1) {
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PMMPFN Pfn;
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Pfn = MI_PFN_ELEMENT(PteContents.u.Hard.PageFrameNumber);
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ASSERT(Pfn->u2.ShareCount == 1);
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}
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#endif //DBG
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MmFrontOfList = AddToFront;
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MiDecrementShareCount(MI_GET_PAGE_FRAME_FROM_PTE(&PteContents));
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MmFrontOfList = FALSE;
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UNLOCK_PFN(OldIrql);
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} else {
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if (WsHeld) {
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UNLOCK_SYSTEM_WS(OldIrqlWs);
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WsHeld = FALSE;
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}
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ASSERT((PteContents.u.Long == ZeroKernelPte.u.Long) ||
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(PteContents.u.Soft.Prototype == 1));
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NOTHING;
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}
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MI_WRITE_INVALID_PTE(PointerPte, ZeroKernelPte);
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PointerPte += 1;
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BaseAddress = (PVOID)((PCHAR)BaseAddress + PAGE_SIZE);
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i += 1;
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} while (i < (X256K / PAGE_SIZE));
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if (WsHeld) {
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UNLOCK_SYSTEM_WS(OldIrqlWs);
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}
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FirstPte->u.List.NextEntry = MM_EMPTY_PTE_LIST;
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LOCK_PFN(OldIrql);
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// Free this entry to the end of the list.
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if (MmFlushSystemCache == NULL) {
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// If there is no entry marked to initiate a TB flush when
|
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// reused, mark this entry as the one. This way the TB
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// only needs to be flushed when the list wraps.
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MmFlushSystemCache = FirstPte;
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}
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MmLastFreeSystemCache->u.List.NextEntry = FirstPte - MmSystemCachePteBase;
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MmLastFreeSystemCache = FirstPte;
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// Decrement the number of mapped views for the segment
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// and check to see if the segment should be deleted.
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ControlArea->NumberOfMappedViews -= 1;
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ControlArea->NumberOfSystemCacheViews -= 1;
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// Check to see if the control area (segment) should be deleted.
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// This routine releases the PFN lock.
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MiCheckControlArea(ControlArea, NULL, OldIrql);
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return;
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}
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|
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VOID
|
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MiRemoveMappedPtes(
|
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IN PVOID BaseAddress,
|
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IN ULONG NumberOfPtes,
|
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IN PCONTROL_AREA ControlArea,
|
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IN PMMSUPPORT WorkingSetInfo
|
|
)
|
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|
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/*++
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Routine Description:
|
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|
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This function unmaps a view from the system cache or a session space.
|
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|
NOTE: When this function is called, no pages may be locked in
|
|
the cache (or session space) for the specified view.
|
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|
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Arguments:
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BaseAddress - Supplies the base address of the section in the
|
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system cache or session space.
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NumberOfPtes - Supplies the number of PTEs to unmap.
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ControlArea - Supplies the control area mapping the view.
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WorkingSetInfo - Supplies the charged working set structures.
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Return Value:
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None.
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Environment:
|
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Kernel mode.
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|
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--*/
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|
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{
|
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PMMPTE PointerPte;
|
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PMMPTE PointerPde;
|
|
PMMPFN Pfn1;
|
|
PMMPTE FirstPte;
|
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MMPTE PteContents;
|
|
KIRQL OldIrql;
|
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KIRQL OldIrqlWs;
|
|
ULONG WorkingSetIndex;
|
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ULONG DereferenceSegment;
|
|
MMPTE_FLUSH_LIST PteFlushList;
|
|
ULONG WsHeld;
|
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|
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DereferenceSegment = FALSE;
|
|
WsHeld = FALSE;
|
|
|
|
PteFlushList.Count = 0;
|
|
PointerPte = MiGetPteAddress(BaseAddress);
|
|
FirstPte = PointerPte;
|
|
|
|
|
|
// Get the control area for the segment which is mapped here.
|
|
|
|
|
|
while (NumberOfPtes) {
|
|
|
|
|
|
// The cache is organized in chunks of 256k bytes, clear
|
|
// the first chunk, then check to see if this is the last
|
|
// chunk.
|
|
|
|
|
|
|
|
// The page table page is always resident for the system cache (and
|
|
// for a session space map).
|
|
|
|
// Check each PTE, it is in one of two states, either valid or
|
|
// prototype PTE format.
|
|
|
|
|
|
PteContents = *PointerPte;
|
|
if (PteContents.u.Hard.Valid == 1) {
|
|
|
|
|
|
// The system cache is locked by us, all others are locked by
|
|
// the caller.
|
|
|
|
|
|
if (WorkingSetInfo == &MmSystemCacheWs) {
|
|
if (!WsHeld) {
|
|
WsHeld = TRUE;
|
|
LOCK_SYSTEM_WS(OldIrqlWs);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
Pfn1 = MI_PFN_ELEMENT(PteContents.u.Hard.PageFrameNumber);
|
|
|
|
WorkingSetIndex = MiLocateWsle(BaseAddress,
|
|
WorkingSetInfo->VmWorkingSetList,
|
|
Pfn1->u1.WsIndex);
|
|
ASSERT(WorkingSetIndex != WSLE_NULL_INDEX);
|
|
|
|
MiRemoveWsle(WorkingSetIndex,
|
|
WorkingSetInfo->VmWorkingSetList);
|
|
MiReleaseWsle(WorkingSetIndex, WorkingSetInfo);
|
|
|
|
MI_SET_PTE_IN_WORKING_SET(PointerPte, 0);
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
|
|
// The PTE is valid.
|
|
|
|
|
|
|
|
// Capture the state of the modified bit for this PTE.
|
|
|
|
|
|
MI_CAPTURE_DIRTY_BIT_TO_PFN(PointerPte, Pfn1);
|
|
|
|
|
|
// Flush the TB for this page.
|
|
|
|
|
|
if (PteFlushList.Count != MM_MAXIMUM_FLUSH_COUNT) {
|
|
PteFlushList.FlushPte[PteFlushList.Count] = PointerPte;
|
|
PteFlushList.FlushVa[PteFlushList.Count] = BaseAddress;
|
|
PteFlushList.Count += 1;
|
|
}
|
|
|
|
PointerPde = MiGetPteAddress(PointerPte);
|
|
|
|
#if !defined (_WIN64)
|
|
|
|
|
|
// The PDE must be carefully checked against the master table
|
|
// because the PDEs are all zeroed in process creation. If this
|
|
// process has never faulted on any address in this range (all
|
|
// references prior and above were filled directly by the TB as
|
|
// the PTEs are global on non-Hydra), then the PDE reference
|
|
// below to determine the page table frame will be zero.
|
|
|
|
// Note this cannot happen on NT64 as no master table is used.
|
|
|
|
|
|
if (PointerPde->u.Long == 0) {
|
|
|
|
PMMPTE MasterPde;
|
|
|
|
ASSERT(MiHydra == FALSE);
|
|
|
|
#if !defined (_X86PAE_)
|
|
MasterPde = &MmSystemPagePtes[((ULONG_PTR)PointerPde &
|
|
((sizeof(MMPTE) * PDE_PER_PAGE) - 1)) / sizeof(MMPTE)];
|
|
#else
|
|
MasterPde = &MmSystemPagePtes[((ULONG_PTR)PointerPde &
|
|
(PD_PER_SYSTEM * (sizeof(MMPTE) * PDE_PER_PAGE) - 1)) / sizeof(MMPTE)];
|
|
#endif
|
|
ASSERT(MasterPde->u.Hard.Valid == 1);
|
|
MI_WRITE_VALID_PTE(PointerPde, *MasterPde);
|
|
}
|
|
#endif
|
|
|
|
|
|
// Decrement the share and valid counts of the page table
|
|
// page which maps this PTE.
|
|
|
|
|
|
MiDecrementShareAndValidCount(MI_GET_PAGE_FRAME_FROM_PTE(PointerPde));
|
|
|
|
|
|
// Decrement the share count for the physical page.
|
|
|
|
|
|
MiDecrementShareCount(MI_GET_PAGE_FRAME_FROM_PTE(&PteContents));
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
} else {
|
|
if (WorkingSetInfo == &MmSystemCacheWs) {
|
|
if (WsHeld) {
|
|
UNLOCK_SYSTEM_WS(OldIrqlWs);
|
|
WsHeld = FALSE;
|
|
}
|
|
}
|
|
|
|
ASSERT((PteContents.u.Long == ZeroKernelPte.u.Long) ||
|
|
(PteContents.u.Soft.Prototype == 1));
|
|
NOTHING;
|
|
}
|
|
MI_WRITE_INVALID_PTE(PointerPte, ZeroKernelPte);
|
|
|
|
PointerPte += 1;
|
|
BaseAddress = (PVOID)((PCHAR)BaseAddress + PAGE_SIZE);
|
|
NumberOfPtes -= 1;
|
|
}
|
|
|
|
if (WorkingSetInfo == &MmSystemCacheWs) {
|
|
if (WsHeld) {
|
|
UNLOCK_SYSTEM_WS(OldIrqlWs);
|
|
}
|
|
}
|
|
LOCK_PFN(OldIrql);
|
|
|
|
MiFlushPteList(&PteFlushList, TRUE, ZeroKernelPte);
|
|
|
|
if (WorkingSetInfo != &MmSystemCacheWs) {
|
|
|
|
|
|
// Session space has no ASN - flush the entire TB.
|
|
|
|
|
|
MI_FLUSH_ENTIRE_SESSION_TB(TRUE, TRUE);
|
|
}
|
|
|
|
|
|
// Decrement the number of user references as the caller upped them
|
|
// via MiCheckPurgeAndUpMapCount when this was originally mapped.
|
|
|
|
|
|
ControlArea->NumberOfUserReferences -= 1;
|
|
|
|
|
|
// Decrement the number of mapped views for the segment
|
|
// and check to see if the segment should be deleted.
|
|
|
|
|
|
ControlArea->NumberOfMappedViews -= 1;
|
|
|
|
|
|
// Check to see if the control area (segment) should be deleted.
|
|
// This routine releases the PFN lock.
|
|
|
|
|
|
MiCheckControlArea(ControlArea, NULL, OldIrql);
|
|
}
|
|
|
|
VOID
|
|
MiInitializeSystemCache(
|
|
IN ULONG MinimumWorkingSet,
|
|
IN ULONG MaximumWorkingSet
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine initializes the system cache working set and
|
|
data management structures.
|
|
|
|
Arguments:
|
|
|
|
MinimumWorkingSet - Supplies the minimum working set for the system
|
|
cache.
|
|
|
|
MaximumWorkingSet - Supplies the maximum working set size for the
|
|
system cache.
|
|
|
|
Return Value:
|
|
|
|
None.
|
|
|
|
Environment:
|
|
|
|
Kernel mode, called only at phase 0 initialization.
|
|
|
|
--*/
|
|
|
|
{
|
|
ULONG SizeOfSystemCacheInPages;
|
|
ULONG HunksOf256KInCache;
|
|
PMMWSLE WslEntry;
|
|
ULONG NumberOfEntriesMapped;
|
|
PFN_NUMBER i;
|
|
MMPTE PteContents;
|
|
PMMPTE PointerPte;
|
|
KIRQL OldIrql;
|
|
|
|
PointerPte = MiGetPteAddress(MmSystemCacheWorkingSetList);
|
|
|
|
PteContents = ValidKernelPte;
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
i = MiRemoveZeroPage(MI_GET_PAGE_COLOR_FROM_PTE(PointerPte));
|
|
|
|
PteContents.u.Hard.PageFrameNumber = i;
|
|
|
|
MI_WRITE_VALID_PTE(PointerPte, PteContents);
|
|
|
|
MiInitializePfn(i, PointerPte, 1L);
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
#if defined (_WIN64)
|
|
MmSystemCacheWsle = (PMMWSLE)(MmSystemCacheWorkingSetList + 1);
|
|
#else
|
|
MmSystemCacheWsle =
|
|
(PMMWSLE)(&MmSystemCacheWorkingSetList->UsedPageTableEntries[0]);
|
|
#endif
|
|
|
|
MmSystemCacheWs.VmWorkingSetList = MmSystemCacheWorkingSetList;
|
|
MmSystemCacheWs.WorkingSetSize = 0;
|
|
MmSystemCacheWs.MinimumWorkingSetSize = MinimumWorkingSet;
|
|
MmSystemCacheWs.MaximumWorkingSetSize = MaximumWorkingSet;
|
|
InsertTailList(&MmWorkingSetExpansionHead.ListHead,
|
|
&MmSystemCacheWs.WorkingSetExpansionLinks);
|
|
|
|
MmSystemCacheWs.AllowWorkingSetAdjustment = TRUE;
|
|
|
|
|
|
// Don't use entry 0 as an index of zero in the PFN database
|
|
// means that the page can be assigned to a slot. This is not
|
|
// a problem for process working sets as page 0 is private.
|
|
|
|
|
|
MmSystemCacheWorkingSetList->FirstFree = 1;
|
|
MmSystemCacheWorkingSetList->FirstDynamic = 1;
|
|
MmSystemCacheWorkingSetList->NextSlot = 1;
|
|
MmSystemCacheWorkingSetList->LastEntry = (ULONG)MmSystemCacheWsMinimum;
|
|
MmSystemCacheWorkingSetList->Quota = MmSystemCacheWorkingSetList->LastEntry;
|
|
MmSystemCacheWorkingSetList->HashTable = NULL;
|
|
MmSystemCacheWorkingSetList->HashTableSize = 0;
|
|
MmSystemCacheWorkingSetList->Wsle = MmSystemCacheWsle;
|
|
|
|
MmSystemCacheWorkingSetList->HashTableStart =
|
|
(PVOID)((PCHAR)PAGE_ALIGN(&MmSystemCacheWorkingSetList->Wsle[MM_MAXIMUM_WORKING_SET]) + PAGE_SIZE);
|
|
|
|
MmSystemCacheWorkingSetList->HighestPermittedHashAddress = (PVOID)(MM_SYSTEM_CACHE_START);
|
|
|
|
NumberOfEntriesMapped = (ULONG)(((PMMWSLE)((PCHAR)MmSystemCacheWorkingSetList +
|
|
PAGE_SIZE)) - MmSystemCacheWsle);
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
while (NumberOfEntriesMapped < MmSystemCacheWsMaximum) {
|
|
|
|
PointerPte += 1;
|
|
i = MiRemoveZeroPage(MI_GET_PAGE_COLOR_FROM_PTE(PointerPte));
|
|
PteContents.u.Hard.PageFrameNumber = i;
|
|
MI_WRITE_VALID_PTE(PointerPte, PteContents);
|
|
MiInitializePfn(i, PointerPte, 1L);
|
|
NumberOfEntriesMapped += PAGE_SIZE / sizeof(MMWSLE);
|
|
}
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
|
|
// Initialize the following slots as free.
|
|
|
|
|
|
WslEntry = MmSystemCacheWsle + 1;
|
|
|
|
for (i = 1; i < NumberOfEntriesMapped; i++) {
|
|
|
|
|
|
// Build the free list, note that the first working
|
|
// set entries (CurrentEntry) are not on the free list.
|
|
// These entries are reserved for the pages which
|
|
// map the working set and the page which contains the PDE.
|
|
|
|
|
|
WslEntry->u1.Long = (i + 1) << MM_FREE_WSLE_SHIFT;
|
|
WslEntry += 1;
|
|
}
|
|
|
|
WslEntry -= 1;
|
|
WslEntry->u1.Long = WSLE_NULL_INDEX << MM_FREE_WSLE_SHIFT; // End of list.
|
|
|
|
MmSystemCacheWorkingSetList->LastInitializedWsle = NumberOfEntriesMapped - 1;
|
|
|
|
|
|
// Build a free list structure in the PTEs for the system cache.
|
|
|
|
|
|
MmSystemCachePteBase = MI_PTE_BASE_FOR_LOWEST_KERNEL_ADDRESS;
|
|
|
|
SizeOfSystemCacheInPages = COMPUTE_PAGES_SPANNED(MmSystemCacheStart,
|
|
(PCHAR)MmSystemCacheEnd - (PCHAR)MmSystemCacheStart + 1);
|
|
|
|
HunksOf256KInCache = SizeOfSystemCacheInPages / (X256K / PAGE_SIZE);
|
|
|
|
PointerPte = MiGetPteAddress(MmSystemCacheStart);
|
|
|
|
MmFirstFreeSystemCache = PointerPte;
|
|
|
|
for (i = 0; i < HunksOf256KInCache; i += 1) {
|
|
PointerPte->u.List.NextEntry = (PointerPte + (X256K / PAGE_SIZE)) - MmSystemCachePteBase;
|
|
PointerPte += X256K / PAGE_SIZE;
|
|
}
|
|
|
|
PointerPte -= X256K / PAGE_SIZE;
|
|
|
|
#if defined(_X86_)
|
|
|
|
|
|
// Add any extended ranges.
|
|
|
|
|
|
if (MiSystemCacheEndExtra != MmSystemCacheEnd) {
|
|
|
|
SizeOfSystemCacheInPages = COMPUTE_PAGES_SPANNED(MiSystemCacheStartExtra,
|
|
(PCHAR)MiSystemCacheEndExtra - (PCHAR)MiSystemCacheStartExtra + 1);
|
|
|
|
HunksOf256KInCache = SizeOfSystemCacheInPages / (X256K / PAGE_SIZE);
|
|
|
|
if (HunksOf256KInCache) {
|
|
|
|
PMMPTE PointerPteExtended;
|
|
|
|
PointerPteExtended = MiGetPteAddress(MiSystemCacheStartExtra);
|
|
PointerPte->u.List.NextEntry = PointerPteExtended - MmSystemCachePteBase;
|
|
PointerPte = PointerPteExtended;
|
|
|
|
for (i = 0; i < HunksOf256KInCache; i += 1) {
|
|
PointerPte->u.List.NextEntry = (PointerPte + (X256K / PAGE_SIZE)) - MmSystemCachePteBase;
|
|
PointerPte += X256K / PAGE_SIZE;
|
|
}
|
|
|
|
PointerPte -= X256K / PAGE_SIZE;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
PointerPte->u.List.NextEntry = MM_EMPTY_PTE_LIST;
|
|
MmLastFreeSystemCache = PointerPte;
|
|
|
|
if (MaximumWorkingSet > ((1536 * 1024) >> PAGE_SHIFT)) {
|
|
|
|
|
|
// The working set list consists of more than a single page.
|
|
|
|
|
|
LOCK_SYSTEM_WS(OldIrql);
|
|
MiGrowWsleHash(&MmSystemCacheWs);
|
|
UNLOCK_SYSTEM_WS(OldIrql);
|
|
}
|
|
}
|
|
|
|
BOOLEAN
|
|
MmCheckCachedPageState(
|
|
IN PVOID Address,
|
|
IN BOOLEAN SetToZero
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine checks the state of the specified page that is mapped in
|
|
the system cache. If the specified virtual address can be made valid
|
|
(i.e., the page is already in memory), it is made valid and the value
|
|
TRUE is returned.
|
|
|
|
If the page is not in memory, and SetToZero is FALSE, the
|
|
value FALSE is returned. However, if SetToZero is TRUE, a page of
|
|
zeroes is materialized for the specified virtual address and the address
|
|
is made valid and the value TRUE is returned.
|
|
|
|
This routine is for usage by the cache manager.
|
|
|
|
Arguments:
|
|
|
|
Address - Supplies the address of a page mapped in the system cache.
|
|
|
|
SetToZero - Supplies TRUE if a page of zeroes should be created in the
|
|
case where no page is already mapped.
|
|
|
|
Return Value:
|
|
|
|
FALSE if there if touching this page would cause a page fault resulting
|
|
in a page read.
|
|
|
|
TRUE if there is a physical page in memory for this address.
|
|
|
|
Environment:
|
|
|
|
Kernel mode.
|
|
|
|
--*/
|
|
|
|
{
|
|
PMMPTE PointerPte;
|
|
PMMPTE PointerPde;
|
|
PMMPTE ProtoPte;
|
|
PFN_NUMBER PageFrameIndex;
|
|
WSLE_NUMBER WorkingSetIndex;
|
|
MMPTE TempPte;
|
|
MMPTE ProtoPteContents;
|
|
PMMPFN Pfn1;
|
|
PMMPFN Pfn2;
|
|
KIRQL OldIrql;
|
|
LOGICAL BarrierNeeded;
|
|
ULONG BarrierStamp;
|
|
|
|
BarrierNeeded = FALSE;
|
|
|
|
PointerPte = MiGetPteAddress(Address);
|
|
|
|
|
|
// Make the PTE valid if possible.
|
|
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
return TRUE;
|
|
}
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
goto UnlockAndReturnTrue;
|
|
}
|
|
|
|
ASSERT(PointerPte->u.Soft.Prototype == 1);
|
|
|
|
ProtoPte = MiPteToProto(PointerPte);
|
|
|
|
|
|
// Pte is not valid, check the state of the prototype PTE.
|
|
|
|
|
|
if (MiMakeSystemAddressValidPfn(ProtoPte)) {
|
|
|
|
|
|
// If page fault occurred, recheck state of original PTE.
|
|
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
goto UnlockAndReturnTrue;
|
|
}
|
|
}
|
|
|
|
ProtoPteContents = *ProtoPte;
|
|
|
|
if (ProtoPteContents.u.Hard.Valid == 1) {
|
|
|
|
PageFrameIndex = MI_GET_PAGE_FRAME_FROM_PTE(&ProtoPteContents);
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
|
|
|
|
// The prototype PTE is valid, make the cache PTE
|
|
// valid and add it to the working set.
|
|
|
|
|
|
TempPte = ProtoPteContents;
|
|
|
|
} else if ((ProtoPteContents.u.Soft.Transition == 1) &&
|
|
(ProtoPteContents.u.Soft.Prototype == 0)) {
|
|
|
|
|
|
// Prototype PTE is in the transition state. Remove the page
|
|
// from the page list and make it valid.
|
|
|
|
|
|
PageFrameIndex = MI_GET_PAGE_FRAME_FROM_TRANSITION_PTE(&ProtoPteContents);
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
if ((Pfn1->u3.e1.ReadInProgress) ||
|
|
(Pfn1->u3.e1.InPageError)) {
|
|
|
|
|
|
// Collided page fault, return.
|
|
|
|
|
|
goto UnlockAndReturnTrue;
|
|
}
|
|
|
|
MiUnlinkPageFromList(Pfn1);
|
|
|
|
Pfn1->u3.e2.ReferenceCount += 1;
|
|
Pfn1->u3.e1.PageLocation = ActiveAndValid;
|
|
|
|
MI_MAKE_VALID_PTE(TempPte,
|
|
PageFrameIndex,
|
|
Pfn1->OriginalPte.u.Soft.Protection,
|
|
NULL);
|
|
|
|
MI_WRITE_VALID_PTE(ProtoPte, TempPte);
|
|
|
|
|
|
// Increment the valid PTE count for the page containing
|
|
// the prototype PTE.
|
|
|
|
|
|
Pfn2 = MI_PFN_ELEMENT(Pfn1->PteFrame);
|
|
|
|
} else {
|
|
|
|
|
|
// Page is not in memory, if a page of zeroes is requested,
|
|
// get a page of zeroes and make it valid.
|
|
|
|
|
|
if ((SetToZero == FALSE) || (MmAvailablePages < 8)) {
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
|
|
// Fault the page into memory.
|
|
|
|
|
|
MmAccessFault(FALSE, Address, KernelMode, (PVOID)0);
|
|
return FALSE;
|
|
}
|
|
|
|
|
|
// Increment the count of Pfn references for the control area
|
|
// corresponding to this file.
|
|
|
|
|
|
MiGetSubsectionAddress(
|
|
ProtoPte)->ControlArea->NumberOfPfnReferences += 1;
|
|
|
|
PageFrameIndex = MiRemoveZeroPage(MI_GET_PAGE_COLOR_FROM_PTE(ProtoPte));
|
|
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
|
|
|
|
// This barrier check is needed after zeroing the page and
|
|
// before setting the PTE (not the prototype PTE) valid.
|
|
// Capture it now, check it at the last possible moment.
|
|
|
|
|
|
BarrierNeeded = TRUE;
|
|
BarrierStamp = (ULONG)Pfn1->PteFrame;
|
|
|
|
MiInitializePfn(PageFrameIndex, ProtoPte, 1);
|
|
Pfn1->u2.ShareCount = 0;
|
|
Pfn1->u3.e1.PrototypePte = 1;
|
|
|
|
MI_MAKE_VALID_PTE(TempPte,
|
|
PageFrameIndex,
|
|
Pfn1->OriginalPte.u.Soft.Protection,
|
|
NULL);
|
|
|
|
MI_WRITE_VALID_PTE(ProtoPte, TempPte);
|
|
}
|
|
|
|
|
|
// Increment the share count since the page is being put into a working
|
|
// set.
|
|
|
|
|
|
Pfn1->u2.ShareCount += 1;
|
|
|
|
if (Pfn1->u1.Event == NULL) {
|
|
Pfn1->u1.Event = (PVOID)PsGetCurrentThread();
|
|
}
|
|
|
|
|
|
// Increment the reference count of the page table
|
|
// page for this PTE.
|
|
|
|
|
|
PointerPde = MiGetPteAddress(PointerPte);
|
|
Pfn2 = MI_PFN_ELEMENT(PointerPde->u.Hard.PageFrameNumber);
|
|
|
|
Pfn2->u2.ShareCount += 1;
|
|
|
|
MI_SET_GLOBAL_STATE(TempPte, 1);
|
|
|
|
#if defined (_WIN64)
|
|
if (MI_DETERMINE_OWNER(PointerPte) == 0) {
|
|
TempPte.u.Long &= ~MM_PTE_OWNER_MASK;
|
|
}
|
|
#else
|
|
TempPte.u.Hard.Owner = MI_DETERMINE_OWNER(PointerPte);
|
|
#endif
|
|
|
|
if (BarrierNeeded) {
|
|
MI_BARRIER_SYNCHRONIZE(BarrierStamp);
|
|
}
|
|
|
|
MI_WRITE_VALID_PTE(PointerPte, TempPte);
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
LOCK_SYSTEM_WS(OldIrql);
|
|
|
|
WorkingSetIndex = MiLocateAndReserveWsle(&MmSystemCacheWs);
|
|
|
|
MiUpdateWsle(&WorkingSetIndex,
|
|
MiGetVirtualAddressMappedByPte(PointerPte),
|
|
MmSystemCacheWorkingSetList,
|
|
Pfn1);
|
|
|
|
MmSystemCacheWsle[WorkingSetIndex].u1.e1.SameProtectAsProto = 1;
|
|
|
|
MI_SET_PTE_IN_WORKING_SET(PointerPte, WorkingSetIndex);
|
|
|
|
UNLOCK_SYSTEM_WS(OldIrql);
|
|
|
|
return TRUE;
|
|
|
|
UnlockAndReturnTrue:
|
|
UNLOCK_PFN(OldIrql);
|
|
return TRUE;
|
|
}
|
|
|
|
NTSTATUS
|
|
MmCopyToCachedPage(
|
|
IN PVOID Address,
|
|
IN PVOID UserBuffer,
|
|
IN ULONG Offset,
|
|
IN SIZE_T CountInBytes,
|
|
IN BOOLEAN DontZero
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine checks the state of the specified page that is mapped in
|
|
the system cache. If the specified virtual address can be made valid
|
|
(i.e., the page is already in memory), it is made valid and the value
|
|
TRUE is returned.
|
|
|
|
If the page is not in memory, and SetToZero is FALSE, the
|
|
value FALSE is returned. However, if SetToZero is TRUE, a page of
|
|
zeroes is materialized for the specified virtual address and the address
|
|
is made valid and the value TRUE is returned.
|
|
|
|
This routine is for usage by the cache manager.
|
|
|
|
Arguments:
|
|
|
|
Address - Supplies the address of a page mapped in the system cache.
|
|
This MUST be a page aligned address!
|
|
|
|
UserBuffer - Supplies the address of a user buffer to copy into the
|
|
system cache at the specified address + offset.
|
|
|
|
Offset - Supplies the offset into the UserBuffer to copy the data.
|
|
|
|
CountInBytes - Supplies the byte count to copy from the user buffer.
|
|
|
|
DontZero - Supplies TRUE if the buffer should not be zeroed (the
|
|
caller will track zeroing). FALSE if it should be zeroed.
|
|
|
|
Return Value:
|
|
|
|
Returns the status of the copy.
|
|
|
|
Environment:
|
|
|
|
Kernel mode, <= APC_LEVEL.
|
|
|
|
--*/
|
|
|
|
{
|
|
PMMPTE PointerPte;
|
|
PMMPTE PointerPde;
|
|
PMMPTE ProtoPte;
|
|
PFN_NUMBER PageFrameIndex;
|
|
WSLE_NUMBER WorkingSetIndex;
|
|
MMPTE TempPte;
|
|
MMPTE ProtoPteContents;
|
|
PMMPFN Pfn1;
|
|
PMMPFN Pfn2;
|
|
KIRQL OldIrql;
|
|
ULONG TransitionState;
|
|
ULONG AddToWorkingSet;
|
|
LOGICAL ShareCountUpped;
|
|
SIZE_T EndFill;
|
|
PVOID Buffer;
|
|
NTSTATUS status;
|
|
PMMINPAGE_SUPPORT Event;
|
|
PCONTROL_AREA ControlArea;
|
|
PETHREAD Thread;
|
|
ULONG SavedState;
|
|
LOGICAL ApcsExplicitlyBlocked;
|
|
LOGICAL ApcNeeded;
|
|
|
|
TransitionState = FALSE;
|
|
AddToWorkingSet = FALSE;
|
|
ApcsExplicitlyBlocked = FALSE;
|
|
ApcNeeded = FALSE;
|
|
|
|
ASSERT(((ULONG_PTR)Address & (PAGE_SIZE - 1)) == 0);
|
|
ASSERT((CountInBytes + Offset) <= PAGE_SIZE);
|
|
ASSERT(KeGetCurrentIrql() < DISPATCH_LEVEL);
|
|
|
|
PointerPte = MiGetPteAddress(Address);
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
goto Copy;
|
|
}
|
|
|
|
|
|
// Touch the user's buffer to make it resident. This is required in
|
|
// order to safely detect the case where both the system and user
|
|
// address are pointing at the same physical page. This case causes
|
|
// a deadlock during the RtlCopyBytes if the inpage support block needed
|
|
// to be allocated and the PTE for the user page is not valid. This
|
|
// potential deadlock is resolved because if the user page causes a
|
|
// collided fault, the initiator thread is checked for. If they are
|
|
// the same, then an exception is thrown by the pager.
|
|
|
|
|
|
try {
|
|
|
|
*(volatile CHAR*)UserBuffer;
|
|
|
|
} except(EXCEPTION_EXECUTE_HANDLER) {
|
|
return GetExceptionCode();
|
|
}
|
|
|
|
|
|
// Make the PTE valid if possible.
|
|
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
Recheck:
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
goto UnlockAndCopy;
|
|
}
|
|
|
|
ASSERT(PointerPte->u.Soft.Prototype == 1);
|
|
|
|
ProtoPte = MiPteToProto(PointerPte);
|
|
|
|
|
|
// Pte is not valid, check the state of the prototype PTE.
|
|
|
|
|
|
if (MiMakeSystemAddressValidPfn(ProtoPte)) {
|
|
|
|
|
|
// If page fault occurred, recheck state of original PTE.
|
|
|
|
|
|
if (PointerPte->u.Hard.Valid == 1) {
|
|
goto UnlockAndCopy;
|
|
}
|
|
}
|
|
|
|
ShareCountUpped = FALSE;
|
|
ProtoPteContents = *ProtoPte;
|
|
|
|
if (ProtoPteContents.u.Hard.Valid == 1) {
|
|
|
|
PageFrameIndex = MI_GET_PAGE_FRAME_FROM_PTE(&ProtoPteContents);
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
|
|
|
|
// Increment the share count so the prototype PTE will remain
|
|
// valid until this can be added into the system's working set.
|
|
|
|
|
|
Pfn1->u2.ShareCount += 1;
|
|
ShareCountUpped = TRUE;
|
|
|
|
|
|
// The prototype PTE is valid, make the cache PTE
|
|
// valid and add it to the working set.
|
|
|
|
|
|
TempPte = ProtoPteContents;
|
|
|
|
} else if ((ProtoPteContents.u.Soft.Transition == 1) &&
|
|
(ProtoPteContents.u.Soft.Prototype == 0)) {
|
|
|
|
|
|
// Prototype PTE is in the transition state. Remove the page
|
|
// from the page list and make it valid.
|
|
|
|
|
|
PageFrameIndex = MI_GET_PAGE_FRAME_FROM_TRANSITION_PTE(&ProtoPteContents);
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
if ((Pfn1->u3.e1.ReadInProgress) ||
|
|
(Pfn1->u3.e1.InPageError)) {
|
|
|
|
|
|
// Collided page fault or in page error, try the copy
|
|
// operation incurring a page fault.
|
|
|
|
|
|
goto UnlockAndCopy;
|
|
}
|
|
|
|
MiUnlinkPageFromList(Pfn1);
|
|
|
|
Pfn1->u3.e2.ReferenceCount += 1;
|
|
Pfn1->u3.e1.PageLocation = ActiveAndValid;
|
|
Pfn1->u3.e1.Modified = 1;
|
|
ASSERT(Pfn1->u2.ShareCount == 0);
|
|
Pfn1->u2.ShareCount += 1;
|
|
ShareCountUpped = TRUE;
|
|
|
|
MI_MAKE_VALID_PTE(TempPte,
|
|
PageFrameIndex,
|
|
Pfn1->OriginalPte.u.Soft.Protection,
|
|
NULL);
|
|
MI_SET_PTE_DIRTY(TempPte);
|
|
|
|
MI_WRITE_VALID_PTE(ProtoPte, TempPte);
|
|
|
|
|
|
// Increment the valid pte count for the page containing
|
|
// the prototype PTE.
|
|
|
|
|
|
} else {
|
|
|
|
|
|
// Page is not in memory, if a page of zeroes is requested,
|
|
// get a page of zeroes and make it valid.
|
|
|
|
|
|
if (MiEnsureAvailablePageOrWait(NULL, NULL)) {
|
|
|
|
|
|
// A wait operation occurred which could have changed the
|
|
// state of the PTE. Recheck the PTE state.
|
|
|
|
|
|
goto Recheck;
|
|
}
|
|
|
|
Event = MiGetInPageSupportBlock();
|
|
if (Event == NULL) {
|
|
UNLOCK_PFN(OldIrql);
|
|
KeDelayExecutionThread(KernelMode, FALSE, (PLARGE_INTEGER)&MmShortTime);
|
|
LOCK_PFN(OldIrql);
|
|
goto Recheck;
|
|
}
|
|
|
|
|
|
// Increment the count of Pfn references for the control area
|
|
// corresponding to this file.
|
|
|
|
|
|
ControlArea = MiGetSubsectionAddress(ProtoPte)->ControlArea;
|
|
ControlArea->NumberOfPfnReferences += 1;
|
|
if (ControlArea->NumberOfUserReferences > 0) {
|
|
|
|
|
|
// There is a user reference to this file, always zero ahead.
|
|
|
|
|
|
DontZero = FALSE;
|
|
}
|
|
|
|
|
|
// Remove any page from the list and turn it into a transition
|
|
// page in the cache with read in progress set. This causes
|
|
// any other references to this page to block on the specified
|
|
// event while the copy operation to the cache is on-going.
|
|
|
|
|
|
PageFrameIndex = MiRemoveAnyPage(MI_GET_PAGE_COLOR_FROM_PTE(ProtoPte));
|
|
|
|
Pfn1 = MI_PFN_ELEMENT(PageFrameIndex);
|
|
|
|
|
|
// Increment the valid PTE count for the page containing
|
|
// the prototype PTE.
|
|
|
|
|
|
MiInitializeTransitionPfn(PageFrameIndex, ProtoPte, 0xFFFFFFFF);
|
|
|
|
Pfn1->u2.ShareCount = 0;
|
|
|
|
Pfn1->u3.e2.ReferenceCount = 0; // for the add_locked_page macro
|
|
MI_ADD_LOCKED_PAGE_CHARGE_FOR_MODIFIED_PAGE(Pfn1, 24);
|
|
|
|
Pfn1->u3.e2.ReferenceCount = 1;
|
|
Pfn1->u3.e1.PrototypePte = 1;
|
|
Pfn1->u3.e1.Modified = 1;
|
|
Pfn1->u3.e1.ReadInProgress = 1;
|
|
Pfn1->u1.Event = &Event->Event;
|
|
Event->Pfn = Pfn1;
|
|
|
|
|
|
// This is needed in case a special kernel APC fires that ends up
|
|
// referencing the same page (this may even be through a different
|
|
// virtual address from the user/system one here).
|
|
|
|
|
|
Thread = PsGetCurrentThread();
|
|
ASSERT(Thread->NestedFaultCount <= 1);
|
|
Thread->NestedFaultCount += 1;
|
|
|
|
TransitionState = TRUE;
|
|
|
|
MI_MAKE_VALID_PTE(TempPte,
|
|
PageFrameIndex,
|
|
Pfn1->OriginalPte.u.Soft.Protection,
|
|
NULL);
|
|
MI_SET_PTE_DIRTY(TempPte);
|
|
|
|
|
|
// APCs must be explicitly disabled to prevent suspend APCs from
|
|
// interrupting this thread before the RtlCopyBytes completes.
|
|
// Otherwise this page can remain in transition indefinitely (until
|
|
// the suspend APC is released) which blocks any other threads that
|
|
// may reference it.
|
|
|
|
|
|
KeEnterCriticalRegion();
|
|
ApcsExplicitlyBlocked = TRUE;
|
|
}
|
|
|
|
|
|
// Increment the share count of the page table page for this PTE.
|
|
|
|
|
|
PointerPde = MiGetPteAddress(PointerPte);
|
|
Pfn2 = MI_PFN_ELEMENT(PointerPde->u.Hard.PageFrameNumber);
|
|
|
|
Pfn2->u2.ShareCount += 1;
|
|
|
|
MI_SET_GLOBAL_STATE(TempPte, 1);
|
|
#if defined (_WIN64)
|
|
if (MI_DETERMINE_OWNER(PointerPte) == 0) {
|
|
TempPte.u.Long &= ~MM_PTE_OWNER_MASK;
|
|
}
|
|
#else
|
|
TempPte.u.Hard.Owner = MI_DETERMINE_OWNER(PointerPte);
|
|
#endif
|
|
MI_WRITE_VALID_PTE(PointerPte, TempPte);
|
|
|
|
AddToWorkingSet = TRUE;
|
|
|
|
UnlockAndCopy:
|
|
|
|
|
|
// Unlock the PFN database and perform the copy.
|
|
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
Copy:
|
|
|
|
Thread = PsGetCurrentThread();
|
|
MmSavePageFaultReadAhead(Thread, &SavedState);
|
|
MmSetPageFaultReadAhead(Thread, 0);
|
|
status = STATUS_SUCCESS;
|
|
|
|
|
|
// Copy the user buffer into the cache under an exception handler.
|
|
|
|
|
|
try {
|
|
|
|
Buffer = (PVOID)((PCHAR)Address + Offset);
|
|
RtlCopyBytes(Buffer, UserBuffer, CountInBytes);
|
|
|
|
if (TransitionState) {
|
|
|
|
|
|
// Only zero the memory outside the range if a page was taken
|
|
// from the free list.
|
|
|
|
|
|
if (Offset != 0) {
|
|
RtlZeroMemory(Address, Offset);
|
|
}
|
|
|
|
if (DontZero == FALSE) {
|
|
EndFill = PAGE_SIZE - (Offset + CountInBytes);
|
|
|
|
if (EndFill != 0) {
|
|
Buffer = (PVOID)((PCHAR)Buffer + CountInBytes);
|
|
RtlZeroMemory(Buffer, EndFill);
|
|
}
|
|
}
|
|
}
|
|
} except(MiMapCacheExceptionFilter(&status, GetExceptionInformation())) {
|
|
|
|
if (status == STATUS_MULTIPLE_FAULT_VIOLATION) {
|
|
ASSERT(TransitionState == TRUE);
|
|
}
|
|
|
|
|
|
// Zero out the page if it came from the free list.
|
|
|
|
|
|
if (TransitionState) {
|
|
RtlZeroMemory(Address, PAGE_SIZE);
|
|
}
|
|
}
|
|
|
|
MmResetPageFaultReadAhead(Thread, SavedState);
|
|
|
|
if (AddToWorkingSet) {
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
if (ApcsExplicitlyBlocked == TRUE) {
|
|
KeLeaveCriticalRegion();
|
|
}
|
|
|
|
ASSERT(Pfn1->u3.e2.ReferenceCount != 0);
|
|
ASSERT(Pfn1->PteAddress == ProtoPte);
|
|
|
|
if (TransitionState) {
|
|
|
|
|
|
// This is a newly allocated page.
|
|
|
|
|
|
ASSERT(ShareCountUpped == FALSE);
|
|
ASSERT(Pfn1->u2.ShareCount <= 1);
|
|
ASSERT(Pfn1->u1.Event == &Event->Event);
|
|
|
|
MiMakeSystemAddressValidPfn(ProtoPte);
|
|
MI_SET_GLOBAL_STATE(TempPte, 0);
|
|
MI_WRITE_VALID_PTE(ProtoPte, TempPte);
|
|
Pfn1->u1.Event = (PVOID)PsGetCurrentThread();
|
|
ASSERT(Pfn1->u3.e2.ReferenceCount != 0);
|
|
ASSERT(Pfn1->PteFrame != MI_MAGIC_AWE_PTEFRAME);
|
|
|
|
ASSERT(Event->Completed == FALSE);
|
|
Event->Completed = TRUE;
|
|
|
|
ASSERT(Pfn1->u2.ShareCount == 0);
|
|
MI_REMOVE_LOCKED_PAGE_CHARGE(Pfn1, 41);
|
|
Pfn1->u3.e1.PageLocation = ActiveAndValid;
|
|
|
|
ASSERT(Pfn1->u3.e1.ReadInProgress == 1);
|
|
Pfn1->u3.e1.ReadInProgress = 0;
|
|
|
|
|
|
// Increment the share count since the page is
|
|
// being put into a working set.
|
|
|
|
|
|
Pfn1->u2.ShareCount += 1;
|
|
|
|
if (Event->WaitCount != 1) {
|
|
Event->IoStatus.Status = STATUS_SUCCESS;
|
|
Event->IoStatus.Information = 0;
|
|
KeSetEvent(&Event->Event, 0, FALSE);
|
|
}
|
|
|
|
MiFreeInPageSupportBlock(Event);
|
|
if (DontZero != FALSE) {
|
|
MI_ADD_LOCKED_PAGE_CHARGE(Pfn1, 40);
|
|
Pfn1->u3.e2.ReferenceCount += 1;
|
|
status = STATUS_CACHE_PAGE_LOCKED;
|
|
}
|
|
|
|
ASSERT(Thread->NestedFaultCount <= 3);
|
|
ASSERT(Thread->NestedFaultCount != 0);
|
|
|
|
Thread->NestedFaultCount -= 1;
|
|
|
|
if ((Thread->ApcNeeded == 1) && (Thread->NestedFaultCount == 0)) {
|
|
ApcNeeded = TRUE;
|
|
Thread->ApcNeeded = 0;
|
|
}
|
|
|
|
} else {
|
|
|
|
|
|
// This is either a frame that was originally on the transition list
|
|
// or was already valid when this routine began execution. Either
|
|
// way, the share count (and therefore the systemwide locked pages
|
|
// count) has been dealt with.
|
|
|
|
|
|
ASSERT(ShareCountUpped == TRUE);
|
|
|
|
if (Pfn1->u1.Event == NULL) {
|
|
Pfn1->u1.Event = (PVOID)PsGetCurrentThread();
|
|
}
|
|
}
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
|
|
LOCK_SYSTEM_WS(OldIrql);
|
|
|
|
WorkingSetIndex = MiLocateAndReserveWsle(&MmSystemCacheWs);
|
|
|
|
MiUpdateWsle(&WorkingSetIndex,
|
|
MiGetVirtualAddressMappedByPte(PointerPte),
|
|
MmSystemCacheWorkingSetList,
|
|
Pfn1);
|
|
|
|
MmSystemCacheWsle[WorkingSetIndex].u1.e1.SameProtectAsProto = 1;
|
|
|
|
MI_SET_PTE_IN_WORKING_SET(PointerPte, WorkingSetIndex);
|
|
|
|
UNLOCK_SYSTEM_WS(OldIrql);
|
|
|
|
if (ApcNeeded == TRUE) {
|
|
ASSERT(OldIrql < APC_LEVEL);
|
|
ASSERT(Thread->NestedFaultCount == 0);
|
|
ASSERT(Thread->ApcNeeded == 0);
|
|
KeRaiseIrql(APC_LEVEL, &OldIrql);
|
|
IoRetryIrpCompletions();
|
|
KeLowerIrql(OldIrql);
|
|
}
|
|
} else {
|
|
ASSERT(ApcsExplicitlyBlocked == FALSE);
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
LONG
|
|
MiMapCacheExceptionFilter(
|
|
IN PNTSTATUS Status,
|
|
IN PEXCEPTION_POINTERS ExceptionPointer
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine is a filter for exceptions during copying data
|
|
from the user buffer to the system cache. It stores the
|
|
status code from the exception record into the status argument.
|
|
In the case of an in page i/o error it returns the actual
|
|
error code and in the case of an access violation it returns
|
|
STATUS_INVALID_USER_BUFFER.
|
|
|
|
Arguments:
|
|
|
|
Status - Returns the status from the exception record.
|
|
|
|
ExceptionCode - Supplies the exception code to being checked.
|
|
|
|
Return Value:
|
|
|
|
ULONG - returns EXCEPTION_EXECUTE_HANDLER
|
|
|
|
--*/
|
|
|
|
{
|
|
NTSTATUS local;
|
|
|
|
local = ExceptionPointer->ExceptionRecord->ExceptionCode;
|
|
|
|
|
|
// If the exception is STATUS_IN_PAGE_ERROR, get the I/O error code
|
|
// from the exception record.
|
|
|
|
|
|
if (local == STATUS_IN_PAGE_ERROR) {
|
|
if (ExceptionPointer->ExceptionRecord->NumberParameters >= 3) {
|
|
local = (NTSTATUS)ExceptionPointer->ExceptionRecord->ExceptionInformation[2];
|
|
}
|
|
}
|
|
|
|
if (local == STATUS_ACCESS_VIOLATION) {
|
|
local = STATUS_INVALID_USER_BUFFER;
|
|
}
|
|
|
|
*Status = local;
|
|
return EXCEPTION_EXECUTE_HANDLER;
|
|
}
|
|
|
|
|
|
VOID
|
|
MmUnlockCachedPage(
|
|
IN PVOID AddressInCache
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This routine unlocks a previous locked cached page.
|
|
|
|
Arguments:
|
|
|
|
AddressInCache - Supplies the address where the page was locked
|
|
in the system cache. This must be the same
|
|
address that MmCopyToCachedPage was called with.
|
|
|
|
Return Value:
|
|
|
|
None.
|
|
|
|
--*/
|
|
|
|
{
|
|
PMMPTE PointerPte;
|
|
PMMPFN Pfn1;
|
|
KIRQL OldIrql;
|
|
|
|
PointerPte = MiGetPteAddress(AddressInCache);
|
|
|
|
ASSERT(PointerPte->u.Hard.Valid == 1);
|
|
Pfn1 = MI_PFN_ELEMENT(PointerPte->u.Hard.PageFrameNumber);
|
|
|
|
LOCK_PFN(OldIrql);
|
|
|
|
if (Pfn1->u3.e2.ReferenceCount <= 1) {
|
|
KeBugCheckEx(MEMORY_MANAGEMENT,
|
|
0x777,
|
|
(ULONG_PTR)PointerPte->u.Hard.PageFrameNumber,
|
|
Pfn1->u3.e2.ReferenceCount,
|
|
(ULONG_PTR)AddressInCache);
|
|
return;
|
|
}
|
|
|
|
MI_REMOVE_LOCKED_PAGE_CHARGE(Pfn1, 25);
|
|
Pfn1->u3.e2.ReferenceCount -= 1;
|
|
|
|
UNLOCK_PFN(OldIrql);
|
|
return;
|
|
}
|