883 lines
22 KiB
C
883 lines
22 KiB
C
/*++
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Copyright (c) 1992 Microsoft Corporation
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Module Name:
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ppcmach.c
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Abstract:
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This file contains the PPC601 specific code for dealing with
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the process of stepping a single instruction. This includes
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determination of the next offset to be stopped at and if the
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instruction is all call type instruction.
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Author:
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Kent Forschmiedt (kentf)
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Farooq Butt (fmbutt@engage.sps.mot.com)
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Environment:
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Win32 - User
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--*/
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#include "precomp.h"
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#pragma hdrstop
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//setup a couple of macros
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// The below macro is used to do subscripting operations
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// len_item is the length of the embedded word that we are
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// interested in subscripting
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#define NTH_BIT(word,n,len_item) \
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( ((word) >> ((len_item) - (n) - 1)) & 0x01)
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// Stuff for debug registers
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// The debug register architecture is represented to NT as
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// nearly identical to the x86.
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// As of this writing, there is one debug register, and it only
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// supports a data length of 8.
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typedef struct _DR7 *PDR7;
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typedef struct _DR7 {
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DWORD L0 : 1;
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DWORD G0 : 1;
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DWORD L1 : 1;
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DWORD G1 : 1;
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DWORD L2 : 1;
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DWORD G2 : 1;
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DWORD L3 : 1;
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DWORD G3 : 1;
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DWORD LE : 1;
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DWORD GE : 1;
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DWORD Pad1 : 3;
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DWORD GD : 1;
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DWORD Pad2 : 1;
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DWORD Pad3 : 1;
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DWORD Rwe0 : 2;
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DWORD Len0 : 2;
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DWORD Rwe1 : 2;
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DWORD Len1 : 2;
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DWORD Rwe2 : 2;
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DWORD Len2 : 2;
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DWORD Rwe3 : 2;
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DWORD Len3 : 2;
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} DR7;
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#define RWE_EXEC 0x00
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#define RWE_WRITE 0x01
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#define RWE_RESERVED 0x02
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#define RWE_READWRITE 0x03
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DWORD LenMask[ MAX_DEBUG_REG_DATA_SIZE + 1 ] = DEBUG_REG_LENGTH_MASKS;
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extern LPDM_MSG LpDmMsg;
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BOOL IsRet(HTHDX hthd, LPADDR addr)
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{
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DWORD instr;
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DWORD cBytes;
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if (!AddrReadMemory( hthd->hprc, hthd, addr, &instr, 4, &cBytes )) {
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return FALSE;
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}
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return (instr == 0x4e800020); // bclr branch always
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}
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void
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IsCall (
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HTHDX hthd,
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LPADDR lpaddr,
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LPINT lpf,
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BOOL fStepOver
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)
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/*++
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Routine Description:
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IsCall
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Arguments:
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hthd - Supplies the handle to the thread
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lpaddr - Supplies the address to be check for a call instruction
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lpf - Returns class of instruction:
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CALL
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BREAKPOINT_INSTRUCTION
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SOFTWARE_INTERRUPT
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FALSE
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fStepOver
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--*/
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{
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ULONG opcode;
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ADDR iaraddr = *lpaddr;
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DWORD length;
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PPC_INSTRUCTION disinstr;
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BOOL r;
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if (hthd->fIsCallDone) {
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*lpaddr = hthd->addrIsCall;
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*lpf = hthd->iInstrIsCall;
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return;
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}
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/*
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* Assume that this is not a call instruction
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*/
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*lpf = FALSE;
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/*
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* Read in the dword which contains the instruction under
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* inspection.
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*/
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r = AddrReadMemory(hthd->hprc, hthd, &iaraddr, &disinstr.Long, sizeof(DWORD), &length);
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if (!r || length != sizeof(DWORD)) {
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goto done;
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}
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opcode = disinstr.Primary_Op;
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/* Do we have a branch or is this a breakpoint ? If it is a
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breakpoint, is it set by the user or was it set by the
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debugger ? If all else fails return FALSE */
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switch (opcode)
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{
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default:
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DPRINT(5,("IsCall opcode == DEFAULT"));
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break; // leaving *lpf = FALSE
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case BC_OP:
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DPRINT(5,("IsCall opcode == BC_OP"));
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// branch conditional NEVER a call
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break; // leaving *lpf == FALSE
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case B_OP:
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DPRINT(5,("IsCall opcode == B_OP"));
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// unconditional branch, could be a call
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// THIS is the real call operation if LK == 1
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if ((disinstr.Long & 1) == 1)
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{
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// LK is on, we have a call
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*lpf = INSTR_IS_CALL;
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}
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break; // leaving *lpf = FALSE if not call...
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case X19_OP:
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DPRINT(5,("IsCall opcode == X19_OP"));
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// branch conditional on register (various extended opcodes)
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// This could be a function call if it is a
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// BCCTRL
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if ((disinstr.XLform_XO == BCCTR_OP) &&
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((disinstr.Long & 1) == 1)) {
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*lpf = INSTR_IS_CALL;
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}
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// don't call BLR a call instruction
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if (disinstr.XLform_XO == BCLR_OP && disinstr.Long != 0x4e800020) {
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*lpf = INSTR_IS_CALL;
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}
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break; // leaving *lpf = FALSE if not BCCTRL
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case TWI_OP:
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DPRINT(5,("IsCall opcode == TWI_OP"));
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// Is this TWI instruction installed by the debugger or
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// was it a user installed one ?
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// First make sure this is a BREAK
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if (disinstr.Dform_TO == 0x1f) // All 1's in the TO field
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{
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switch(disinstr.Dform_SI)
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{
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case DEBUG_PRINT_BREAKPOINT:
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case DEBUG_PROMPT_BREAKPOINT:
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case DEBUG_STOP_BREAKPOINT:
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case DEBUG_LOAD_SYMBOLS_BREAKPOINT:
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case DEBUG_UNLOAD_SYMBOLS_BREAKPOINT:
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*lpf = INSTR_BREAKPOINT;
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DPRINT(5,("IsCall opcode was an INSTR_BREAKPOINT"));
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break;
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default:
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*lpf = INSTR_SOFT_INTERRUPT;
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DPRINT(5,("IsCall opcode was a INSTR_SOFT_INTERRUPT"));
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break;
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}
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}
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}
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DPRINT(1, ("(IsCall?) FIR=%08x Type=%s\n", iaraddr.addr.off,
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*lpf==INSTR_IS_CALL ?"CALL":
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(*lpf==INSTR_BREAKPOINT?"BREAKPOINT":
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(*lpf==INSTR_SOFT_INTERRUPT ?"INTERRUPT":
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"NORMAL"))));
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done:
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if (*lpf==INSTR_IS_CALL) {
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lpaddr->addr.off += BP_SIZE;
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hthd->addrIsCall = *lpaddr;
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} else if ( *lpf==INSTR_SOFT_INTERRUPT ) {
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lpaddr->addr.off += BP_SIZE;
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}
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hthd->iInstrIsCall = *lpf;
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return;
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}/* IsCall() */
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#ifndef KERNEL
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void
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ProcessGetDRegsCmd(
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HPRCX hprc,
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HTHDX hthd,
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LPDBB lpdbb
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)
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{
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LPDWORD lpdw = (LPDWORD)LpDmMsg->rgb;
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CONTEXT cxt;
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int rs = 0;
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DEBUG_PRINT( "ProcessGetDRegsCmd :\n");
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if (hthd == 0) {
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rs = 0;
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} else {
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cxt.ContextFlags = CONTEXT_DEBUG_REGISTERS;
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if (!GetThreadContext(hthd->rwHand, &cxt)) {
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LpDmMsg->xosdRet = xosdUnknown;
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rs = 0;
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} else {
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lpdw[0] = hthd->context.Dr0;
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lpdw[1] = hthd->context.Dr1;
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lpdw[2] = hthd->context.Dr2;
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lpdw[3] = hthd->context.Dr3;
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lpdw[4] = hthd->context.Dr6;
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lpdw[5] = hthd->context.Dr7;
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LpDmMsg->xosdRet = xosdNone;
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rs = sizeof(CONTEXT);
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}
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}
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Reply( rs, LpDmMsg, lpdbb->hpid );
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}/* ProcessGetDRegsCmd() */
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void
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ProcessSetDRegsCmd(
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HPRCX hprc,
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HTHDX hthd,
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LPDBB lpdbb
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)
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{
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LPDWORD lpdw = (LPDWORD)(lpdbb->rgbVar);
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XOSD xosd = xosdNone;
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Unreferenced(hprc);
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DPRINT(5, ("ProcessSetDRegsCmd : "));
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hthd->context.ContextFlags = CONTEXT_DEBUG_REGISTERS;
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hthd->context.Dr0 = lpdw[0];
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hthd->context.Dr1 = lpdw[1];
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hthd->context.Dr2 = lpdw[2];
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hthd->context.Dr3 = lpdw[3];
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hthd->context.Dr6 = lpdw[4];
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hthd->context.Dr7 = lpdw[5];
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if (hthd->fWowEvent) {
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WOWSetThreadContext(hthd, &hthd->context);
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} else {
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SetThreadContext(hthd->rwHand, &hthd->context);
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}
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Reply(0, &xosd, lpdbb->hpid);
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}/* ProcessSetDRegsCmd() */
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DWORDLONG
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GetFunctionResult(
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PCALLSTRUCT pcs
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)
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{
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return pcs->context.Gpr3;
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}
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VOID
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vCallFunctionHelper(
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HTHDX hthd,
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FARPROC lpFunction,
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int cArgs,
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va_list vargs
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)
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{
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int i;
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assert(Is64PtrSE(lpFunction));
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for (i = 0; i < cArgs; i++) {
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(&hthd->context.Gpr3)[i] = va_arg(vargs, DWORD);
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}
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hthd->context.Lr = PC(hthd);
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Set_PC(hthd, lpFunction);
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hthd->fContextDirty = TRUE;
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}
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BOOL
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GetWndProcMessage(
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HTHDX hthd,
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UINT* pmsg
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)
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/*++
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Routine Description:
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This function is used to get the current Windows message (WM_CREATE, etc)
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when execution has been stopped at a wndproc.
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Return Value:
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False on failure; True otherwise.
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--*/
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{
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*pmsg = (UINT)hthd->context.Gpr4;
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return TRUE;
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}
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#endif // !KERNEL
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ULONG PpcGetNextOffset (HTHDX hthd, BOOL fStep)
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/*++
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Routine Description:
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From a limited disassembly of the instruction pointed
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by the IAR register, compute the offset of the next
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instruction for either a trace or step operation.
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Arguments:
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hthd - Supplies the handle to the thread to get the next offset for
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fStep - Supplies TRUE for STEP offset and FALSE for trace offset
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Return Value:
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Offset to place breakpoint at for doing a STEP or TRACE
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--*/
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{
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ULONG returnvalue;
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ULONG opcode;
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ADDR iaraddr;
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DWORD length;
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ULONG *regArray = &hthd->context.Gpr0;
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PPC_INSTRUCTION disinstr;
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ULONG absolute;
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ULONG cr,ctr,lr,cond_ok=0,ctr_ok=0;
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BOOL r;
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AddrFromHthdx(&iaraddr, hthd);
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r = AddrReadMemory(hthd->hprc, hthd, &iaraddr, &disinstr.Long, sizeof(DWORD), &length);
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opcode = disinstr.Primary_Op;
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DPRINT(5,("Entered GetNextOffset routine, the address we start with is "
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"0x%I64x\n\tThe instruction is 0x%x",
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iaraddr.addr.off,
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disinstr.Long));
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// setup default return value
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returnvalue = iaraddr.addr.off + sizeof(ULONG);
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// setup the absolute flag in case of a branch
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absolute = (int) ((disinstr.Long >> 1) & 1);
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// Before going into the switch, let us do some up front
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// calculations
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/* Let us use the algorithm described in pp 10-22 of
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the MPC/601 users manual */
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ctr = hthd->context.Ctr;
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cr = hthd->context.Cr;
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/* First find out whether the CTR has to be decremented */
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if (NTH_BIT(disinstr.Bform_BO,2,5) == 0)
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// i.e if ~B0[2] then ctr = ctr - 1
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ctr = ctr - 1;
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// next we do the following operation:
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// ctr_ok = BO[2] OR ((ctr NEQ 0) XOR BO[3]))
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ctr_ok = (NTH_BIT(disinstr.Bform_BO,2,5) || ((ctr != 0) ^ (NTH_BIT(disinstr.Bform_BO,3,5))));
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// now for
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// cond_ok= BO[0] OR ( (CR[BI] LEQIV BO[1]))
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cond_ok = ((NTH_BIT(disinstr.Bform_BO,0,5)) ||
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((NTH_BIT(cr,(disinstr.Bform_BI),32)) ==
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(NTH_BIT(disinstr.Bform_BO,1,5))));
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switch (opcode)
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{
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case SC_OP:
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DPRINT(5,("We have an SC_OP"));
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// stepping over a syscall instruction must set the breakpoint
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// at the inst after the syscall (default)
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break;
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case B_OP:
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DPRINT(5,("We have an B_OP"));
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// unconditional branch found
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// no need to chase down branch targets unless you are
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// tracing (i.e. NOT stepping over functions).
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// Of course the whole test about stepping etc. only
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// makes sense if you are stepping over a FUNCTION CALL
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// i.e. a branch and link operation
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if (!fStep) {
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if (absolute) {
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/* LI can only address words not bytes so << 2 */
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returnvalue = disinstr.Iform_LI << 2;
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} else {
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returnvalue = (disinstr.Iform_LI << 2) + iaraddr.addr.off;
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}
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}
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break;
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case BC_OP:
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DPRINT(5,("We have a BC_OP"));
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/* We got a branch conditional, if it evaluates to true,
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let us set return to the target. Otherwise
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let us leave the default returnvalue in place */
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/* << 2 bits since we address words */
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if (ctr_ok && cond_ok) {
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if (absolute) {
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returnvalue = disinstr.Bform_BD << 2;
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} else {
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returnvalue = (disinstr.Bform_BD << 2)+iaraddr.addr.off;
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}
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}
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break;
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case X19_OP:
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DPRINT(5,("We have an X19_OP"));
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if (disinstr.XLform_XO == BCLR_OP) {
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lr = hthd->context.Lr;
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if (ctr_ok && cond_ok) {
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returnvalue = lr & ~3; // remember, we address words
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// not bytes thus ~3
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}
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} else if (disinstr.XLform_XO == BCCTR_OP) {
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if (cond_ok) {
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returnvalue = ctr & ~3;
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}
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}
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break;
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default:
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DPRINT(5,("We have an unhandled DEFAULT op"));
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break;
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}
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return returnvalue;
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}/* GetNextOffset() */
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XOSD
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SetupFunctionCall(
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LPEXECUTE_OBJECT_DM lpeo,
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LPEXECUTE_STRUCT lpes
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)
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{
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/*
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* Can only execute functions on the current stopped thread. Therefore
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* assert that the current thread is stopped.
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*/
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assert(lpeo->hthd->tstate & ts_stopped);
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if (!(lpeo->hthd->tstate & ts_stopped)) {
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return xosdBadThread;
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}
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/*
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* Now get the current stack offset.
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*/
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lpeo->addrStack.addr.off = lpeo->hthd->context.Gpr1;
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/*
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* Now place the return address correctly
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*/
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lpeo->hthd->context.Iar = lpeo->hthd->context.Lr =
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lpeo->addrStart.addr.off;
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/*
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* Set the instruction pointer to the starting addresses
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* and write the context back out
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*/
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lpeo->hthd->context.Iar = lpeo->addrStart.addr.off;
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lpeo->hthd->fContextDirty = TRUE;
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return xosdNone;
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}
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BOOL CompareStacks(LPEXECUTE_OBJECT_DM lpeo)
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/*++
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Routine Description:
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This routine is used to determine if the stack pointers are currect for terminating function evaluation.
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Arguments:
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lpeo - Supplies the pointer to the DM Execute Object description
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Return Value:
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TRUE if the evaluation is to be terminated and FALSE otherwise
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--*/
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{
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if (lpeo->addrStack.addr.off <= lpeo->hthd->context.Gpr1) {
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return TRUE;
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}
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return FALSE;
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}/* CompareStacks() */
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BOOL
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ProcessFrameStackWalkNextCmd(
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HPRCX hprc,
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HTHDX hthd,
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PCONTEXT context,
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LPVOID pctxPtrs
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)
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{
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return FALSE;
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}
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#if 0
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DWORD BranchUnassemble(
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void *Memory,
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ADDR *Addr,
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BOOL *IsBranch,
|
|
BOOL *TargetKnown,
|
|
BOOL *IsCall,
|
|
BOOL *IsTable,
|
|
ADDR *Target
|
|
)
|
|
{
|
|
ULONG opcode, absolute=FALSE, linkbit_on=FALSE;
|
|
PPC_INSTRUCTION disinstr;
|
|
UOFF32 Offset;
|
|
UOFF32 TargetOffset;
|
|
|
|
assert( Memory );
|
|
assert( IsBranch );
|
|
assert( TargetKnown );
|
|
assert( IsCall );
|
|
assert( Target );
|
|
|
|
Offset = GetAddrOff(*Addr);
|
|
TargetOffset = 0;
|
|
*IsBranch = FALSE;
|
|
*IsTable = FALSE;
|
|
disinstr.Long = * (PULONG ) Memory;
|
|
|
|
// Is the absolute bit on ?
|
|
absolute = (int) ((disinstr.Long >> 1) & 1);
|
|
|
|
// Is the link bit on ?
|
|
linkbit_on = (int) ((disinstr.Long & 1));
|
|
|
|
opcode = disinstr.Primary_Op;
|
|
|
|
switch (opcode)
|
|
{
|
|
default:
|
|
break;
|
|
case BC_OP:
|
|
*IsCall= linkbit_on;
|
|
*IsBranch = TRUE;
|
|
*TargetKnown = TRUE;
|
|
if (absolute)
|
|
TargetOffset = disinstr.Bform_BD << 2;
|
|
else
|
|
TargetOffset = (disinstr.Bform_BD << 2)+ Offset;
|
|
break;
|
|
case B_OP:
|
|
*IsCall= linkbit_on;
|
|
*IsBranch = TRUE;
|
|
*TargetKnown = TRUE;
|
|
if (absolute)
|
|
TargetOffset = disinstr.Iform_LI << 2;
|
|
else
|
|
TargetOffset = (disinstr.Iform_LI << 2) + Offset;
|
|
break;
|
|
case X19_OP:
|
|
// branch conditional on register (various extended opcodes)
|
|
*IsCall = linkbit_on;
|
|
*IsBranch = TRUE;
|
|
*TargetKnown = FALSE;
|
|
TargetOffset = 0;
|
|
break;
|
|
}
|
|
|
|
AddrInit(Target, 0, 0, TargetOffset, TRUE, TRUE, FALSE, FALSE);
|
|
return(sizeof(DWORD));
|
|
}
|
|
|
|
|
|
#endif
|
|
|
|
|
|
BOOL
|
|
SetupDebugRegister(
|
|
HTHDX hthd,
|
|
int Register,
|
|
int DataSize,
|
|
DWORD DataAddr,
|
|
DWORD BpType
|
|
)
|
|
{
|
|
DWORD Len;
|
|
DWORD rwMask;
|
|
|
|
#ifdef KERNEL
|
|
KSPECIAL_REGISTERS ksr;
|
|
PDWORD Dr0 = &ksr.KernelDr0;
|
|
PDWORD Dr1 = &ksr.KernelDr1;
|
|
PDWORD Dr2 = &ksr.KernelDr2;
|
|
PDWORD Dr3 = &ksr.KernelDr3;
|
|
PDR7 Dr7 = (PDR7)&(ksr.KernelDr7);
|
|
#else
|
|
CONTEXT Context;
|
|
PDWORD Dr0 = &Context.Dr0;
|
|
PDWORD Dr1 = &Context.Dr1;
|
|
PDWORD Dr2 = &Context.Dr2;
|
|
PDWORD Dr3 = &Context.Dr3;
|
|
PDR7 Dr7 = (PDR7)&(Context.Dr7);
|
|
#endif
|
|
|
|
// ppc currently only supports 1
|
|
assert(Register == 1);
|
|
|
|
#ifdef KERNEL
|
|
if (!GetExtendedContext(hthd, &ksr))
|
|
#else
|
|
Context.ContextFlags = CONTEXT_DEBUG_REGISTERS;
|
|
if (!GetThreadContext(hthd->rwHand, &Context))
|
|
#endif
|
|
{
|
|
return FALSE;
|
|
}
|
|
|
|
Len = LenMask[ DataSize ];
|
|
|
|
switch ( BpType ) {
|
|
case bptpDataR:
|
|
rwMask = RWE_READWRITE;
|
|
break;
|
|
case bptpDataW:
|
|
case bptpDataC:
|
|
rwMask = RWE_WRITE;
|
|
break;
|
|
case bptpDataExec:
|
|
rwMask = RWE_EXEC;
|
|
// length must be 0 for exec bp
|
|
Len = 0;
|
|
break;
|
|
default:
|
|
assert(!"Invalid BpType!!");
|
|
break;
|
|
}
|
|
|
|
switch( Register ) {
|
|
case 0:
|
|
*Dr0 = DataAddr;
|
|
Dr7->Len0 = Len;
|
|
Dr7->Rwe0 = rwMask;
|
|
Dr7->L0 = 0x01;
|
|
break;
|
|
case 1:
|
|
*Dr1 = DataAddr;
|
|
Dr7->Len1 = Len;
|
|
Dr7->Rwe1 = rwMask;
|
|
Dr7->L1 = 0x01;
|
|
break;
|
|
case 2:
|
|
*Dr2 = DataAddr;
|
|
Dr7->Len2 = Len;
|
|
Dr7->Rwe2 = rwMask;
|
|
Dr7->L2 = 0x01;
|
|
break;
|
|
case 3:
|
|
*Dr3 = DataAddr;
|
|
Dr7->Len3 = Len;
|
|
Dr7->Rwe3 = rwMask;
|
|
Dr7->L3 = 0x01;
|
|
break;
|
|
}
|
|
|
|
#ifdef KERNEL
|
|
ksr.KernelDr6 = 0;
|
|
return SetExtendedContext(hthd, &ksr);
|
|
#else
|
|
return SetThreadContext(hthd->rwHand, &Context);
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
VOID ClearDebugRegister(HTHDX hthd, int Register)
|
|
{
|
|
#ifdef KERNEL
|
|
KSPECIAL_REGISTERS ksr;
|
|
PDWORD Dr0 = &ksr.KernelDr0;
|
|
PDWORD Dr1 = &ksr.KernelDr1;
|
|
PDWORD Dr2 = &ksr.KernelDr2;
|
|
PDWORD Dr3 = &ksr.KernelDr3;
|
|
PDR7 Dr7 = (PDR7)&(ksr.KernelDr7);
|
|
#else
|
|
CONTEXT Context;
|
|
PDWORD Dr0 = &Context.Dr0;
|
|
PDWORD Dr1 = &Context.Dr1;
|
|
PDWORD Dr2 = &Context.Dr2;
|
|
PDWORD Dr3 = &Context.Dr3;
|
|
PDR7 Dr7 = (PDR7)&(Context.Dr7);
|
|
#endif
|
|
|
|
// ppc currently only supports 1
|
|
assert(Register == 1);
|
|
|
|
#ifdef KERNEL
|
|
if (GetExtendedContext(hthd, &ksr))
|
|
#else
|
|
Context.ContextFlags = CONTEXT_DEBUG_REGISTERS;
|
|
if (GetThreadContext(hthd->rwHand, &Context))
|
|
#endif
|
|
{
|
|
|
|
switch( Register ) {
|
|
case 0:
|
|
*Dr0 = 0;
|
|
Dr7->Len0 = 0;
|
|
Dr7->Rwe0 = 0;
|
|
Dr7->L0 = 0;
|
|
break;
|
|
case 1:
|
|
*Dr1 = 0;
|
|
Dr7->Len1 = 0;
|
|
Dr7->Rwe1 = 0;
|
|
Dr7->L1 = 0;
|
|
break;
|
|
case 2:
|
|
*Dr2 = 0;
|
|
Dr7->Len2 = 0;
|
|
Dr7->Rwe2 = 0;
|
|
Dr7->L2 = 0;
|
|
break;
|
|
case 3:
|
|
*Dr3 = 0;
|
|
Dr7->Len3 = 0;
|
|
Dr7->Rwe3 = 0;
|
|
Dr7->L3 = 0;
|
|
break;
|
|
}
|
|
|
|
#ifdef KERNEL
|
|
ksr.KernelDr6 = 0;
|
|
SetExtendedContext(hthd, &ksr);
|
|
#else
|
|
SetThreadContext( hthd->rwHand, &Context );
|
|
#endif
|
|
}
|
|
}
|
|
|
|
|
|
BOOL
|
|
DecodeSingleStepEvent(
|
|
HTHDX hthd,
|
|
DEBUG_EVENT64 *de,
|
|
PDWORD eventCode,
|
|
PDWORD subClass
|
|
)
|
|
/*++
|
|
Arguments:
|
|
hthd - Supplies thread that has a single step exception pending
|
|
de - Supplies the DEBUG_EVENT64 structure for the exception
|
|
eventCode - Returns the remapped debug event id
|
|
subClass - Returns the remapped subClass id
|
|
Return Value:
|
|
TRUE if event was a real single step or was successfully mapped
|
|
to a breakpoint. FALSE if a register breakpoint occurred which was
|
|
not expected.
|
|
--*/
|
|
{
|
|
return FALSE;
|
|
}
|
|
|
|
|
|
ULONGLONG GetRegValue(PCONTEXT regs, int cvindex)
|
|
{
|
|
if (cvindex < CV_PPC_GPR0+32) {
|
|
return (®s->Gpr0)[cvindex - CV_PPC_GPR0];
|
|
}
|
|
|
|
switch (cvindex) {
|
|
case CV_PPC_PC:
|
|
return regs->Iar;
|
|
case CV_PPC_LR:
|
|
return regs->Lr;
|
|
default:
|
|
assert(!"GetRegValue called with unrecognized index");
|
|
return (ULONGLONG)0 - 1;
|
|
}
|
|
}
|
|
|
|
|
|
#ifndef KERNEL
|
|
UOFFSET GetSPFromNLGDest(HTHDX hthd, LPNLG_DESTINATION pNlgDest)
|
|
{
|
|
UOFFSET dwRet;
|
|
|
|
switch (pNlgDest->dwCode) {
|
|
case NLG_CATCH_ENTER: // Catch handler
|
|
case NLG_EXCEPT_ENTER: // Exception handler
|
|
case NLG_FILTER_ENTER: // Exception filter
|
|
case NLG_CATCH_LEAVE: // Return from Catch
|
|
case NLG_FINALLY_ENTER: // Termination handlers
|
|
case NLG_DESTRUCTOR_ENTER: // -GX handler
|
|
case NLG_LONGJMPEX: // Exception safe longjmp
|
|
dwRet = pNlgDest->uoffFramePointer;
|
|
break;
|
|
case NLG_LONGJMP:
|
|
dwRet = pNlgDest->uoffFramePointer+1;
|
|
break;
|
|
default:
|
|
dwRet = STACK_POINTER(hthd)+1; // emulate Virtual FP?
|
|
break;
|
|
}
|
|
|
|
return dwRet;
|
|
}
|
|
|
|
|
|
PVOID InfoExceptionDuringStep(HTHDX hthd)
|
|
{
|
|
Unreferenced(hthd);
|
|
|
|
// Information that needs to be propagated from the step location
|
|
// to the action handler when an exception occurs is passed in the
|
|
// void * returned by this function. In case of PPC no information
|
|
// needs to be passed currently.
|
|
return NULL;
|
|
}
|
|
|
|
#endif |