366 lines
14 KiB
C
366 lines
14 KiB
C
#ifndef _DMA_H_
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#define _DMA_H_
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/***************************************************************************\
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|* *|
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|* Copyright 1993-2000 NVIDIA, Corporation. All rights reserved. *|
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|* *|
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|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
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|* international laws. Users and possessors of this source code are *|
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|* hereby granted a nonexclusive, royalty-free copyright license to *|
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|* use this code in individual and commercial software. *|
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|* *|
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|* Any use of this source code must include, in the user documenta- *|
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|* tion and internal comments to the code, notices to the end user *|
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|* as follows: *|
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|* *|
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|* Copyright 1993-2000 NVIDIA, Corporation. All rights reserved. *|
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|* *|
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|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
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|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
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|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
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|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
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|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
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|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
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|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
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|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
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|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
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|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
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|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
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|* *|
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|* U.S. Government End Users. This source code is a "commercial *|
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|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
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|* consisting of "commercial computer software" and "commercial *|
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|* computer software documentation," as such terms are used in *|
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|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
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|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
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|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
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|* all U.S. Government End Users acquire the source code with only *|
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|* those rights set forth herein. *|
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|* *|
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\***************************************************************************/
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/********************************* DMA Manager *****************************\
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* *
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* Module: DMA.H *
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* DMA object/engine management. *
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* *
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*****************************************************************************
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* *
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* History: *
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* *
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\***************************************************************************/
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//
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// Include graphics object defines.
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//
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#ifndef _GR_H_
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#include <gr.h>
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#endif // _GR_H_
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//---------------------------------------------------------------------------
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//
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// Memory page defines.
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//
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// These correspond to the granularity understood by the hardware
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// for address mapping; the system page size can be larger.
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//
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//---------------------------------------------------------------------------
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#define RM_PAGE_SIZE 4096
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#define RM_PAGE_MASK 0x0FFF
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#define RM_PAGE_SHIFT 12
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#define PTE_CACHE_SIZE 64
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//---------------------------------------------------------------------------
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//
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// DMA object states.
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//
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//---------------------------------------------------------------------------
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#define DMA_SET_DESC_0 0x00000001
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#define DMA_SET_DESC_1 0x00000002
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#define DMA_SET_DESC_2 0x00000004
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#define DMA_RELOAD 0x80000000
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//---------------------------------------------------------------------------
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//
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// Buffer states.
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//
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//---------------------------------------------------------------------------
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#define BUFFER_IDLE 0
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#define BUFFER_BUSY 1
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#define BUFFER_NOTIFY_PENDING 2
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//---------------------------------------------------------------------------
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//
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// NV PTE state
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//
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//---------------------------------------------------------------------------
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typedef U032 NV_PTE_STATE;
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// Definition of state bit fields
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#define PTE_STATE_PRESENT 0x00000001
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// Bit which indicates whether or not there
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// is a PTE currently allocated.
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//---------------------------------------------------------------------------
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//
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// DMA class defines.
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//
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//---------------------------------------------------------------------------
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typedef struct _def_dma_user_object DMAUSEROBJECT, *PDMAUSEROBJECT;
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/* typedef */ struct _def_dma_user_object
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{
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PCOMMONOBJECT UserObject;
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PDMAUSEROBJECT Next;
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};
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struct _def_dma_object
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{
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OBJECT Base;
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U032 State;
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U032 Valid;
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U032 DescSelector;
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VOID* DescAddr;
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VOID* DescOffset;
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U032 DescLimit;
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U032 LockCount;
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VOID* LockHandle;
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DMAHALOBJINFO HalInfo;
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U032 NotifyActionHandle; // An OS specific handle to be used for
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// notification action if this DMA object
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// is used for notification.
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U032 ClientHandle; // The global DmaList keeps DMA objects
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// across clients, so save the client
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// handle to differentiate the same ID
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// used between multiple clients.
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struct _def_dma_object *Next;
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};
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//#define GETDMA_ADDRSPACE(dma) (dma->HalInfo.AddressSpace)
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//#define GETDMAHALINFO(dma,f) (dma->HalInfo.f)
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// _def_client_dma_info is a subset of the _def_dma_object structure.
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// A list of this structure is used to iterate over all the context DMAs
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// allocated in this client.
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typedef struct _def_client_dma_info* PCLI_DMA_INFO;
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typedef struct _def_client_dma_info
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{
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U032 Handle;
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U032 Client;
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U032 Class;
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U032 Flags;
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U032 Access;
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U032 Physicality;
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U032 Locked;
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U032 Coherency;
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//OBJECT Base;
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//U032 State;
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U032 Valid;
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//U032 Instance;
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//U032 UseCount;
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//U032 XferCount;
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//PDMAUSEROBJECT Users;
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U032 DescSelector; // selector for hobbled OSs (always 0 for NT)
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VOID* DescOffset; // buffer address from the client (flat address for NT)
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U032 DescLimit; // buffer length - 1
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VOID* DescAddr; // actual DMA buffer address
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VOID* BufferBase;
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U032 BufferSize;
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//U032 LockCount;
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VOID* LockHandle;
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//NV_PTE_STATE PteState;
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U032 PteCount;
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//U032 PteOffset;
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U032 PteAdjust; // offset into the current DMA page
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U032 PteLimit; // buffer size rounded to DMA page
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U032* PteArray;
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//U032* CurPte;
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//U032 PteCache[PTE_CACHE_SIZE];
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//U032 NotifyActionHandle;
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NV_ADDRESS_SPACE AddressSpace;
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struct _def_client_dma_info* Next;
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struct _def_client_dma_info* Prev;
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} CLI_DMA_INFO;
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//---------------------------------------------------------------------------
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//
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// DMA instance structure.
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//
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//---------------------------------------------------------------------------
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typedef struct _def_dma_instance
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{
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U016 Adjust;
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U016 Present;
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U032 Limit;
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U032 AddressPresentAccess[1];
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} DMAINSTANCE, *PDMAINSTANCE;
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//---------------------------------------------------------------------------
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//
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// Notification buffer structure.
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//
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//---------------------------------------------------------------------------
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typedef struct _def_notification_buffer
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{
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U032 TimeLo;
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U032 TimeHi;
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V032 OtherInfo32;
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V016 OtherInfo16;
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V016 Status;
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} NOTIFICATION, *PNOTIFICATION;
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//---------------------------------------------------------------------------
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//
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// Event Notification structure.
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//
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//---------------------------------------------------------------------------
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struct _def_event_notification
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{
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U032 Handle; // This handle is not currently used
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U032 NotifyIndex;
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U032 NotifyType;
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U064 Data;
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PEVENTNOTIFICATION Next;
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};
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//---------------------------------------------------------------------------
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//
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// Dual buffer structure and object.
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//
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//---------------------------------------------------------------------------
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//
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// Buffer structure.
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//
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typedef struct _def_buffer
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{
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PDMAOBJECT Xlate;
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PDMAOBJECT NotifyXlate;
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PDMAOBJECT PosXlate;
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U032 NotifyMethod; // The method to be used on notification
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// of completion of this buffer.
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U032 NotifyAction;
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U032 NotifyCount;
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U032 NotifyCurrentCount;
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U032 Start;
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U032 Length;
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U032 State;
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U032 Pitch;
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U032 Width;
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} BUFFER, *PBUFFER;
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typedef struct _def_buffer_object BUFFEROBJECT, *PBUFFEROBJECT;
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//
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// Buffer specific routine to change sample rate.
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//
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typedef RM_STATUS (*SAMPLEPROC)(PBUFFEROBJECT);
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//
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// Time sampled information.
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//
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typedef struct _def_sample
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{
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U032 NumChannels;
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U032 Format;
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U032 Size;
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U032 Rate;
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U032 RateAdjust;
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SAMPLEPROC RateUpdate;
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} SAMPLEINFO, *PSAMPLEINFO;
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//
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// Buffer specific routine to start and complete transferring buffer data.
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//
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typedef RM_STATUS (*BUFFERSTARTPROC)(PHWINFO, PBUFFEROBJECT, U032);
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typedef RM_STATUS (*BUFFERPOSPROC)(PHWINFO, PBUFFEROBJECT, U032, U032 *);
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typedef RM_STATUS (*BUFFERENDPROC)(PHWINFO, PBUFFEROBJECT, U032, V032, RM_STATUS);
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//
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// Generic buffer object.
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//
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struct _def_buffer_object
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{
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OBJECT Base;
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U032 Valid;
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SAMPLEINFO Sample;
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BUFFERSTARTPROC BufferXfer;
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BUFFERPOSPROC BufferPos;
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BUFFERENDPROC BufferComplete;
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BUFFER Buffer[2];
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};
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// Definitions of generic buffer object substructures
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#define BBase BufferObj.Base
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#define BValid BufferObj.Valid
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#define BSample BufferObj.Sample
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#define BBufferXfer BufferObj.BufferXfer
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#define BBufferPos BufferObj.BufferPos
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#define BBufferComplete BufferObj.BufferComplete
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#define BBuffer BufferObj.Buffer
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// Memory to memory object definitions
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// The memory to memory object is the same as the buffer object
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typedef struct _def_buffer_object MEMTOMEMOBJECT, *PMEMTOMEMOBJECT;
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// Buffer 0 in the memory to memory object is used for the from
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// memory description.
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#define MEM_TO_MEM_IN_BUFFER 0
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// Buffer 1 in the memory to memory object is used for the to
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// memory description.
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#define MEM_TO_MEM_OUT_BUFFER 1
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//---------------------------------------------------------------------------
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//
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// NULL DMA Descriptor.
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//
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//---------------------------------------------------------------------------
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extern U032 dmaNullInstance;
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//---------------------------------------------------------------------------
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//
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// Function prototypes.
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//
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//---------------------------------------------------------------------------
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RM_STATUS dmaCreateObj(PHWINFO, PCLASSOBJECT, U032, POBJECT *);
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RM_STATUS dmaDestroyObj(PHWINFO, POBJECT);
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RM_STATUS dmaCreate(VOID*, PCLASSOBJECT, U032, POBJECT *, VOID*);
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RM_STATUS dmaDelete(VOID*, POBJECT);
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RM_STATUS dmaContextInstanceToObject(PHWINFO, U032, U032, PDMAOBJECT *);
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RM_STATUS dmaValidateObjectName(PHWINFO, U032, V032, PDMAOBJECT *);
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RM_STATUS dmaFindContext(PHWINFO, U032, U032, PDMAOBJECT *);
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RM_STATUS dmaValidateXlate(PDMAOBJECT, U032, U032);
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RM_STATUS dmaGetMappedAddress(PHWINFO, PDMAOBJECT, U032, U032, VOID **);
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RM_STATUS dmaAllocInstance(PHWINFO, PDMAOBJECT);
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RM_STATUS dmaFreeInstance(PHWINFO, PDMAOBJECT);
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RM_STATUS dmaAttach(PDMAOBJECT);
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RM_STATUS dmaDetach(PDMAOBJECT);
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RM_STATUS dmaBeginXfer(PDMAOBJECT, PCOMMONOBJECT);
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RM_STATUS dmaEndXfer(PDMAOBJECT, PCOMMONOBJECT);
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RM_STATUS dmaAllocate(PHWINFO, PDMAOBJECT);
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RM_STATUS dmaDeallocate(PHWINFO, PDMAOBJECT);
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RM_STATUS dmaSetBufferCtxDma(PHWINFO, PBUFFEROBJECT, PBUFFER, U032, V032);
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RM_STATUS dmaSetBufferStart(PBUFFEROBJECT, PBUFFER, U032, V032);
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RM_STATUS dmaSetBufferLength(PBUFFEROBJECT, PBUFFER, U032, V032);
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RM_STATUS dmaSetBufferPitch(PBUFFEROBJECT, PBUFFER, U032, U032);
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RM_STATUS notifySetBufferNotifyCtxDma(PHWINFO, PBUFFEROBJECT, PBUFFER, U032, V032);
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RM_STATUS notifySetBufferNotify(PHWINFO, PBUFFEROBJECT, U032, U032, V032);
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RM_STATUS notifyDefaultError(PHWINFO, POBJECT, U032, V032, U032, RM_STATUS);
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RM_STATUS notifyMethodComplete(PHWINFO, POBJECT, U032, V032, RM_STATUS);
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RM_STATUS notifyBufferHWComplete(PHWINFO, POBJECT, U032, V032, U032, RM_STATUS);
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RM_STATUS notifyBufferComplete(PHWINFO, PBUFFEROBJECT, U032, V032, RM_STATUS);
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RM_STATUS notifyFillNotifier(PHWINFO, PDMAOBJECT, V032, V016, RM_STATUS);
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RM_STATUS notifyFillNotifierArray(PHWINFO, PDMAOBJECT, V032, V016, RM_STATUS, U032);
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V032 dmaService(VOID);
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RM_STATUS dmaRegisterToDevice(PHWINFO, PCLI_DMA_INFO, PDMAOBJECT *);
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RM_STATUS dmaUnregisterFromDevice(PHWINFO, PDMAOBJECT);
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RM_STATUS dmaBindToChannel(PHWINFO, PDMAOBJECT, U032);
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RM_STATUS dmaUnbindFromChannel(PHWINFO, PDMAOBJECT, U032);
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#endif // _DMA_H_
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