151 lines
3.5 KiB
NASM
151 lines
3.5 KiB
NASM
;++
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;
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; Copyright (c) 1989-2000 Microsoft Corporation
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;
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; Module Name:
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;
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; rstartup.asm
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;
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; Abstract:
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;
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; The module implements code to put the processor in protected mode. This code executes
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; at processor reset vector
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;
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; Environment:
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;
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; 16-bit Real Mode
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;
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;--
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; ==========================================================================
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.586p
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.xlist
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INCLUDE bldr.inc
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INCLUDE ks386.inc
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.list
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INCLUDE chipset.inc
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_TEXT SEGMENT PARA USE16 PUBLIC 'CODE'
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ASSUME CS:_TEXT, DS:_TEXT, SS:_TEXT, ES:NOTHING
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PUBLIC Startup16
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;
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; NOTE: Following ORG is hardcoded. Changing any code below requires changing the ORG value
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; so that the processor init always lines up at FFF0. To calculate this value, subtract the value of
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; CodeSoFar label in the .lst file from FFF0
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;
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IFDEF MCP_REV_B01
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ORG 0FFBCh
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ELSE
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ORG 0FFB8h
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ENDIF
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Startup16:
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;
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; Load the processor's global descriptor table by executing a 32-bit lgdt
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;
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db 066h
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lgdt cs:[RomDecGDTFWORD]
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IFNDEF MCP_REV_B01
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;
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; Load the processor's interrupt descriptor table by executing a 32-bit lidt
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; We point it to the same structure as the gdt to force the idt limit to be
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; very small thus limiting the processor's capability to execute interrupt
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; and fault handlers
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;
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db 066h
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lidt cs:[RomDecGDTFWORD]
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ENDIF
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;
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; Enable the processor's protected mode support
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;
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mov eax, cr0
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or al, CR0_PE
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mov cr0, eax
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;
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; Execute a 16:32 jump to the 32-bit part of romdec which is 512 bytes from
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; top of the address space
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;
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db 066h, 0EAh
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dd 0FFFFFE00h
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dw KGDT_R0_CODE
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;
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; NOTE: The linear address of this table is hardcoded in RomDecGDTFWORD below. Changing the
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; the size of this table requires updating the address
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;
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ALIGN 4
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RomDecGDT LABEL DWORD
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dd 0 ; KGDT_NULL
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dd 0
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dd 00000FFFFh ; KGDT_R0_CODE
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dd 000CF9B00h
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dd 00000FFFFh ; KGDT_R0_DATA
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dd 000CF9300h
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RomDecGDTEnd LABEL DWORD
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;
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; Processor will start executing code here which must be at FFFF_FFF0
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;
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ProcessorInit:
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CodeSoFar = (ProcessorInit - Startup16)
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;
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; Jump to the start of 16-bit code
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;
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jmp Startup16
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;
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; FWORD to initialize the processor's descriptor tables.
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;
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ALIGN 4
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RomDecGDTFWORD LABEL FWORD
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dw OFFSET RomDecGDTEnd - OFFSET RomDecGDT
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dd 0FFFFFFD8h
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;
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; The 32-bit part of the RomDec jumps to this code located FFFF FFFA. This code finishes the PCI
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; cycle that was started by the 32-bit code to turn of the Southbridge ROM. Turning off SB ROM causes
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; the next instruction being executed fetched from main ROM. This code causes the next instruction
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; to fall outside of the the address space causing an unhandled exception to occur so
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; we don't execute any code from main ROM
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;
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; The processor will be in Protected Mode while executing this code. This code must always ORG to FFFA.
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;
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ShutdownEnd:
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add dl, 04h
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mov al, 2
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out dx, al
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_TEXT ENDS
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; ==========================================================================
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END Startup16
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