netty5

History

Kiril Menshikov 66b9be3a46 Allow to allign allocated Buffers Motivation: 64-byte alignment is recommended by the Intel performance guide (https://software.intel.com/en-us/articles/practical-intel-avx-optimization-on-2nd-generation-intel-core-processors) for data-structures over 64 bytes. Requiring padding to a multiple of 64 bytes allows for using SIMD instructions consistently in loops without additional conditional checks. This should allow for simpler and more efficient code. Modification: At the moment cache alignment must be setup manually. But probably it might be taken from the system. The original code was introduced by @normanmaurer https://github.com/netty/netty/pull/4726/files Result: Buffer alignment works better than miss-align cache.	2017-02-06 07:58:29 +01:00
..
java/io/netty	Allow to allign allocated Buffers	2017-02-06 07:58:29 +01:00
resources	Have microbenchmarks produce a deployable artifact. Fix some minor miscellaneous issues.	2015-04-17 10:04:26 -07:00

Kiril Menshikov 66b9be3a46 Allow to allign allocated Buffers

Motivation:

64-byte alignment is recommended by the Intel performance guide (https://software.intel.com/en-us/articles/practical-intel-avx-optimization-on-2nd-generation-intel-core-processors) for data-structures over 64 bytes.
Requiring padding to a multiple of 64 bytes allows for using SIMD instructions consistently in loops without additional conditional checks. This should allow for simpler and more efficient code.

Modification:

At the moment cache alignment must be setup manually. But probably it might be taken from the system. The original code was introduced by @normanmaurer https://github.com/netty/netty/pull/4726/files

Result:

Buffer alignment works better than miss-align cache.

2017-02-06 07:58:29 +01:00

java/io/netty

Allow to allign allocated Buffers

2017-02-06 07:58:29 +01:00

resources

Have microbenchmarks produce a deployable artifact. Fix some minor miscellaneous issues.

2015-04-17 10:04:26 -07:00