2019-06-11 21:18:37 +02:00
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// Copyright (c) 2011-present, Facebook, Inc. All rights reserved.
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// This source code is licensed under both the GPLv2 (found in the
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// COPYING file in the root directory) and Apache 2.0 License
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// (found in the LICENSE.Apache file in the root directory).
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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#ifndef ROCKSDB_LITE
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#ifndef GFLAGS
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#include <cstdio>
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int main() {
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fprintf(stderr,
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"Please install gflags to run block_cache_trace_analyzer_test\n");
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return 1;
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}
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#else
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#include <fstream>
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#include <iostream>
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2019-06-11 21:18:37 +02:00
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#include <map>
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#include <vector>
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#include "rocksdb/env.h"
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#include "rocksdb/status.h"
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#include "rocksdb/trace_reader_writer.h"
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#include "test_util/testharness.h"
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#include "test_util/testutil.h"
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Block cache simulator: Add pysim to simulate caches using reinforcement learning. (#5610)
Summary:
This PR implements cache eviction using reinforcement learning. It includes two implementations:
1. An implementation of Thompson Sampling for the Bernoulli Bandit [1].
2. An implementation of LinUCB with disjoint linear models [2].
The idea is that a cache uses multiple eviction policies, e.g., MRU, LRU, and LFU. The cache learns which eviction policy is the best and uses it upon a cache miss.
Thompson Sampling is contextless and does not include any features.
LinUCB includes features such as level, block type, caller, column family id to decide which eviction policy to use.
[1] Daniel J. Russo, Benjamin Van Roy, Abbas Kazerouni, Ian Osband, and Zheng Wen. 2018. A Tutorial on Thompson Sampling. Found. Trends Mach. Learn. 11, 1 (July 2018), 1-96. DOI: https://doi.org/10.1561/2200000070
[2] Lihong Li, Wei Chu, John Langford, and Robert E. Schapire. 2010. A contextual-bandit approach to personalized news article recommendation. In Proceedings of the 19th international conference on World wide web (WWW '10). ACM, New York, NY, USA, 661-670. DOI=http://dx.doi.org/10.1145/1772690.1772758
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5610
Differential Revision: D16435067
Pulled By: HaoyuHuang
fbshipit-source-id: 6549239ae14115c01cb1e70548af9e46d8dc21bb
2019-07-26 23:36:16 +02:00
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#include "tools/block_cache_analyzer/block_cache_trace_analyzer.h"
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2019-06-11 21:18:37 +02:00
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#include "trace_replay/block_cache_tracer.h"
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2020-02-20 21:07:53 +01:00
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namespace ROCKSDB_NAMESPACE {
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2019-06-11 21:18:37 +02:00
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namespace {
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const uint64_t kBlockSize = 1024;
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const std::string kBlockKeyPrefix = "test-block-";
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const uint32_t kCFId = 0;
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const uint32_t kLevel = 1;
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const uint64_t kSSTStoringEvenKeys = 100;
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const uint64_t kSSTStoringOddKeys = 101;
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const std::string kRefKeyPrefix = "test-get-";
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const uint64_t kNumKeysInBlock = 1024;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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const int kMaxArgCount = 100;
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const size_t kArgBufferSize = 100000;
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2019-06-11 21:18:37 +02:00
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} // namespace
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class BlockCacheTracerTest : public testing::Test {
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public:
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BlockCacheTracerTest() {
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2020-12-21 17:45:54 +01:00
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test_path_ = test::PerThreadDBPath("block_cache_trace_analyzer_test");
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2020-02-20 21:07:53 +01:00
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env_ = ROCKSDB_NAMESPACE::Env::Default();
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2019-06-11 21:18:37 +02:00
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EXPECT_OK(env_->CreateDir(test_path_));
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trace_file_path_ = test_path_ + "/block_cache_trace";
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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block_cache_sim_config_path_ = test_path_ + "/block_cache_sim_config";
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2019-06-25 05:38:20 +02:00
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timeline_labels_ =
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"block,all,cf,sst,level,bt,caller,cf_sst,cf_level,cf_bt,cf_caller";
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reuse_distance_labels_ =
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"block,all,cf,sst,level,bt,caller,cf_sst,cf_level,cf_bt,cf_caller";
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reuse_distance_buckets_ = "1,1K,1M,1G";
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reuse_interval_labels_ = "block,all,cf,sst,level,bt,cf_sst,cf_level,cf_bt";
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reuse_interval_buckets_ = "1,10,100,1000";
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2019-07-13 01:52:15 +02:00
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reuse_lifetime_labels_ = "block,all,cf,sst,level,bt,cf_sst,cf_level,cf_bt";
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reuse_lifetime_buckets_ = "1,10,100,1000";
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analyzing_callers_ = "Get,Iterator";
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access_count_buckets_ = "2,3,4,5,10";
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analyze_get_spatial_locality_labels_ = "all";
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analyze_get_spatial_locality_buckets_ = "10,20,30,40,50,60,70,80,90,100";
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2019-06-11 21:18:37 +02:00
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}
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~BlockCacheTracerTest() override {
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if (getenv("KEEP_DB")) {
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printf("The trace file is still at %s\n", trace_file_path_.c_str());
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return;
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}
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EXPECT_OK(env_->DeleteFile(trace_file_path_));
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EXPECT_OK(env_->DeleteDir(test_path_));
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}
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2019-06-20 23:28:22 +02:00
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TableReaderCaller GetCaller(uint32_t key_id) {
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2019-06-11 21:18:37 +02:00
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uint32_t n = key_id % 5;
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switch (n) {
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case 0:
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kPrefetch;
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2019-06-11 21:18:37 +02:00
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case 1:
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kCompaction;
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2019-06-11 21:18:37 +02:00
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case 2:
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kUserGet;
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2019-06-11 21:18:37 +02:00
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case 3:
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kUserMultiGet;
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2019-06-11 21:18:37 +02:00
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case 4:
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kUserIterator;
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2019-06-11 21:18:37 +02:00
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}
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// This cannot happend.
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assert(false);
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2019-06-20 23:28:22 +02:00
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return TableReaderCaller::kMaxBlockCacheLookupCaller;
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2019-06-11 21:18:37 +02:00
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}
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void WriteBlockAccess(BlockCacheTraceWriter* writer, uint32_t from_key_id,
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TraceType block_type, uint32_t nblocks) {
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assert(writer);
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for (uint32_t i = 0; i < nblocks; i++) {
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uint32_t key_id = from_key_id + i;
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2019-07-02 00:11:43 +02:00
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uint64_t timestamp = (key_id + 1) * kMicrosInSecond;
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2019-06-11 21:18:37 +02:00
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BlockCacheTraceRecord record;
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record.block_type = block_type;
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record.block_size = kBlockSize + key_id;
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record.block_key = kBlockKeyPrefix + std::to_string(key_id);
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2019-06-25 05:38:20 +02:00
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record.access_timestamp = timestamp;
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2019-06-11 21:18:37 +02:00
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record.cf_id = kCFId;
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record.cf_name = kDefaultColumnFamilyName;
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record.caller = GetCaller(key_id);
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record.level = kLevel;
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if (key_id % 2 == 0) {
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record.sst_fd_number = kSSTStoringEvenKeys;
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} else {
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record.sst_fd_number = kSSTStoringOddKeys;
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}
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record.is_cache_hit = Boolean::kFalse;
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record.no_insert = Boolean::kFalse;
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// Provide these fields for all block types.
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// The writer should only write these fields for data blocks and the
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// caller is either GET or MGET.
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2019-07-23 02:47:54 +02:00
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record.referenced_key =
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kRefKeyPrefix + std::to_string(key_id) + std::string(8, 0);
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2019-06-15 02:37:24 +02:00
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record.referenced_key_exist_in_block = Boolean::kTrue;
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2019-06-11 21:18:37 +02:00
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record.num_keys_in_block = kNumKeysInBlock;
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2019-06-15 02:37:24 +02:00
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ASSERT_OK(writer->WriteBlockAccess(
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record, record.block_key, record.cf_name, record.referenced_key));
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2019-06-11 21:18:37 +02:00
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}
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}
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void AssertBlockAccessInfo(
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uint32_t key_id, TraceType type,
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const std::map<std::string, BlockAccessInfo>& block_access_info_map) {
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auto key_id_str = kBlockKeyPrefix + std::to_string(key_id);
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ASSERT_TRUE(block_access_info_map.find(key_id_str) !=
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block_access_info_map.end());
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auto& block_access_info = block_access_info_map.find(key_id_str)->second;
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ASSERT_EQ(1, block_access_info.num_accesses);
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ASSERT_EQ(kBlockSize + key_id, block_access_info.block_size);
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ASSERT_GT(block_access_info.first_access_time, 0);
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ASSERT_GT(block_access_info.last_access_time, 0);
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ASSERT_EQ(1, block_access_info.caller_num_access_map.size());
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2019-06-20 23:28:22 +02:00
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TableReaderCaller expected_caller = GetCaller(key_id);
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2019-06-11 21:18:37 +02:00
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ASSERT_TRUE(block_access_info.caller_num_access_map.find(expected_caller) !=
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block_access_info.caller_num_access_map.end());
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ASSERT_EQ(
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1,
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block_access_info.caller_num_access_map.find(expected_caller)->second);
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2019-06-20 23:28:22 +02:00
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if ((expected_caller == TableReaderCaller::kUserGet ||
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expected_caller == TableReaderCaller::kUserMultiGet) &&
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2019-06-11 21:18:37 +02:00
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type == TraceType::kBlockTraceDataBlock) {
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ASSERT_EQ(kNumKeysInBlock, block_access_info.num_keys);
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ASSERT_EQ(1, block_access_info.key_num_access_map.size());
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ASSERT_EQ(0, block_access_info.non_exist_key_num_access_map.size());
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ASSERT_EQ(1, block_access_info.num_referenced_key_exist_in_block);
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}
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}
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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void RunBlockCacheTraceAnalyzer() {
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std::vector<std::string> params = {
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"./block_cache_trace_analyzer",
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"-block_cache_trace_path=" + trace_file_path_,
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"-block_cache_sim_config_path=" + block_cache_sim_config_path_,
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2019-06-25 05:38:20 +02:00
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"-block_cache_analysis_result_dir=" + test_path_,
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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"-print_block_size_stats",
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"-print_access_count_stats",
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"-print_data_block_access_count_stats",
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2019-06-25 05:38:20 +02:00
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"-cache_sim_warmup_seconds=0",
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2019-07-13 01:52:15 +02:00
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"-analyze_bottom_k_access_count_blocks=5",
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"-analyze_top_k_access_count_blocks=5",
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"-analyze_blocks_reuse_k_reuse_window=5",
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2019-06-25 05:38:20 +02:00
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"-timeline_labels=" + timeline_labels_,
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"-reuse_distance_labels=" + reuse_distance_labels_,
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"-reuse_distance_buckets=" + reuse_distance_buckets_,
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"-reuse_interval_labels=" + reuse_interval_labels_,
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"-reuse_interval_buckets=" + reuse_interval_buckets_,
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2019-07-13 01:52:15 +02:00
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"-reuse_lifetime_labels=" + reuse_lifetime_labels_,
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"-reuse_lifetime_buckets=" + reuse_lifetime_buckets_,
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"-analyze_callers=" + analyzing_callers_,
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"-access_count_buckets=" + access_count_buckets_,
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"-analyze_get_spatial_locality_labels=" +
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analyze_get_spatial_locality_labels_,
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"-analyze_get_spatial_locality_buckets=" +
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2019-07-23 02:47:54 +02:00
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analyze_get_spatial_locality_buckets_,
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Pysim more algorithms (#5644)
Summary:
This PR adds four more eviction policies.
- OPT [1]
- Hyperbolic caching [2]
- ARC [3]
- GreedyDualSize [4]
[1] L. A. Belady. 1966. A Study of Replacement Algorithms for a Virtual-storage Computer. IBM Syst. J. 5, 2 (June 1966), 78-101. DOI=http://dx.doi.org/10.1147/sj.52.0078
[2] Aaron Blankstein, Siddhartha Sen, and Michael J. Freedman. 2017. Hyperbolic caching: flexible caching for web applications. In Proceedings of the 2017 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC '17). USENIX Association, Berkeley, CA, USA, 499-511.
[3] Nimrod Megiddo and Dharmendra S. Modha. 2003. ARC: A Self-Tuning, Low Overhead Replacement Cache. In Proceedings of the 2nd USENIX Conference on File and Storage Technologies (FAST '03). USENIX Association, Berkeley, CA, USA, 115-130.
[4] N. Young. The k-server dual and loose competitiveness for paging. Algorithmica, June 1994, vol. 11,(no.6):525-41. Rewritten version of ''On-line caching as cache size varies'', in The 2nd Annual ACM-SIAM Symposium on Discrete Algorithms, 241-250, 1991.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5644
Differential Revision: D16548817
Pulled By: HaoyuHuang
fbshipit-source-id: 838f76db9179f07911abaab46c97e1c929cfcd63
2019-08-07 03:47:39 +02:00
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"-analyze_correlation_coefficients_labels=all",
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"-skew_labels=all",
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"-skew_buckets=10,50,100"};
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
char arg_buffer[kArgBufferSize];
|
|
|
|
char* argv[kMaxArgCount];
|
|
|
|
int argc = 0;
|
|
|
|
int cursor = 0;
|
|
|
|
for (const auto& arg : params) {
|
|
|
|
ASSERT_LE(cursor + arg.size() + 1, kArgBufferSize);
|
|
|
|
ASSERT_LE(argc + 1, kMaxArgCount);
|
|
|
|
snprintf(arg_buffer + cursor, arg.size() + 1, "%s", arg.c_str());
|
|
|
|
|
|
|
|
argv[argc++] = arg_buffer + cursor;
|
|
|
|
cursor += static_cast<int>(arg.size()) + 1;
|
|
|
|
}
|
2020-02-20 21:07:53 +01:00
|
|
|
ASSERT_EQ(0,
|
|
|
|
ROCKSDB_NAMESPACE::block_cache_trace_analyzer_tool(argc, argv));
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
}
|
|
|
|
|
2019-06-11 21:18:37 +02:00
|
|
|
Env* env_;
|
|
|
|
EnvOptions env_options_;
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
std::string block_cache_sim_config_path_;
|
2019-06-11 21:18:37 +02:00
|
|
|
std::string trace_file_path_;
|
|
|
|
std::string test_path_;
|
2019-06-25 05:38:20 +02:00
|
|
|
std::string timeline_labels_;
|
|
|
|
std::string reuse_distance_labels_;
|
|
|
|
std::string reuse_distance_buckets_;
|
|
|
|
std::string reuse_interval_labels_;
|
|
|
|
std::string reuse_interval_buckets_;
|
2019-07-13 01:52:15 +02:00
|
|
|
std::string reuse_lifetime_labels_;
|
|
|
|
std::string reuse_lifetime_buckets_;
|
|
|
|
std::string analyzing_callers_;
|
|
|
|
std::string access_count_buckets_;
|
|
|
|
std::string analyze_get_spatial_locality_labels_;
|
|
|
|
std::string analyze_get_spatial_locality_buckets_;
|
2019-06-11 21:18:37 +02:00
|
|
|
};
|
|
|
|
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
TEST_F(BlockCacheTracerTest, BlockCacheAnalyzer) {
|
|
|
|
{
|
|
|
|
// Generate a trace file.
|
|
|
|
TraceOptions trace_opt;
|
|
|
|
std::unique_ptr<TraceWriter> trace_writer;
|
|
|
|
ASSERT_OK(NewFileTraceWriter(env_, env_options_, trace_file_path_,
|
|
|
|
&trace_writer));
|
2021-03-15 12:32:24 +01:00
|
|
|
const auto& clock = env_->GetSystemClock();
|
|
|
|
BlockCacheTraceWriter writer(clock.get(), trace_opt,
|
|
|
|
std::move(trace_writer));
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
ASSERT_OK(writer.WriteHeader());
|
|
|
|
WriteBlockAccess(&writer, 0, TraceType::kBlockTraceDataBlock, 50);
|
|
|
|
ASSERT_OK(env_->FileExists(trace_file_path_));
|
|
|
|
}
|
|
|
|
{
|
|
|
|
// Generate a cache sim config.
|
2019-07-11 21:40:08 +02:00
|
|
|
std::string config = "lru,1,0,1K,1M,1G";
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
std::ofstream out(block_cache_sim_config_path_);
|
|
|
|
ASSERT_TRUE(out.is_open());
|
|
|
|
out << config << std::endl;
|
|
|
|
out.close();
|
|
|
|
}
|
|
|
|
RunBlockCacheTraceAnalyzer();
|
|
|
|
{
|
|
|
|
// Validate the cache miss ratios.
|
2019-07-23 02:47:54 +02:00
|
|
|
std::vector<uint64_t> expected_capacities{1024, 1024 * 1024,
|
|
|
|
1024 * 1024 * 1024};
|
|
|
|
const std::string mrc_path = test_path_ + "/49_50_mrc";
|
2019-06-25 05:38:20 +02:00
|
|
|
std::ifstream infile(mrc_path);
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
uint32_t config_index = 0;
|
|
|
|
std::string line;
|
|
|
|
// Read header.
|
|
|
|
ASSERT_TRUE(getline(infile, line));
|
|
|
|
while (getline(infile, line)) {
|
|
|
|
std::stringstream ss(line);
|
|
|
|
std::vector<std::string> result_strs;
|
|
|
|
while (ss.good()) {
|
|
|
|
std::string substr;
|
|
|
|
getline(ss, substr, ',');
|
|
|
|
result_strs.push_back(substr);
|
|
|
|
}
|
2019-07-11 21:40:08 +02:00
|
|
|
ASSERT_EQ(6, result_strs.size());
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
ASSERT_LT(config_index, expected_capacities.size());
|
|
|
|
ASSERT_EQ("lru", result_strs[0]); // cache_name
|
|
|
|
ASSERT_EQ("1", result_strs[1]); // num_shard_bits
|
2019-07-11 21:40:08 +02:00
|
|
|
ASSERT_EQ("0", result_strs[2]); // ghost_cache_capacity
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
ASSERT_EQ(std::to_string(expected_capacities[config_index]),
|
2019-07-11 21:40:08 +02:00
|
|
|
result_strs[3]); // cache_capacity
|
|
|
|
ASSERT_EQ("100.0000", result_strs[4]); // miss_ratio
|
|
|
|
ASSERT_EQ("50", result_strs[5]); // number of accesses.
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
config_index++;
|
|
|
|
}
|
|
|
|
ASSERT_EQ(expected_capacities.size(), config_index);
|
|
|
|
infile.close();
|
2019-06-25 05:38:20 +02:00
|
|
|
ASSERT_OK(env_->DeleteFile(mrc_path));
|
2019-07-23 02:47:54 +02:00
|
|
|
|
|
|
|
const std::vector<std::string> time_units{"1", "60", "3600"};
|
|
|
|
expected_capacities.push_back(port::kMaxUint64);
|
|
|
|
for (auto const& expected_capacity : expected_capacities) {
|
|
|
|
for (auto const& time_unit : time_units) {
|
|
|
|
const std::string miss_ratio_timeline_path =
|
|
|
|
test_path_ + "/" + std::to_string(expected_capacity) + "_" +
|
|
|
|
time_unit + "_miss_ratio_timeline";
|
|
|
|
std::ifstream mrt_file(miss_ratio_timeline_path);
|
|
|
|
// Read header.
|
|
|
|
ASSERT_TRUE(getline(mrt_file, line));
|
|
|
|
ASSERT_TRUE(getline(mrt_file, line));
|
|
|
|
std::stringstream ss(line);
|
|
|
|
bool read_header = false;
|
|
|
|
while (ss.good()) {
|
|
|
|
std::string substr;
|
|
|
|
getline(ss, substr, ',');
|
|
|
|
if (!read_header) {
|
|
|
|
if (expected_capacity == port::kMaxUint64) {
|
|
|
|
ASSERT_EQ("trace", substr);
|
|
|
|
} else {
|
|
|
|
ASSERT_EQ("lru-1-0", substr);
|
|
|
|
}
|
|
|
|
read_header = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
ASSERT_DOUBLE_EQ(100.0, ParseDouble(substr));
|
|
|
|
}
|
|
|
|
ASSERT_FALSE(getline(mrt_file, line));
|
|
|
|
mrt_file.close();
|
|
|
|
ASSERT_OK(env_->DeleteFile(miss_ratio_timeline_path));
|
|
|
|
}
|
|
|
|
for (auto const& time_unit : time_units) {
|
|
|
|
const std::string miss_timeline_path =
|
|
|
|
test_path_ + "/" + std::to_string(expected_capacity) + "_" +
|
|
|
|
time_unit + "_miss_timeline";
|
|
|
|
std::ifstream mt_file(miss_timeline_path);
|
|
|
|
// Read header.
|
|
|
|
ASSERT_TRUE(getline(mt_file, line));
|
|
|
|
ASSERT_TRUE(getline(mt_file, line));
|
|
|
|
std::stringstream ss(line);
|
|
|
|
uint32_t num_misses = 0;
|
|
|
|
while (ss.good()) {
|
|
|
|
std::string substr;
|
|
|
|
getline(ss, substr, ',');
|
|
|
|
if (num_misses == 0) {
|
|
|
|
if (expected_capacity == port::kMaxUint64) {
|
|
|
|
ASSERT_EQ("trace", substr);
|
|
|
|
} else {
|
|
|
|
ASSERT_EQ("lru-1-0", substr);
|
|
|
|
}
|
|
|
|
num_misses++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
num_misses += ParseInt(substr);
|
|
|
|
}
|
2020-03-12 16:39:46 +01:00
|
|
|
ASSERT_EQ(51u, num_misses);
|
2019-07-23 02:47:54 +02:00
|
|
|
ASSERT_FALSE(getline(mt_file, line));
|
|
|
|
mt_file.close();
|
|
|
|
ASSERT_OK(env_->DeleteFile(miss_timeline_path));
|
|
|
|
}
|
|
|
|
}
|
2019-06-25 05:38:20 +02:00
|
|
|
}
|
Pysim more algorithms (#5644)
Summary:
This PR adds four more eviction policies.
- OPT [1]
- Hyperbolic caching [2]
- ARC [3]
- GreedyDualSize [4]
[1] L. A. Belady. 1966. A Study of Replacement Algorithms for a Virtual-storage Computer. IBM Syst. J. 5, 2 (June 1966), 78-101. DOI=http://dx.doi.org/10.1147/sj.52.0078
[2] Aaron Blankstein, Siddhartha Sen, and Michael J. Freedman. 2017. Hyperbolic caching: flexible caching for web applications. In Proceedings of the 2017 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC '17). USENIX Association, Berkeley, CA, USA, 499-511.
[3] Nimrod Megiddo and Dharmendra S. Modha. 2003. ARC: A Self-Tuning, Low Overhead Replacement Cache. In Proceedings of the 2nd USENIX Conference on File and Storage Technologies (FAST '03). USENIX Association, Berkeley, CA, USA, 115-130.
[4] N. Young. The k-server dual and loose competitiveness for paging. Algorithmica, June 1994, vol. 11,(no.6):525-41. Rewritten version of ''On-line caching as cache size varies'', in The 2nd Annual ACM-SIAM Symposium on Discrete Algorithms, 241-250, 1991.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5644
Differential Revision: D16548817
Pulled By: HaoyuHuang
fbshipit-source-id: 838f76db9179f07911abaab46c97e1c929cfcd63
2019-08-07 03:47:39 +02:00
|
|
|
{
|
|
|
|
// Validate the skewness csv file.
|
|
|
|
const std::string skewness_file_path = test_path_ + "/all_skewness";
|
|
|
|
std::ifstream skew_file(skewness_file_path);
|
|
|
|
// Read header.
|
|
|
|
std::string line;
|
|
|
|
ASSERT_TRUE(getline(skew_file, line));
|
|
|
|
std::stringstream ss(line);
|
|
|
|
double sum_percent = 0;
|
|
|
|
while (getline(skew_file, line)) {
|
|
|
|
std::stringstream ss_naccess(line);
|
|
|
|
std::string substr;
|
|
|
|
bool read_label = false;
|
|
|
|
while (ss_naccess.good()) {
|
|
|
|
ASSERT_TRUE(getline(ss_naccess, substr, ','));
|
|
|
|
if (!read_label) {
|
|
|
|
read_label = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
sum_percent += ParseDouble(substr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ASSERT_EQ(100.0, sum_percent);
|
|
|
|
ASSERT_FALSE(getline(skew_file, line));
|
|
|
|
skew_file.close();
|
|
|
|
ASSERT_OK(env_->DeleteFile(skewness_file_path));
|
|
|
|
}
|
2019-06-25 05:38:20 +02:00
|
|
|
{
|
|
|
|
// Validate the timeline csv files.
|
2019-07-13 01:52:15 +02:00
|
|
|
const std::vector<std::string> time_units{"_60", "_3600"};
|
|
|
|
const std::vector<std::string> user_access_only_flags{"user_access_only_",
|
|
|
|
"all_access_"};
|
|
|
|
for (auto const& user_access_only : user_access_only_flags) {
|
|
|
|
for (auto const& unit : time_units) {
|
|
|
|
std::stringstream ss(timeline_labels_);
|
|
|
|
while (ss.good()) {
|
|
|
|
std::string l;
|
|
|
|
ASSERT_TRUE(getline(ss, l, ','));
|
|
|
|
if (l.find("block") == std::string::npos) {
|
Block cache simulator: Add pysim to simulate caches using reinforcement learning. (#5610)
Summary:
This PR implements cache eviction using reinforcement learning. It includes two implementations:
1. An implementation of Thompson Sampling for the Bernoulli Bandit [1].
2. An implementation of LinUCB with disjoint linear models [2].
The idea is that a cache uses multiple eviction policies, e.g., MRU, LRU, and LFU. The cache learns which eviction policy is the best and uses it upon a cache miss.
Thompson Sampling is contextless and does not include any features.
LinUCB includes features such as level, block type, caller, column family id to decide which eviction policy to use.
[1] Daniel J. Russo, Benjamin Van Roy, Abbas Kazerouni, Ian Osband, and Zheng Wen. 2018. A Tutorial on Thompson Sampling. Found. Trends Mach. Learn. 11, 1 (July 2018), 1-96. DOI: https://doi.org/10.1561/2200000070
[2] Lihong Li, Wei Chu, John Langford, and Robert E. Schapire. 2010. A contextual-bandit approach to personalized news article recommendation. In Proceedings of the 19th international conference on World wide web (WWW '10). ACM, New York, NY, USA, 661-670. DOI=http://dx.doi.org/10.1145/1772690.1772758
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5610
Differential Revision: D16435067
Pulled By: HaoyuHuang
fbshipit-source-id: 6549239ae14115c01cb1e70548af9e46d8dc21bb
2019-07-26 23:36:16 +02:00
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if (user_access_only != "all_access_") {
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2019-07-13 01:52:15 +02:00
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continue;
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}
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2019-06-25 05:38:20 +02:00
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}
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2019-07-13 01:52:15 +02:00
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const std::string timeline_file = test_path_ + "/" +
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user_access_only + l + unit +
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"_access_timeline";
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std::ifstream infile(timeline_file);
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std::string line;
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const uint64_t expected_naccesses = 50;
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const uint64_t expected_user_accesses = 30;
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ASSERT_TRUE(getline(infile, line)) << timeline_file;
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uint32_t naccesses = 0;
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while (getline(infile, line)) {
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std::stringstream ss_naccess(line);
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std::string substr;
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bool read_label = false;
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while (ss_naccess.good()) {
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ASSERT_TRUE(getline(ss_naccess, substr, ','));
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if (!read_label) {
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read_label = true;
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continue;
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}
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naccesses += ParseUint32(substr);
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}
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}
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if (user_access_only == "user_access_only_") {
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ASSERT_EQ(expected_user_accesses, naccesses) << timeline_file;
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} else {
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ASSERT_EQ(expected_naccesses, naccesses) << timeline_file;
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}
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ASSERT_OK(env_->DeleteFile(timeline_file));
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2019-06-25 05:38:20 +02:00
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}
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}
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}
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}
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{
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// Validate the reuse_interval and reuse_distance csv files.
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std::map<std::string, std::string> test_reuse_csv_files;
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2019-07-13 01:52:15 +02:00
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test_reuse_csv_files["_access_reuse_interval"] = reuse_interval_labels_;
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2019-06-25 05:38:20 +02:00
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test_reuse_csv_files["_reuse_distance"] = reuse_distance_labels_;
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2019-07-13 01:52:15 +02:00
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test_reuse_csv_files["_reuse_lifetime"] = reuse_lifetime_labels_;
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test_reuse_csv_files["_avg_reuse_interval"] = reuse_interval_labels_;
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test_reuse_csv_files["_avg_reuse_interval_naccesses"] =
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reuse_interval_labels_;
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2019-06-25 05:38:20 +02:00
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for (auto const& test : test_reuse_csv_files) {
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const std::string& file_suffix = test.first;
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const std::string& labels = test.second;
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2019-07-13 01:52:15 +02:00
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const uint32_t expected_num_rows = 5;
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2019-06-25 05:38:20 +02:00
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std::stringstream ss(labels);
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while (ss.good()) {
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std::string l;
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ASSERT_TRUE(getline(ss, l, ','));
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const std::string reuse_csv_file = test_path_ + "/" + l + file_suffix;
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std::ifstream infile(reuse_csv_file);
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std::string line;
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ASSERT_TRUE(getline(infile, line));
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double npercentage = 0;
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uint32_t nrows = 0;
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while (getline(infile, line)) {
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std::stringstream ss_naccess(line);
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bool label_read = false;
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nrows++;
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while (ss_naccess.good()) {
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std::string substr;
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ASSERT_TRUE(getline(ss_naccess, substr, ','));
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if (!label_read) {
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label_read = true;
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continue;
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}
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2019-07-13 01:52:15 +02:00
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npercentage += ParseDouble(substr);
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2019-06-25 05:38:20 +02:00
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}
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}
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ASSERT_EQ(expected_num_rows, nrows);
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2019-07-13 01:52:15 +02:00
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if ("_reuse_lifetime" == test.first ||
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"_avg_reuse_interval" == test.first ||
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"_avg_reuse_interval_naccesses" == test.first) {
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ASSERT_EQ(100, npercentage) << reuse_csv_file;
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} else {
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ASSERT_LT(npercentage, 0);
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}
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2019-06-25 05:38:20 +02:00
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ASSERT_OK(env_->DeleteFile(reuse_csv_file));
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}
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}
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
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}
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2019-07-13 01:52:15 +02:00
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{
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// Validate the percentage of accesses summary.
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const std::string percent_access_summary_file =
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test_path_ + "/percentage_of_accesses_summary";
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std::ifstream infile(percent_access_summary_file);
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std::string line;
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ASSERT_TRUE(getline(infile, line));
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std::set<std::string> callers;
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std::set<std::string> expected_callers{"Get", "MultiGet", "Iterator",
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"Prefetch", "Compaction"};
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while (getline(infile, line)) {
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std::stringstream caller_percent(line);
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std::string caller;
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ASSERT_TRUE(getline(caller_percent, caller, ','));
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std::string percent;
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ASSERT_TRUE(getline(caller_percent, percent, ','));
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ASSERT_FALSE(caller_percent.good());
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callers.insert(caller);
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ASSERT_EQ(20, ParseDouble(percent));
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}
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ASSERT_EQ(expected_callers.size(), callers.size());
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for (auto caller : callers) {
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ASSERT_TRUE(expected_callers.find(caller) != expected_callers.end());
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}
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ASSERT_OK(env_->DeleteFile(percent_access_summary_file));
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}
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{
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// Validate the percentage of accesses summary by analyzing callers.
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std::stringstream analyzing_callers(analyzing_callers_);
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while (analyzing_callers.good()) {
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std::string caller;
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ASSERT_TRUE(getline(analyzing_callers, caller, ','));
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std::vector<std::string> breakdowns{"level", "bt"};
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for (auto breakdown : breakdowns) {
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const std::string file_name = test_path_ + "/" + caller + "_" +
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breakdown +
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"_percentage_of_accesses_summary";
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std::ifstream infile(file_name);
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std::string line;
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ASSERT_TRUE(getline(infile, line));
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double sum = 0;
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while (getline(infile, line)) {
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std::stringstream label_percent(line);
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std::string label;
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ASSERT_TRUE(getline(label_percent, label, ','));
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std::string percent;
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ASSERT_TRUE(getline(label_percent, percent, ','));
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ASSERT_FALSE(label_percent.good());
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sum += ParseDouble(percent);
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}
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ASSERT_EQ(100, sum);
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ASSERT_OK(env_->DeleteFile(file_name));
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}
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}
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}
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const std::vector<std::string> access_types{"user_access_only", "all_access"};
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const std::vector<std::string> prefix{"bt", "cf"};
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for (auto const& pre : prefix) {
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for (auto const& access_type : access_types) {
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{
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// Validate the access count summary.
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const std::string bt_access_count_summary = test_path_ + "/" + pre +
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"_" + access_type +
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"_access_count_summary";
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std::ifstream infile(bt_access_count_summary);
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std::string line;
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ASSERT_TRUE(getline(infile, line));
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double sum_percent = 0;
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while (getline(infile, line)) {
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std::stringstream bt_percent(line);
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std::string bt;
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ASSERT_TRUE(getline(bt_percent, bt, ','));
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std::string percent;
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ASSERT_TRUE(getline(bt_percent, percent, ','));
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sum_percent += ParseDouble(percent);
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}
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ASSERT_EQ(100.0, sum_percent);
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ASSERT_OK(env_->DeleteFile(bt_access_count_summary));
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}
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}
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}
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for (auto const& access_type : access_types) {
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std::vector<std::string> block_types{"Index", "Data", "Filter"};
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for (auto block_type : block_types) {
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// Validate reuse block timeline.
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const std::string reuse_blocks_timeline = test_path_ + "/" + block_type +
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"_" + access_type +
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"_5_reuse_blocks_timeline";
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std::ifstream infile(reuse_blocks_timeline);
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std::string line;
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ASSERT_TRUE(getline(infile, line)) << reuse_blocks_timeline;
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uint32_t index = 0;
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while (getline(infile, line)) {
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std::stringstream timeline(line);
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bool start_time = false;
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double sum = 0;
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while (timeline.good()) {
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std::string value;
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ASSERT_TRUE(getline(timeline, value, ','));
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if (!start_time) {
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start_time = true;
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continue;
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}
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sum += ParseDouble(value);
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}
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index++;
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ASSERT_LT(sum, 100.0 * index + 1) << reuse_blocks_timeline;
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}
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ASSERT_OK(env_->DeleteFile(reuse_blocks_timeline));
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}
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}
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std::stringstream ss(analyze_get_spatial_locality_labels_);
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while (ss.good()) {
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std::string l;
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ASSERT_TRUE(getline(ss, l, ','));
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const std::vector<std::string> spatial_locality_files{
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"_percent_ref_keys", "_percent_accesses_on_ref_keys",
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"_percent_data_size_on_ref_keys"};
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for (auto const& spatial_locality_file : spatial_locality_files) {
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const std::string filename = test_path_ + "/" + l + spatial_locality_file;
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std::ifstream infile(filename);
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std::string line;
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ASSERT_TRUE(getline(infile, line));
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double sum_percent = 0;
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uint32_t nrows = 0;
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while (getline(infile, line)) {
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std::stringstream bt_percent(line);
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std::string bt;
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ASSERT_TRUE(getline(bt_percent, bt, ','));
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std::string percent;
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ASSERT_TRUE(getline(bt_percent, percent, ','));
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sum_percent += ParseDouble(percent);
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nrows++;
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}
|
2020-03-12 16:39:46 +01:00
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ASSERT_EQ(11u, nrows);
|
2019-07-13 01:52:15 +02:00
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ASSERT_EQ(100.0, sum_percent);
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ASSERT_OK(env_->DeleteFile(filename));
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|
|
|
}
|
|
|
|
}
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
ASSERT_OK(env_->DeleteFile(block_cache_sim_config_path_));
|
|
|
|
}
|
|
|
|
|
2019-06-11 21:18:37 +02:00
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|
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TEST_F(BlockCacheTracerTest, MixedBlocks) {
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|
|
|
{
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|
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// Generate a trace file containing a mix of blocks.
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// It contains two SST files with 25 blocks of odd numbered block_key in
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|
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// kSSTStoringOddKeys and 25 blocks of even numbered blocks_key in
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// kSSTStoringEvenKeys.
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TraceOptions trace_opt;
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std::unique_ptr<TraceWriter> trace_writer;
|
2021-03-15 12:32:24 +01:00
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const auto& clock = env_->GetSystemClock();
|
2019-06-11 21:18:37 +02:00
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ASSERT_OK(NewFileTraceWriter(env_, env_options_, trace_file_path_,
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|
|
|
&trace_writer));
|
2021-03-15 12:32:24 +01:00
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BlockCacheTraceWriter writer(clock.get(), trace_opt,
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|
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std::move(trace_writer));
|
2019-06-11 21:18:37 +02:00
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ASSERT_OK(writer.WriteHeader());
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|
|
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// Write blocks of different types.
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|
|
|
WriteBlockAccess(&writer, 0, TraceType::kBlockTraceUncompressionDictBlock,
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10);
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WriteBlockAccess(&writer, 10, TraceType::kBlockTraceDataBlock, 10);
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WriteBlockAccess(&writer, 20, TraceType::kBlockTraceFilterBlock, 10);
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WriteBlockAccess(&writer, 30, TraceType::kBlockTraceIndexBlock, 10);
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WriteBlockAccess(&writer, 40, TraceType::kBlockTraceRangeDeletionBlock, 10);
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ASSERT_OK(env_->FileExists(trace_file_path_));
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|
|
}
|
|
|
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{
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|
|
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// Verify trace file is generated correctly.
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|
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std::unique_ptr<TraceReader> trace_reader;
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|
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ASSERT_OK(NewFileTraceReader(env_, env_options_, trace_file_path_,
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|
|
&trace_reader));
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|
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BlockCacheTraceReader reader(std::move(trace_reader));
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|
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BlockCacheTraceHeader header;
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ASSERT_OK(reader.ReadHeader(&header));
|
2020-03-12 16:39:46 +01:00
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ASSERT_EQ(static_cast<uint32_t>(kMajorVersion),
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header.rocksdb_major_version);
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ASSERT_EQ(static_cast<uint32_t>(kMinorVersion),
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|
|
header.rocksdb_minor_version);
|
2019-06-11 21:18:37 +02:00
|
|
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// Read blocks.
|
2019-08-09 22:09:04 +02:00
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BlockCacheTraceAnalyzer analyzer(
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trace_file_path_,
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/*output_miss_ratio_curve_path=*/"",
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|
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/*human_readable_trace_file_path=*/"",
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/*compute_reuse_distance=*/true,
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|
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|
/*mrc_only=*/false,
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|
/*is_block_cache_human_readable_trace=*/false,
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|
|
|
/*simulator=*/nullptr);
|
2019-06-11 21:18:37 +02:00
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|
|
// The analyzer ends when it detects an incomplete access record.
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|
ASSERT_EQ(Status::Incomplete(""), analyzer.Analyze());
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|
|
|
const uint64_t expected_num_cfs = 1;
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std::vector<uint64_t> expected_fds{kSSTStoringOddKeys, kSSTStoringEvenKeys};
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|
|
|
const std::vector<TraceType> expected_types{
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|
TraceType::kBlockTraceUncompressionDictBlock,
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|
|
|
TraceType::kBlockTraceDataBlock, TraceType::kBlockTraceFilterBlock,
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|
|
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TraceType::kBlockTraceIndexBlock,
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TraceType::kBlockTraceRangeDeletionBlock};
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const uint64_t expected_num_keys_per_type = 5;
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|
|
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auto& stats = analyzer.TEST_cf_aggregates_map();
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ASSERT_EQ(expected_num_cfs, stats.size());
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ASSERT_TRUE(stats.find(kDefaultColumnFamilyName) != stats.end());
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auto& cf_stats = stats.find(kDefaultColumnFamilyName)->second;
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ASSERT_EQ(expected_fds.size(), cf_stats.fd_aggregates_map.size());
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|
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for (auto fd_id : expected_fds) {
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ASSERT_TRUE(cf_stats.fd_aggregates_map.find(fd_id) !=
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cf_stats.fd_aggregates_map.end());
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ASSERT_EQ(kLevel, cf_stats.fd_aggregates_map.find(fd_id)->second.level);
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auto& block_type_aggregates_map = cf_stats.fd_aggregates_map.find(fd_id)
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->second.block_type_aggregates_map;
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ASSERT_EQ(expected_types.size(), block_type_aggregates_map.size());
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|
|
uint32_t key_id = 0;
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|
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for (auto type : expected_types) {
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ASSERT_TRUE(block_type_aggregates_map.find(type) !=
|
|
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|
block_type_aggregates_map.end());
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|
|
|
auto& block_access_info_map =
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block_type_aggregates_map.find(type)->second.block_access_info_map;
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|
|
// Each block type has 5 blocks.
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|
|
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ASSERT_EQ(expected_num_keys_per_type, block_access_info_map.size());
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|
|
|
for (uint32_t i = 0; i < 10; i++) {
|
|
|
|
// Verify that odd numbered blocks are stored in kSSTStoringOddKeys
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|
|
|
// and even numbered blocks are stored in kSSTStoringEvenKeys.
|
|
|
|
auto key_id_str = kBlockKeyPrefix + std::to_string(key_id);
|
|
|
|
if (fd_id == kSSTStoringOddKeys) {
|
|
|
|
if (key_id % 2 == 1) {
|
|
|
|
AssertBlockAccessInfo(key_id, type, block_access_info_map);
|
|
|
|
} else {
|
|
|
|
ASSERT_TRUE(block_access_info_map.find(key_id_str) ==
|
|
|
|
block_access_info_map.end());
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (key_id % 2 == 1) {
|
|
|
|
ASSERT_TRUE(block_access_info_map.find(key_id_str) ==
|
|
|
|
block_access_info_map.end());
|
|
|
|
} else {
|
|
|
|
AssertBlockAccessInfo(key_id, type, block_access_info_map);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
key_id++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-02-20 21:07:53 +01:00
|
|
|
} // namespace ROCKSDB_NAMESPACE
|
2019-06-11 21:18:37 +02:00
|
|
|
|
|
|
|
int main(int argc, char** argv) {
|
|
|
|
::testing::InitGoogleTest(&argc, argv);
|
|
|
|
return RUN_ALL_TESTS();
|
|
|
|
}
|
Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-18 01:33:40 +02:00
|
|
|
#endif // GFLAG
|
|
|
|
#else
|
|
|
|
#include <stdio.h>
|
|
|
|
int main(int /*argc*/, char** /*argv*/) {
|
|
|
|
fprintf(stderr,
|
|
|
|
"block_cache_trace_analyzer_test is not supported in ROCKSDB_LITE\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif // ROCKSDB_LITE
|