Align StatisticsImpl / StatisticsData (#4036)
Summary: Pinned the alignment of StatisticsData to the cacheline size rather than just extending its size (which could go over two cache lines)if unaligned in allocation. Avoid compile errors in the process as per individual commit messages. strengthen static_assert to CACHELINE rather than the highest common multiple. Closes https://github.com/facebook/rocksdb/pull/4036 Differential Revision: D8582844 Pulled By: yiwu-arbug fbshipit-source-id: 363c37029f28e6093e06c60b987bca9aa204bc71
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4
Makefile
4
Makefile
@ -102,6 +102,10 @@ OPT += -momit-leaf-frame-pointer
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endif
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endif
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ifeq (,$(shell $(CXX) -fsyntax-only -faligned-new -xc++ /dev/null 2>&1))
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CXXFLAGS += -faligned-new -DHAVE_ALIGNED_NEW
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endif
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ifeq (,$(shell $(CXX) -fsyntax-only -maltivec -xc /dev/null 2>&1))
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CXXFLAGS += -DHAS_ALTIVEC
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CFLAGS += -DHAS_ALTIVEC
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@ -22,6 +22,11 @@
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#define ROCKSDB_FIELD_UNUSED
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#endif // __clang__
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#ifndef STRINGIFY
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#define STRINGIFY(x) #x
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#define TOSTRING(x) STRINGIFY(x)
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#endif
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namespace rocksdb {
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enum TickersInternal : uint32_t {
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@ -35,7 +40,7 @@ enum HistogramsInternal : uint32_t {
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};
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class StatisticsImpl : public Statistics {
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class ALIGN_AS(CACHE_LINE_SIZE) StatisticsImpl : public Statistics {
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public:
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StatisticsImpl(std::shared_ptr<Statistics> stats,
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bool enable_internal_stats);
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@ -69,17 +74,23 @@ class StatisticsImpl : public Statistics {
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// cores can never share the same cache line.
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//
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// Alignment attributes expand to nothing depending on the platform
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struct StatisticsData {
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struct ALIGN_AS(CACHE_LINE_SIZE) StatisticsData {
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std::atomic_uint_fast64_t tickers_[INTERNAL_TICKER_ENUM_MAX] = {{0}};
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HistogramImpl histograms_[INTERNAL_HISTOGRAM_ENUM_MAX];
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#ifndef HAVE_ALIGNED_NEW
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char
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padding[(CACHE_LINE_SIZE -
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(INTERNAL_TICKER_ENUM_MAX * sizeof(std::atomic_uint_fast64_t) +
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INTERNAL_HISTOGRAM_ENUM_MAX * sizeof(HistogramImpl)) %
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CACHE_LINE_SIZE)] ROCKSDB_FIELD_UNUSED;
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#endif
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void *operator new(size_t s) { return port::cacheline_aligned_alloc(s); }
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void *operator new[](size_t s) { return port::cacheline_aligned_alloc(s); }
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void operator delete(void *p) { port::cacheline_aligned_free(p); }
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void operator delete[](void *p) { port::cacheline_aligned_free(p); }
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};
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static_assert(sizeof(StatisticsData) % 64 == 0, "Expected 64-byte aligned");
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static_assert(sizeof(StatisticsData) % CACHE_LINE_SIZE == 0, "Expected " TOSTRING(CACHE_LINE_SIZE) "-byte aligned");
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CoreLocalArray<StatisticsData> per_core_stats_;
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