fix: build on risc-v (#9215)
Summary:
Patch is modified from ~~https://reviews.llvm.org/file/data/du5ol5zctyqw53ma7dwz/PHID-FILE-knherxziu4tl4erti5ab/file~~
Tested on Arch Linux riscv64gc (qemu)
UPDATE: Seems like the above link is broken, so I tried to search for a link pointing to the original merge request. It turned out to me that the LLVM guys are cherry-picking from `google/benchmark`, and the upstream should be this:
808571a52f/src/cycleclock.h (L190)
Pull Request resolved: https://github.com/facebook/rocksdb/pull/9215
Reviewed By: siying, jay-zhuang
Differential Revision: D34170586
Pulled By: riversand963
fbshipit-source-id: 41b16b9f7f3bb0f3e7b26bb078eb575499c0f0f4
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@ -137,6 +137,23 @@ static inline tokutime_t toku_time_now(void) {
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uint64_t result;
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asm volatile("stckf %0" : "=Q"(result) : : "cc");
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return result;
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#elif defined(__riscv) && __riscv_xlen == 32
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uint32_t cycles_lo, cycles_hi0, cycles_hi1;
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// Implemented in assembly because Clang insisted on branching.
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asm volatile(
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"rdcycleh %0\n"
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"rdcycle %1\n"
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"rdcycleh %2\n"
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"sub %0, %0, %2\n"
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"seqz %0, %0\n"
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"sub %0, zero, %0\n"
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"and %1, %1, %0\n"
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: "=r"(cycles_hi0), "=r"(cycles_lo), "=r"(cycles_hi1));
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return (static_cast<uint64_t>(cycles_hi1) << 32) | cycles_lo;
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#elif defined(__riscv) && __riscv_xlen == 64
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uint64_t cycles;
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asm volatile("rdcycle %0" : "=r"(cycles));
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return cycles;
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#else
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#error No timer implementation for this platform
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#endif
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