9f0bd56889
Summary: This PR creates cache_simulator.h file. It contains a CacheSimulator that runs against a block cache trace record. We can add alternative cache simulators derived from CacheSimulator later. For example, this PR adds a PrioritizedCacheSimulator that inserts filter/index/uncompressed dictionary blocks with high priority. Pull Request resolved: https://github.com/facebook/rocksdb/pull/5517 Test Plan: make clean && COMPILE_WITH_ASAN=1 make check -j32 Differential Revision: D16043689 Pulled By: HaoyuHuang fbshipit-source-id: 65f28ed52b866ffb0e6eceffd7f9ca7c45bb680d
105 lines
4.1 KiB
C++
105 lines
4.1 KiB
C++
// Copyright (c) 2011-present, Facebook, Inc. All rights reserved.
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// This source code is licensed under both the GPLv2 (found in the
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// COPYING file in the root directory) and Apache 2.0 License
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// (found in the LICENSE.Apache file in the root directory).
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#include "utilities/simulator_cache/cache_simulator.h"
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namespace rocksdb {
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CacheSimulator::CacheSimulator(std::shared_ptr<SimCache> sim_cache)
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: sim_cache_(sim_cache) {}
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void CacheSimulator::Access(const BlockCacheTraceRecord& access) {
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auto handle = sim_cache_->Lookup(access.block_key);
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if (handle == nullptr && !access.no_insert) {
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sim_cache_->Insert(access.block_key, /*value=*/nullptr, access.block_size,
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/*deleter=*/nullptr, /*handle=*/nullptr);
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}
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}
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void PrioritizedCacheSimulator::Access(const BlockCacheTraceRecord& access) {
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auto handle = sim_cache_->Lookup(access.block_key);
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if (handle == nullptr && !access.no_insert) {
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Cache::Priority priority = Cache::Priority::LOW;
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if (access.block_type == TraceType::kBlockTraceFilterBlock ||
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access.block_type == TraceType::kBlockTraceIndexBlock ||
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access.block_type == TraceType::kBlockTraceUncompressionDictBlock) {
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priority = Cache::Priority::HIGH;
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}
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sim_cache_->Insert(access.block_key, /*value=*/nullptr, access.block_size,
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/*deleter=*/nullptr, /*handle=*/nullptr, priority);
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}
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}
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double CacheSimulator::miss_ratio() {
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uint64_t hits = sim_cache_->get_hit_counter();
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uint64_t misses = sim_cache_->get_miss_counter();
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uint64_t total_accesses = hits + misses;
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return static_cast<double>(misses * 100.0 / total_accesses);
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}
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uint64_t CacheSimulator::total_accesses() {
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return sim_cache_->get_hit_counter() + sim_cache_->get_miss_counter();
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}
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BlockCacheTraceSimulator::BlockCacheTraceSimulator(
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uint64_t warmup_seconds, uint32_t downsample_ratio,
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const std::vector<CacheConfiguration>& cache_configurations)
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: warmup_seconds_(warmup_seconds),
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downsample_ratio_(downsample_ratio),
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cache_configurations_(cache_configurations) {}
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Status BlockCacheTraceSimulator::InitializeCaches() {
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for (auto const& config : cache_configurations_) {
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for (auto cache_capacity : config.cache_capacities) {
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// Scale down the cache capacity since the trace contains accesses on
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// 1/'downsample_ratio' blocks.
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uint64_t simulate_cache_capacity = cache_capacity / downsample_ratio_;
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std::shared_ptr<CacheSimulator> sim_cache;
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if (config.cache_name == "lru") {
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sim_cache = std::make_shared<CacheSimulator>(NewSimCache(
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NewLRUCache(simulate_cache_capacity, config.num_shard_bits,
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/*strict_capacity_limit=*/false,
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/*high_pri_pool_ratio=*/0),
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/*real_cache=*/nullptr, config.num_shard_bits));
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} else if (config.cache_name == "lru_priority") {
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sim_cache = std::make_shared<PrioritizedCacheSimulator>(NewSimCache(
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NewLRUCache(simulate_cache_capacity, config.num_shard_bits,
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/*strict_capacity_limit=*/false,
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/*high_pri_pool_ratio=*/0.5),
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/*real_cache=*/nullptr, config.num_shard_bits));
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} else {
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// Not supported.
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return Status::InvalidArgument("Unknown cache name " +
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config.cache_name);
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}
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sim_caches_[config].push_back(sim_cache);
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}
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}
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return Status::OK();
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}
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void BlockCacheTraceSimulator::Access(const BlockCacheTraceRecord& access) {
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if (trace_start_time_ == 0) {
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trace_start_time_ = access.access_timestamp;
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}
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// access.access_timestamp is in microseconds.
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if (!warmup_complete_ &&
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trace_start_time_ + warmup_seconds_ * kMicrosInSecond <=
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access.access_timestamp) {
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for (auto& config_caches : sim_caches_) {
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for (auto& sim_cache : config_caches.second) {
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sim_cache->reset_counter();
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}
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}
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warmup_complete_ = true;
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}
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for (auto& config_caches : sim_caches_) {
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for (auto& sim_cache : config_caches.second) {
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sim_cache->Access(access);
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}
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}
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}
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} // namespace rocksdb
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