e648c1d9eb
Summary: This PR optimizes the hybrid row-block cache simulator. If a Get request hits the cache, we treat all its future accesses as hits. Consider a Get request (no snapshot) accesses multiple files, e.g, file1, file2, file3. We construct the row key as "fdnumber_key_0". Before this PR, if it hits the cache when searching the key in file1, we continue to process its accesses in file2 and file3 which is unnecessary. With this PR, if "file1_key_0" is in the cache, we treat all future accesses of this Get request as hits. Pull Request resolved: https://github.com/facebook/rocksdb/pull/5616 Differential Revision: D16453187 Pulled By: HaoyuHuang fbshipit-source-id: 56f3169cc322322305baaf5543226a0824fae19f
232 lines
8.0 KiB
C++
232 lines
8.0 KiB
C++
// Copyright (c) 2011-present, Facebook, Inc. All rights reserved.
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// This source code is licensed under both the GPLv2 (found in the
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// COPYING file in the root directory) and Apache 2.0 License
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// (found in the LICENSE.Apache file in the root directory).
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#pragma once
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#include <unordered_map>
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#include "cache/lru_cache.h"
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#include "trace_replay/block_cache_tracer.h"
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namespace rocksdb {
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// A cache configuration provided by user.
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struct CacheConfiguration {
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std::string cache_name; // LRU.
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uint32_t num_shard_bits;
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uint64_t ghost_cache_capacity; // ghost cache capacity in bytes.
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std::vector<uint64_t>
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cache_capacities; // simulate cache capacities in bytes.
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bool operator==(const CacheConfiguration& o) const {
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return cache_name == o.cache_name && num_shard_bits == o.num_shard_bits &&
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ghost_cache_capacity == o.ghost_cache_capacity;
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}
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bool operator<(const CacheConfiguration& o) const {
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return cache_name < o.cache_name ||
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(cache_name == o.cache_name && num_shard_bits < o.num_shard_bits) ||
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(cache_name == o.cache_name && num_shard_bits == o.num_shard_bits &&
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ghost_cache_capacity < o.ghost_cache_capacity);
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}
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};
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class MissRatioStats {
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public:
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void reset_counter() {
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num_misses_ = 0;
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num_accesses_ = 0;
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user_accesses_ = 0;
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user_misses_ = 0;
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}
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double miss_ratio() const {
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if (num_accesses_ == 0) {
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return -1;
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}
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return static_cast<double>(num_misses_ * 100.0 / num_accesses_);
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}
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uint64_t total_accesses() const { return num_accesses_; }
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uint64_t total_misses() const { return num_misses_; }
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const std::map<uint64_t, uint64_t>& num_accesses_timeline() const {
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return num_accesses_timeline_;
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}
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const std::map<uint64_t, uint64_t>& num_misses_timeline() const {
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return num_misses_timeline_;
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}
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double user_miss_ratio() const {
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if (user_accesses_ == 0) {
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return -1;
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}
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return static_cast<double>(user_misses_ * 100.0 / user_accesses_);
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}
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uint64_t user_accesses() const { return user_accesses_; }
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uint64_t user_misses() const { return user_misses_; }
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void UpdateMetrics(uint64_t timestamp_in_ms, bool is_user_access,
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bool is_cache_miss);
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private:
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uint64_t num_accesses_ = 0;
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uint64_t num_misses_ = 0;
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uint64_t user_accesses_ = 0;
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uint64_t user_misses_ = 0;
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std::map<uint64_t, uint64_t> num_accesses_timeline_;
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std::map<uint64_t, uint64_t> num_misses_timeline_;
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};
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// A ghost cache admits an entry on its second access.
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class GhostCache {
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public:
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explicit GhostCache(std::shared_ptr<Cache> sim_cache);
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~GhostCache() = default;
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// No copy and move.
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GhostCache(const GhostCache&) = delete;
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GhostCache& operator=(const GhostCache&) = delete;
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GhostCache(GhostCache&&) = delete;
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GhostCache& operator=(GhostCache&&) = delete;
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// Returns true if the lookup_key is in the ghost cache.
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// Returns false otherwise.
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bool Admit(const Slice& lookup_key);
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private:
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std::shared_ptr<Cache> sim_cache_;
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};
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// A cache simulator that runs against a block cache trace.
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class CacheSimulator {
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public:
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CacheSimulator(std::unique_ptr<GhostCache>&& ghost_cache,
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std::shared_ptr<Cache> sim_cache);
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virtual ~CacheSimulator() = default;
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// No copy and move.
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CacheSimulator(const CacheSimulator&) = delete;
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CacheSimulator& operator=(const CacheSimulator&) = delete;
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CacheSimulator(CacheSimulator&&) = delete;
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CacheSimulator& operator=(CacheSimulator&&) = delete;
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virtual void Access(const BlockCacheTraceRecord& access);
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void reset_counter() { miss_ratio_stats_.reset_counter(); }
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const MissRatioStats& miss_ratio_stats() const { return miss_ratio_stats_; }
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protected:
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MissRatioStats miss_ratio_stats_;
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std::unique_ptr<GhostCache> ghost_cache_;
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std::shared_ptr<Cache> sim_cache_;
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};
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// A prioritized cache simulator that runs against a block cache trace.
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// It inserts missing index/filter/uncompression-dictionary blocks with high
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// priority in the cache.
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class PrioritizedCacheSimulator : public CacheSimulator {
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public:
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PrioritizedCacheSimulator(std::unique_ptr<GhostCache>&& ghost_cache,
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std::shared_ptr<Cache> sim_cache)
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: CacheSimulator(std::move(ghost_cache), sim_cache) {}
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void Access(const BlockCacheTraceRecord& access) override;
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protected:
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// Access the key-value pair and returns true upon a cache miss.
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void AccessKVPair(const Slice& key, uint64_t value_size,
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Cache::Priority priority,
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const BlockCacheTraceRecord& access, bool no_insert,
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bool is_user_access, bool* is_cache_miss, bool* admitted,
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bool update_metrics);
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Cache::Priority ComputeBlockPriority(
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const BlockCacheTraceRecord& access) const;
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};
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// A hybrid row and block cache simulator. It looks up/inserts key-value pairs
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// referenced by Get/MultiGet requests, and not their accessed index/filter/data
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// blocks.
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//
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// Upon a Get/MultiGet request, it looks up the referenced key first.
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// If it observes a cache hit, future block accesses on this key-value pair is
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// skipped since the request is served already. Otherwise, it continues to look
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// up/insert its index/filter/data blocks. It also inserts the referenced
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// key-value pair in the cache for future lookups.
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class HybridRowBlockCacheSimulator : public PrioritizedCacheSimulator {
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public:
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HybridRowBlockCacheSimulator(std::unique_ptr<GhostCache>&& ghost_cache,
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std::shared_ptr<Cache> sim_cache,
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bool insert_blocks_upon_row_kvpair_miss)
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: PrioritizedCacheSimulator(std::move(ghost_cache), sim_cache),
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insert_blocks_upon_row_kvpair_miss_(
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insert_blocks_upon_row_kvpair_miss) {}
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void Access(const BlockCacheTraceRecord& access) override;
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private:
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enum InsertResult : char {
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INSERTED,
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ADMITTED,
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NO_INSERT,
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};
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// We set is_complete to true when the referenced row-key of a get request
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// hits the cache. If is_complete is true, we treat future accesses of this
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// get request as hits.
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//
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// For each row key, it stores an enum. It is INSERTED when the
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// kv-pair has been inserted into the cache, ADMITTED if it should be inserted
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// but haven't been, NO_INSERT if it should not be inserted.
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//
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// A kv-pair is in ADMITTED state when we encounter this kv-pair but do not
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// know its size. This may happen if the first access on the referenced key is
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// an index/filter block.
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struct GetRequestStatus {
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bool is_complete = false;
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std::map<std::string, InsertResult> row_key_status;
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};
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// A map stores get_id to a map of row keys.
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std::map<uint64_t, GetRequestStatus> getid_status_map_;
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bool insert_blocks_upon_row_kvpair_miss_;
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};
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// A block cache simulator that reports miss ratio curves given a set of cache
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// configurations.
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class BlockCacheTraceSimulator {
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public:
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// warmup_seconds: The number of seconds to warmup simulated caches. The
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// hit/miss counters are reset after the warmup completes.
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BlockCacheTraceSimulator(
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uint64_t warmup_seconds, uint32_t downsample_ratio,
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const std::vector<CacheConfiguration>& cache_configurations);
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~BlockCacheTraceSimulator() = default;
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// No copy and move.
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BlockCacheTraceSimulator(const BlockCacheTraceSimulator&) = delete;
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BlockCacheTraceSimulator& operator=(const BlockCacheTraceSimulator&) = delete;
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BlockCacheTraceSimulator(BlockCacheTraceSimulator&&) = delete;
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BlockCacheTraceSimulator& operator=(BlockCacheTraceSimulator&&) = delete;
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Status InitializeCaches();
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void Access(const BlockCacheTraceRecord& access);
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const std::map<CacheConfiguration,
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std::vector<std::shared_ptr<CacheSimulator>>>&
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sim_caches() const {
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return sim_caches_;
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}
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private:
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const uint64_t warmup_seconds_;
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const uint32_t downsample_ratio_;
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const std::vector<CacheConfiguration> cache_configurations_;
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bool warmup_complete_ = false;
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std::map<CacheConfiguration, std::vector<std::shared_ptr<CacheSimulator>>>
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sim_caches_;
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uint64_t trace_start_time_ = 0;
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};
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} // namespace rocksdb
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