2004-04-23 21:54:30 +02:00
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/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_mem.c,v 1.25 2002/09/16 18:06:08 eich Exp $ */
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2003-11-14 17:48:57 +01:00
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/*
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* XFree86 int10 module
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* execute BIOS int 10h calls in x86 real mode environment
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* Copyright 1999 Egbert Eich
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*/
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2005-07-03 09:02:09 +02:00
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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2006-02-10 23:00:30 +01:00
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#include <string.h>
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#include <stdlib.h>
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2003-11-14 17:48:57 +01:00
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#include "xf86.h"
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#include "xf86_OSproc.h"
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#include "compiler.h"
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#include "xf86Pci.h"
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#define _INT10_PRIVATE
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#if 0
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#include "int10Defines.h"
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#endif
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#include "xf86int10.h"
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#define REG pInt
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typedef enum {
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OPT_NOINT10,
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OPT_INIT_PRIMARY,
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OPT_BIOS_LOCATION
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} INT10Opts;
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static const OptionInfoRec INT10Options[] = {
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{OPT_NOINT10, "NoINT10", OPTV_BOOLEAN, {0}, FALSE },
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{OPT_INIT_PRIMARY, "InitPrimary", OPTV_BOOLEAN, {0}, FALSE },
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{OPT_BIOS_LOCATION, "BiosLocation", OPTV_STRING, {0}, FALSE },
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{ -1, NULL, OPTV_NONE, {0}, FALSE },
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};
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#ifdef DEBUG
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void
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dprint(unsigned long start, unsigned long size)
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{
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int i,j;
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char *c = (char *)start;
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for (j = 0; j < (size >> 4); j++) {
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char *d = c;
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ErrorF("\n0x%lx: ",(unsigned long)c);
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for (i = 0; i<16; i++)
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ErrorF("%2.2x ",(unsigned char) (*(c++)));
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c = d;
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for (i = 0; i<16; i++) {
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ErrorF("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
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(unsigned char) (*(c)): '.');
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c++;
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}
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}
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ErrorF("\n");
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}
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#endif
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#ifndef _PC
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/*
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* here we are really paranoid about faking a "real"
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* BIOS. Most of this information was pulled from
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* dosemu.
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*/
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void
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setup_int_vect(xf86Int10InfoPtr pInt)
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{
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int i;
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/* let the int vects point to the SYS_BIOS seg */
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for (i = 0; i < 0x80; i++) {
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MEM_WW(pInt, i << 2, 0);
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MEM_WW(pInt, (i << 2) + 2, SYS_BIOS >> 4);
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}
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reset_int_vect(pInt);
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/* font tables default location (int 1F) */
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MEM_WW(pInt,0x1f<<2,0xfa6e);
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/* int 11 default location (Get Equipment Configuration) */
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MEM_WW(pInt, 0x11 << 2, 0xf84d);
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/* int 12 default location (Get Conventional Memory Size) */
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MEM_WW(pInt, 0x12 << 2, 0xf841);
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/* int 15 default location (I/O System Extensions) */
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MEM_WW(pInt, 0x15 << 2, 0xf859);
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/* int 1A default location (RTC, PCI and others) */
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MEM_WW(pInt, 0x1a << 2, 0xff6e);
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/* int 05 default location (Bound Exceeded) */
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MEM_WW(pInt, 0x05 << 2, 0xff54);
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/* int 08 default location (Double Fault) */
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MEM_WW(pInt, 0x08 << 2, 0xfea5);
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/* int 13 default location (Disk) */
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MEM_WW(pInt, 0x13 << 2, 0xec59);
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/* int 0E default location (Page Fault) */
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MEM_WW(pInt, 0x0e << 2, 0xef57);
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/* int 17 default location (Parallel Port) */
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MEM_WW(pInt, 0x17 << 2, 0xefd2);
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/* fdd table default location (int 1e) */
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MEM_WW(pInt, 0x1e << 2, 0xefc7);
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/* Set Equipment flag to VGA */
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i = MEM_RB(pInt, 0x0410) & 0xCF;
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MEM_WB(pInt, 0x0410, i);
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/* XXX Perhaps setup more of the BDA here. See also int42(0x00). */
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}
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#endif
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int
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setup_system_bios(void *base_addr)
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{
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char *base = (char *) base_addr;
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/*
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* we trap the "industry standard entry points" to the BIOS
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* and all other locations by filling them with "hlt"
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* TODO: implement hlt-handler for these
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*/
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memset(base, 0xf4, 0x10000);
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/* set bios date */
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strcpy(base + 0x0FFF5, "06/11/99");
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/* set up eisa ident string */
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strcpy(base + 0x0FFD9, "PCI_ISA");
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/* write system model id for IBM-AT */
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*((unsigned char *)(base + 0x0FFFE)) = 0xfc;
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return 1;
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}
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void
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reset_int_vect(xf86Int10InfoPtr pInt)
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{
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/*
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* This table is normally located at 0xF000:0xF0A4. However, int 0x42,
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* function 0 (Mode Set) expects it (or a copy) somewhere in the bottom
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* 64kB. Note that because this data doesn't survive POST, int 0x42 should
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* only be used during EGA/VGA BIOS initialisation.
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*/
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static const CARD8 VideoParms[] = {
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/* Timing for modes 0x00 & 0x01 */
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0x38, 0x28, 0x2d, 0x0a, 0x1f, 0x06, 0x19, 0x1c,
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0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
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/* Timing for modes 0x02 & 0x03 */
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0x71, 0x50, 0x5a, 0x0a, 0x1f, 0x06, 0x19, 0x1c,
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0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
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/* Timing for modes 0x04, 0x05 & 0x06 */
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0x38, 0x28, 0x2d, 0x0a, 0x7f, 0x06, 0x64, 0x70,
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0x02, 0x01, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
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/* Timing for mode 0x07 */
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0x61, 0x50, 0x52, 0x0f, 0x19, 0x06, 0x19, 0x19,
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0x02, 0x0d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
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/* Display page lengths in little endian order */
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0x00, 0x08, /* Modes 0x00 and 0x01 */
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0x00, 0x10, /* Modes 0x02 and 0x03 */
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0x00, 0x40, /* Modes 0x04 and 0x05 */
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0x00, 0x40, /* Modes 0x06 and 0x07 */
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/* Number of columns for each mode */
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40, 40, 80, 80, 40, 40, 80, 80,
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/* CGA Mode register value for each mode */
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0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29,
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/* Padding */
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0x00, 0x00, 0x00, 0x00
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};
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int i;
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for (i = 0; i < sizeof(VideoParms); i++)
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MEM_WB(pInt, i + (0x1000 - sizeof(VideoParms)), VideoParms[i]);
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MEM_WW(pInt, 0x1d << 2, 0x1000 - sizeof(VideoParms));
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MEM_WW(pInt, (0x1d << 2) + 2, 0);
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MEM_WW(pInt, 0x10 << 2, 0xf065);
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MEM_WW(pInt, (0x10 << 2) + 2, SYS_BIOS >> 4);
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MEM_WW(pInt, 0x42 << 2, 0xf065);
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MEM_WW(pInt, (0x42 << 2) + 2, SYS_BIOS >> 4);
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MEM_WW(pInt, 0x6D << 2, 0xf065);
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MEM_WW(pInt, (0x6D << 2) + 2, SYS_BIOS >> 4);
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}
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void
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set_return_trap(xf86Int10InfoPtr pInt)
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{
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/*
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* Here we set the exit condition: We return when we encounter
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* 'hlt' (=0xf4), which we locate at address 0x600 in x86 memory.
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*/
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MEM_WB(pInt, 0x0600, 0xf4);
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/*
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* Allocate a segment for the stack
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*/
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xf86Int10AllocPages(pInt, 1, &pInt->stackseg);
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}
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void *
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xf86HandleInt10Options(ScrnInfoPtr pScrn, int entityIndex)
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{
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EntityInfoPtr pEnt = xf86GetEntityInfo(entityIndex);
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OptionInfoPtr options = NULL;
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if (pEnt->device) {
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pointer configOptions = NULL;
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/* Check if xf86CollectOptions() has already been called */
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if (((pEnt->index < 0) ||
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!pScrn ||
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!(configOptions = pScrn->options)) &&
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pEnt->device)
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configOptions = pEnt->device->options;
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if (configOptions) {
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if (!(options = (OptionInfoPtr) xalloc(sizeof(INT10Options))))
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return NULL;
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(void)memcpy(options, INT10Options, sizeof(INT10Options));
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xf86ProcessOptions(pScrn->scrnIndex, configOptions, options);
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}
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}
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xfree(pEnt);
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return options;
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}
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Bool
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int10skip(void* options)
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{
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Bool noint10 = FALSE;
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if (!options) return FALSE;
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xf86GetOptValBool(options, OPT_NOINT10, &noint10);
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return noint10;
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}
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Bool
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int10_check_bios(int scrnIndex, int codeSeg, unsigned char* vbiosMem)
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{
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int size;
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if ((codeSeg & 0x1f) || /* Not 512-byte aligned otherwise */
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((codeSeg << 4) < V_BIOS) ||
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((codeSeg << 4) >= SYS_SIZE))
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return FALSE;
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if (xf86IsPc98())
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return FALSE;
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if ((*vbiosMem != 0x55) || (*(vbiosMem+1) != 0xAA) || !*(vbiosMem+2))
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return FALSE;
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size = *(vbiosMem + 2) * 512;
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if ((size + (codeSeg << 4)) > SYS_SIZE)
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return FALSE;
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if (bios_checksum(vbiosMem, size))
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xf86DrvMsg(scrnIndex, X_WARNING, "Bad V_BIOS checksum\n");
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return TRUE;
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}
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Bool
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initPrimary(void* options)
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{
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Bool initPrimary = FALSE;
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if (!options) return FALSE;
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xf86GetOptValBool(options, OPT_INIT_PRIMARY, &initPrimary);
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return initPrimary;
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}
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/*
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* xf86int10ParseBiosLocation(): allows to set the location of the
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* BIOS. One may select a BIOS of another card for posting or the
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* legacy V_BIOS range located at 0xc0000 or an alternative address
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* (BUS_ISA).
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* This is only useful under very special circumstances and should
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* be used with extreme care.
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*/
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void
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xf86int10ParseBiosLocation(void* options,
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xf86int10BiosLocationPtr bios)
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{
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char *s;
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char *p;
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char *str = NULL;
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if (options)
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str = xf86GetOptValString(options,OPT_BIOS_LOCATION);
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bios->bus = BUS_NONE;
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if (!str)
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return;
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s = xstrdup(str);
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p = strtok(s,":");
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if (xf86NameCmp(p,"pci") == 0) bios->bus = BUS_PCI;
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else
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if (xf86NameCmp(p,"primary") == 0) bios->bus = BUS_ISA;
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xfree(s);
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if (bios->bus == BUS_NONE) return;
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s = xstrdup(str);
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p = strchr(s, ':');
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switch (bios->bus) {
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case BUS_ISA:
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if (p)
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bios->location.legacy = atoi(++p);
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else
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bios->location.legacy = 0;
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break;
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case BUS_PCI:
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if (p) {
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bios->location.pci.bus = atoi(++p);
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if ((p = strchr(p, ':'))) {
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bios->location.pci.dev = atoi(++p);
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if ((p = strchr(p, ':'))) {
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bios->location.pci.func = atoi(++p);
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break;
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}
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}
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}
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/* fall through */
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bios->bus = BUS_NONE;
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break;
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default:
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break;
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}
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xfree(s);
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}
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2006-07-15 00:13:35 +02:00
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BusType
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xf86int10GetBiosLocationType(const xf86Int10InfoPtr pInt,
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const xf86int10BiosLocationPtr bios)
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{
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BusType location_type = bios->bus;
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switch (location_type) {
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case BUS_PCI:
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xf86DrvMsg(pInt->scrnIndex,X_CONFIG,"Overriding bios location: "
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"PCI:%i:%i%i\n",bios->location.pci.bus,
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bios->location.pci.dev,bios->location.pci.func);
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break;
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case BUS_ISA:
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if (bios->location.legacy)
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xf86DrvMsg(pInt->scrnIndex,X_CONFIG,"Overriding bios location: "
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"Legacy:0x%x\n",bios->location.legacy);
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else
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xf86DrvMsg(pInt->scrnIndex,X_CONFIG,"Overriding bios location: "
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"Legacy\n");
|
|
|
|
break;
|
|
|
|
case BUS_NONE: {
|
|
|
|
EntityInfoPtr pEnt = xf86GetEntityInfo(pInt->entityIndex);
|
|
|
|
location_type = pEnt->location.type;
|
|
|
|
xfree(pEnt);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return location_type;
|
|
|
|
}
|
2003-11-14 17:48:57 +01:00
|
|
|
|
2006-07-15 00:13:35 +02:00
|
|
|
|
|
|
|
#define CHECK_V_SEGMENT_RANGE(x) \
|
|
|
|
if (((x) << 4) < V_BIOS) { \
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_ERROR, \
|
|
|
|
"V_BIOS address 0x%lx out of range\n", \
|
|
|
|
(unsigned long)(x) << 4); \
|
|
|
|
return FALSE; \
|
|
|
|
}
|
|
|
|
|
|
|
|
Bool
|
|
|
|
xf86int10GetBiosSegment(xf86Int10InfoPtr pInt,
|
|
|
|
const xf86int10BiosLocationPtr bios, void * base)
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
int cs = ~0;
|
|
|
|
int segments[4];
|
|
|
|
const char * format;
|
|
|
|
|
|
|
|
|
|
|
|
if (bios->bus == BUS_ISA && bios->location.legacy) {
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_CONFIG,
|
|
|
|
"Overriding BIOS location: 0x%x\n",
|
|
|
|
bios->location.legacy);
|
|
|
|
|
|
|
|
segments[0] = bios->location.legacy >> 4;
|
|
|
|
segments[1] = ~0;
|
|
|
|
|
|
|
|
format = "No V_BIOS at specified address 0x%lx\n";
|
|
|
|
} else {
|
|
|
|
if (bios->bus == BUS_PCI) {
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_WARNING,
|
|
|
|
"Option BiosLocation for primary device ignored: "
|
|
|
|
"It points to PCI.\n");
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_WARNING,
|
|
|
|
"You must set Option InitPrimary also\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
segments[0] = MEM_RW(pInt, (0x10 << 2) + 2);
|
|
|
|
segments[1] = MEM_RW(pInt, (0x42 << 2) + 2);
|
|
|
|
segments[2] = V_BIOS >> 4;
|
|
|
|
segments[3] = ~0;
|
|
|
|
|
|
|
|
format = "No V_BIOS found\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; segments[i] != ~0; i++) {
|
|
|
|
unsigned char * vbiosMem;
|
|
|
|
|
|
|
|
cs = segments[i];
|
|
|
|
|
|
|
|
CHECK_V_SEGMENT_RANGE(cs);
|
|
|
|
vbiosMem = (unsigned char *)base + (cs << 4);
|
|
|
|
if (int10_check_bios(pInt->scrnIndex, cs, vbiosMem)) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (segments[i] == ~0) {
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_ERROR, format, (unsigned long)cs << 4);
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
xf86DrvMsg(pInt->scrnIndex, X_INFO, "Primary V_BIOS segment is: 0x%lx\n",
|
|
|
|
(unsigned long)cs);
|
|
|
|
|
|
|
|
pInt->BIOSseg = cs;
|
|
|
|
return TRUE;
|
|
|
|
}
|