Updated x86emu and resynced with upsteam at Scitech.

This commit is contained in:
Egbert Eich 2004-05-26 17:44:29 +00:00
parent 9549f628e0
commit 05a3dbf5dc
17 changed files with 178 additions and 415 deletions

12
hw/xfree86/int10/x86emu.c Normal file
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@ -0,0 +1,12 @@
#ifdef NO_SYS_HEADERS
# include "xf86_ansic.h"
#endif
#include "debug.c"
#include "decode.c"
#include "fpu.c"
#include "ops.c"
#include "ops2.c"
#include "prim_ops.c"
#include "sys.c"

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@ -36,12 +36,9 @@
* emulator.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/debug.c,v 1.2 2000/04/05 18:13:14 dawes Exp $ */
#include "x86emu/x86emui.h"
#ifdef IN_MODULE
#include "xf86_ansic.h"
#else
#ifndef NO_SYS_HEADERS
#include <stdarg.h>
#include <stdlib.h>
#endif
@ -307,7 +304,8 @@ void x86emu_single_step (void)
}
break;
case 'q':
exit(1);
M.x86.debug |= DEBUG_EXIT;
return;
case 'P':
noDecode = (noDecode)?0:1;
printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE");

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@ -37,8 +37,6 @@
*
****************************************************************************/
/* $XdotOrg: xc/extras/x86emu/src/x86emu/decode.c,v 1.12 2003/12/05 19:23:23 dawes Exp $ */
/* $XFree86: xc/extras/x86emu/src/x86emu/decode.c,v 1.11 2002/07/23 20:20:43 tsi Exp $ */
#include "x86emu/x86emui.h"
@ -105,8 +103,14 @@ DB( if (CHECK_IP_FETCH())
INC_DECODED_INST_LEN(1);
if (M.x86.intr) {
if (M.x86.intr & INTR_HALTED) {
DB( printk("halted\n");
X86EMU_trace_regs();)
DB( if (M.x86.R_SP != 0) {
printk("halted\n");
X86EMU_trace_regs();
}
else {
if (M.x86.debug)
printk("Service completed successfully\n");
})
return;
}
if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
@ -116,6 +120,10 @@ DB( printk("halted\n");
}
op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
(*x86emu_optab[op1])(op1);
if (M.x86.debug & DEBUG_EXIT) {
M.x86.debug &= ~DEBUG_EXIT;
return;
}
}
}
@ -834,6 +842,7 @@ u32 decode_rm00_address(
int sib;
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
/* 32-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF("[EAX]");
@ -863,21 +872,22 @@ u32 decode_rm00_address(
}
HALT_SYS();
} else {
/* 16-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF("[BX+SI]");
return M.x86.R_BX + M.x86.R_SI;
return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
case 1:
DECODE_PRINTF("[BX+DI]");
return M.x86.R_BX + M.x86.R_DI;
return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
case 2:
DECODE_PRINTF("[BP+SI]");
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_SI;
return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
case 3:
DECODE_PRINTF("[BP+DI]");
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_DI;
return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
case 4:
DECODE_PRINTF("[SI]");
return M.x86.R_SI;
@ -919,6 +929,7 @@ u32 decode_rm01_address(
displacement = (s8)fetch_byte_imm();
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
/* 32-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF2("%d[EAX]", displacement);
@ -949,34 +960,35 @@ u32 decode_rm01_address(
}
HALT_SYS();
} else {
/* 16-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF2("%d[BX+SI]", displacement);
return M.x86.R_BX + M.x86.R_SI + displacement;
return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
case 1:
DECODE_PRINTF2("%d[BX+DI]", displacement);
return M.x86.R_BX + M.x86.R_DI + displacement;
return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
case 2:
DECODE_PRINTF2("%d[BP+SI]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_SI + displacement;
return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
case 3:
DECODE_PRINTF2("%d[BP+DI]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_DI + displacement;
return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
case 4:
DECODE_PRINTF2("%d[SI]", displacement);
return M.x86.R_SI + displacement;
return (M.x86.R_SI + displacement) & 0xffff;
case 5:
DECODE_PRINTF2("%d[DI]", displacement);
return M.x86.R_DI + displacement;
return (M.x86.R_DI + displacement) & 0xffff;
case 6:
DECODE_PRINTF2("%d[BP]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + displacement;
return (M.x86.R_BP + displacement) & 0xffff;
case 7:
DECODE_PRINTF2("%d[BX]", displacement);
return M.x86.R_BX + displacement;
return (M.x86.R_BX + displacement) & 0xffff;
}
HALT_SYS();
}
@ -1010,6 +1022,7 @@ u32 decode_rm10_address(
}
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
/* 32-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF2("%08x[EAX]", displacement);
@ -1042,34 +1055,35 @@ u32 decode_rm10_address(
}
HALT_SYS();
} else {
/* 16-bit addressing */
switch (rm) {
case 0:
DECODE_PRINTF2("%04x[BX+SI]", displacement);
return M.x86.R_BX + M.x86.R_SI + displacement;
DECODE_PRINTF2("%04x[BX+SI]", displacement);
return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
case 1:
DECODE_PRINTF2("%04x[BX+DI]", displacement);
return M.x86.R_BX + M.x86.R_DI + displacement;
DECODE_PRINTF2("%04x[BX+DI]", displacement);
return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
case 2:
DECODE_PRINTF2("%04x[BP+SI]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_SI + displacement;
return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
case 3:
DECODE_PRINTF2("%04x[BP+DI]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + M.x86.R_DI + displacement;
return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
case 4:
DECODE_PRINTF2("%04x[SI]", displacement);
return M.x86.R_SI + displacement;
DECODE_PRINTF2("%04x[SI]", displacement);
return (M.x86.R_SI + displacement) & 0xffff;
case 5:
DECODE_PRINTF2("%04x[DI]", displacement);
return M.x86.R_DI + displacement;
DECODE_PRINTF2("%04x[DI]", displacement);
return (M.x86.R_DI + displacement) & 0xffff;
case 6:
DECODE_PRINTF2("%04x[BP]", displacement);
M.x86.mode |= SYSMODE_SEG_DS_SS;
return M.x86.R_BP + displacement;
return (M.x86.R_BP + displacement) & 0xffff;
case 7:
DECODE_PRINTF2("%04x[BX]", displacement);
return M.x86.R_BX + displacement;
DECODE_PRINTF2("%04x[BX]", displacement);
return (M.x86.R_BX + displacement) & 0xffff;
}
HALT_SYS();
}

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@ -36,7 +36,6 @@
* emulation of the FPU instructions.
*
****************************************************************************/
/* $XFree86$ */
#include "x86emu/x86emui.h"

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@ -70,8 +70,6 @@
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/ops.c,v 1.8tsi Exp $ */
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
@ -87,11 +85,22 @@ static void x86emuOp_illegal_op(
u8 op1)
{
START_OF_INSTR();
if (M.x86.R_SP != 0) {
DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
TRACE_REGS();
printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
M.x86.R_CS, M.x86.R_IP-1,op1);
DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
M.x86.R_CS, M.x86.R_IP-1,op1));
HALT_SYS();
}
else {
/* If we get here, it means the stack pointer is back to zero
* so we are just returning from an emulator service call
* so therte is no need to display an error message. We trap
* the emulator with an 0xF1 opcode to finish the service
* call.
*/
X86EMU_halt_sys();
}
END_OF_INSTR();
}
@ -9404,6 +9413,8 @@ static void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("AAM\n");
a = fetch_byte_imm(); /* this is a stupid encoding. */
if (a != 10) {
/* fix: add base decoding
aam_word(u8 val, int base a) */
DECODE_PRINTF("ERROR DECODING AAM\n");
TRACE_REGS();
HALT_SYS();
@ -9421,9 +9432,18 @@ Handles opcode 0xd5
****************************************************************************/
static void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
{
u8 a;
START_OF_INSTR();
DECODE_PRINTF("AAD\n");
(void) fetch_byte_imm();
a = fetch_byte_imm();
if (a != 10) {
/* fix: add base decoding
aad_word(u16 val, int base a) */
DECODE_PRINTF("ERROR DECODING AAM\n");
TRACE_REGS();
HALT_SYS();
}
TRACE_AND_STEP();
M.x86.R_AX = aad_word(M.x86.R_AX);
DECODE_CLEAR_SEGOVR();

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@ -37,7 +37,6 @@
* instructions.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/ops2.c,v 1.6tsi Exp $ */
#include "x86emu/x86emui.h"

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@ -102,8 +102,6 @@
/*------------------------- Global Variables ------------------------------*/
#ifndef __HAVE_INLINE_ASSEMBLER__
static u32 x86emu_parity_tab[8] =
{
0x96696996,
@ -116,15 +114,11 @@ static u32 x86emu_parity_tab[8] =
0x69969669,
};
#endif
#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1)
/*----------------------------- Implementation ----------------------------*/
#ifndef __HAVE_INLINE_ASSEMBLER__
/****************************************************************************
REMARKS:
Implements the AAA instruction and side effects.
@ -2454,8 +2448,6 @@ void div_long(u32 s)
M.x86.R_EDX = (u32)mod;
}
#endif /* __HAVE_INLINE_ASSEMBLER__ */
/****************************************************************************
REMARKS:
Implements the IN string instruction and side effects.
@ -2660,255 +2652,3 @@ DB( if (CHECK_SP_ACCESS())
return res;
}
#ifdef __HAVE_INLINE_ASSEMBLER__
u16 aaa_word (u16 d)
{ return aaa_word_asm(&M.x86.R_EFLG,d); }
u16 aas_word (u16 d)
{ return aas_word_asm(&M.x86.R_EFLG,d); }
u16 aad_word (u16 d)
{ return aad_word_asm(&M.x86.R_EFLG,d); }
u16 aam_word (u8 d)
{ return aam_word_asm(&M.x86.R_EFLG,d); }
u8 adc_byte (u8 d, u8 s)
{ return adc_byte_asm(&M.x86.R_EFLG,d,s); }
u16 adc_word (u16 d, u16 s)
{ return adc_word_asm(&M.x86.R_EFLG,d,s); }
u32 adc_long (u32 d, u32 s)
{ return adc_long_asm(&M.x86.R_EFLG,d,s); }
u8 add_byte (u8 d, u8 s)
{ return add_byte_asm(&M.x86.R_EFLG,d,s); }
u16 add_word (u16 d, u16 s)
{ return add_word_asm(&M.x86.R_EFLG,d,s); }
u32 add_long (u32 d, u32 s)
{ return add_long_asm(&M.x86.R_EFLG,d,s); }
u8 and_byte (u8 d, u8 s)
{ return and_byte_asm(&M.x86.R_EFLG,d,s); }
u16 and_word (u16 d, u16 s)
{ return and_word_asm(&M.x86.R_EFLG,d,s); }
u32 and_long (u32 d, u32 s)
{ return and_long_asm(&M.x86.R_EFLG,d,s); }
u8 cmp_byte (u8 d, u8 s)
{ return cmp_byte_asm(&M.x86.R_EFLG,d,s); }
u16 cmp_word (u16 d, u16 s)
{ return cmp_word_asm(&M.x86.R_EFLG,d,s); }
u32 cmp_long (u32 d, u32 s)
{ return cmp_long_asm(&M.x86.R_EFLG,d,s); }
u8 daa_byte (u8 d)
{ return daa_byte_asm(&M.x86.R_EFLG,d); }
u8 das_byte (u8 d)
{ return das_byte_asm(&M.x86.R_EFLG,d); }
u8 dec_byte (u8 d)
{ return dec_byte_asm(&M.x86.R_EFLG,d); }
u16 dec_word (u16 d)
{ return dec_word_asm(&M.x86.R_EFLG,d); }
u32 dec_long (u32 d)
{ return dec_long_asm(&M.x86.R_EFLG,d); }
u8 inc_byte (u8 d)
{ return inc_byte_asm(&M.x86.R_EFLG,d); }
u16 inc_word (u16 d)
{ return inc_word_asm(&M.x86.R_EFLG,d); }
u32 inc_long (u32 d)
{ return inc_long_asm(&M.x86.R_EFLG,d); }
u8 or_byte (u8 d, u8 s)
{ return or_byte_asm(&M.x86.R_EFLG,d,s); }
u16 or_word (u16 d, u16 s)
{ return or_word_asm(&M.x86.R_EFLG,d,s); }
u32 or_long (u32 d, u32 s)
{ return or_long_asm(&M.x86.R_EFLG,d,s); }
u8 neg_byte (u8 s)
{ return neg_byte_asm(&M.x86.R_EFLG,s); }
u16 neg_word (u16 s)
{ return neg_word_asm(&M.x86.R_EFLG,s); }
u32 neg_long (u32 s)
{ return neg_long_asm(&M.x86.R_EFLG,s); }
u8 not_byte (u8 s)
{ return not_byte_asm(&M.x86.R_EFLG,s); }
u16 not_word (u16 s)
{ return not_word_asm(&M.x86.R_EFLG,s); }
u32 not_long (u32 s)
{ return not_long_asm(&M.x86.R_EFLG,s); }
u8 rcl_byte (u8 d, u8 s)
{ return rcl_byte_asm(&M.x86.R_EFLG,d,s); }
u16 rcl_word (u16 d, u8 s)
{ return rcl_word_asm(&M.x86.R_EFLG,d,s); }
u32 rcl_long (u32 d, u8 s)
{ return rcl_long_asm(&M.x86.R_EFLG,d,s); }
u8 rcr_byte (u8 d, u8 s)
{ return rcr_byte_asm(&M.x86.R_EFLG,d,s); }
u16 rcr_word (u16 d, u8 s)
{ return rcr_word_asm(&M.x86.R_EFLG,d,s); }
u32 rcr_long (u32 d, u8 s)
{ return rcr_long_asm(&M.x86.R_EFLG,d,s); }
u8 rol_byte (u8 d, u8 s)
{ return rol_byte_asm(&M.x86.R_EFLG,d,s); }
u16 rol_word (u16 d, u8 s)
{ return rol_word_asm(&M.x86.R_EFLG,d,s); }
u32 rol_long (u32 d, u8 s)
{ return rol_long_asm(&M.x86.R_EFLG,d,s); }
u8 ror_byte (u8 d, u8 s)
{ return ror_byte_asm(&M.x86.R_EFLG,d,s); }
u16 ror_word (u16 d, u8 s)
{ return ror_word_asm(&M.x86.R_EFLG,d,s); }
u32 ror_long (u32 d, u8 s)
{ return ror_long_asm(&M.x86.R_EFLG,d,s); }
u8 shl_byte (u8 d, u8 s)
{ return shl_byte_asm(&M.x86.R_EFLG,d,s); }
u16 shl_word (u16 d, u8 s)
{ return shl_word_asm(&M.x86.R_EFLG,d,s); }
u32 shl_long (u32 d, u8 s)
{ return shl_long_asm(&M.x86.R_EFLG,d,s); }
u8 shr_byte (u8 d, u8 s)
{ return shr_byte_asm(&M.x86.R_EFLG,d,s); }
u16 shr_word (u16 d, u8 s)
{ return shr_word_asm(&M.x86.R_EFLG,d,s); }
u32 shr_long (u32 d, u8 s)
{ return shr_long_asm(&M.x86.R_EFLG,d,s); }
u8 sar_byte (u8 d, u8 s)
{ return sar_byte_asm(&M.x86.R_EFLG,d,s); }
u16 sar_word (u16 d, u8 s)
{ return sar_word_asm(&M.x86.R_EFLG,d,s); }
u32 sar_long (u32 d, u8 s)
{ return sar_long_asm(&M.x86.R_EFLG,d,s); }
u16 shld_word (u16 d, u16 fill, u8 s)
{ return shld_word_asm(&M.x86.R_EFLG,d,fill,s); }
u32 shld_long (u32 d, u32 fill, u8 s)
{ return shld_long_asm(&M.x86.R_EFLG,d,fill,s); }
u16 shrd_word (u16 d, u16 fill, u8 s)
{ return shrd_word_asm(&M.x86.R_EFLG,d,fill,s); }
u32 shrd_long (u32 d, u32 fill, u8 s)
{ return shrd_long_asm(&M.x86.R_EFLG,d,fill,s); }
u8 sbb_byte (u8 d, u8 s)
{ return sbb_byte_asm(&M.x86.R_EFLG,d,s); }
u16 sbb_word (u16 d, u16 s)
{ return sbb_word_asm(&M.x86.R_EFLG,d,s); }
u32 sbb_long (u32 d, u32 s)
{ return sbb_long_asm(&M.x86.R_EFLG,d,s); }
u8 sub_byte (u8 d, u8 s)
{ return sub_byte_asm(&M.x86.R_EFLG,d,s); }
u16 sub_word (u16 d, u16 s)
{ return sub_word_asm(&M.x86.R_EFLG,d,s); }
u32 sub_long (u32 d, u32 s)
{ return sub_long_asm(&M.x86.R_EFLG,d,s); }
void test_byte (u8 d, u8 s)
{ test_byte_asm(&M.x86.R_EFLG,d,s); }
void test_word (u16 d, u16 s)
{ test_word_asm(&M.x86.R_EFLG,d,s); }
void test_long (u32 d, u32 s)
{ test_long_asm(&M.x86.R_EFLG,d,s); }
u8 xor_byte (u8 d, u8 s)
{ return xor_byte_asm(&M.x86.R_EFLG,d,s); }
u16 xor_word (u16 d, u16 s)
{ return xor_word_asm(&M.x86.R_EFLG,d,s); }
u32 xor_long (u32 d, u32 s)
{ return xor_long_asm(&M.x86.R_EFLG,d,s); }
void imul_byte (u8 s)
{ imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
void imul_word (u16 s)
{ imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
void imul_long (u32 s)
{ imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
{ imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s); }
void mul_byte (u8 s)
{ mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
void mul_word (u16 s)
{ mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
void mul_long (u32 s)
{ mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
void idiv_byte (u8 s)
{ idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
void idiv_word (u16 s)
{ idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
void idiv_long (u32 s)
{ idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
void div_byte (u8 s)
{ div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
void div_word (u16 s)
{ div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
void div_long (u32 s)
{ div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
#endif

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@ -39,16 +39,13 @@
* user library.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/sys.c,v 1.6 2002/09/16 18:05:18 eich Exp $ */
#include "x86emu.h"
#include "x86emu/x86emui.h"
#include "x86emu/regs.h"
#include "x86emu/debug.h"
#include "x86emu/prim_ops.h"
#ifdef IN_MODULE
#include "xf86_ansic.h"
#else
#ifndef NO_SYS_HEADERS
#include <string.h>
#endif
/*------------------------- Global Variables ------------------------------*/
@ -60,6 +57,7 @@ X86EMU_intrFuncs _X86EMU_intrTab[256];
#if defined(__alpha__) || defined(__alpha)
/* to cope with broken egcs-1.1.2 :-(((( */
#define ALPHA_UALOADS
/*
* inline functions to do unaligned accesses
* from linux/include/asm-alpha/unaligned.h
@ -211,6 +209,60 @@ static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
:"r" (r5), "r" (r11));
#endif
}
#elif defined(__GNUC__) && ((__GNUC__ < 3)) && \
(defined (__ia64__) || defined (ia64__))
#define IA64_UALOADS
/*
* EGCS 1.1 knows about arbitrary unaligned loads. Define some
* packed structures to talk about such things with.
*/
struct __una_u64 { unsigned long x __attribute__((packed)); };
struct __una_u32 { unsigned int x __attribute__((packed)); };
struct __una_u16 { unsigned short x __attribute__((packed)); };
static __inline__ unsigned long
__uldq (const unsigned long * r11)
{
const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
return ptr->x;
}
static __inline__ unsigned long
uldl (const unsigned int * r11)
{
const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
return ptr->x;
}
static __inline__ unsigned long
uldw (const unsigned short * r11)
{
const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
return ptr->x;
}
static __inline__ void
ustq (unsigned long r5, unsigned long * r11)
{
struct __una_u64 *ptr = (struct __una_u64 *) r11;
ptr->x = r5;
}
static __inline__ void
ustl (unsigned long r5, unsigned int * r11)
{
struct __una_u32 *ptr = (struct __una_u32 *) r11;
ptr->x = r5;
}
static __inline__ void
ustw (unsigned long r5, unsigned short * r11)
{
struct __una_u16 *ptr = (struct __una_u16 *) r11;
ptr->x = r5;
}
#endif
/****************************************************************************
@ -264,8 +316,10 @@ u16 X86API rdw(
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
#if defined(ALPHA_UALOADS)
val = ldw_u((u16*)(M.mem_base + addr));
#elif defined(IA64_UALOADS)
val = uldw((u16*)(M.mem_base + addr));
#else
val = *(u16*)(M.mem_base + addr);
#endif
@ -301,8 +355,10 @@ u32 X86API rdl(
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
#if defined(ALPHA_UALOADS)
val = ldl_u((u32*)(M.mem_base + addr));
#elif defined(IA64_UALOADS)
val = uldl((u32*)(M.mem_base + addr));
#else
val = *(u32*)(M.mem_base + addr);
#endif
@ -357,8 +413,10 @@ DB( if (DEBUG_MEM_TRACE())
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
#if defined(ALPHA_UALOADS)
stw_u(val,(u16*)(M.mem_base + addr));
#elif defined(IA64_UALOADS)
ustw(val,(u16*)(M.mem_base + addr));
#else
*(u16*)(M.mem_base + addr) = val;
#endif
@ -391,8 +449,10 @@ DB( if (DEBUG_MEM_TRACE())
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
#if defined(ALPHA_UALOADS)
stl_u(val,(u32*)(M.mem_base + addr));
#elif defined(IA64_UALOADS)
ustl(val,(u32*)(M.mem_base + addr));
#else
*(u32*)(M.mem_base + addr) = val;
#endif

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@ -37,7 +37,6 @@
* include this header
*
****************************************************************************/
/* $XFree86$ */
#ifndef __X86EMU_X86EMU_H
#define __X86EMU_X86EMU_H
@ -56,7 +55,9 @@ typedef int X86EMU_pioAddr;
/*---------------------- Macros and type definitions ----------------------*/
/* #pragma pack(1) */ /* Don't pack structs with function pointers! */
#ifdef PACK
# pragma PACK /* Don't pack structs with function pointers! */
#endif
/****************************************************************************
REMARKS:
@ -129,8 +130,10 @@ extern u32 X86API rdl(u32 addr);
extern void X86API wrb(u32 addr, u8 val);
extern void X86API wrw(u32 addr, u16 val);
extern void X86API wrl(u32 addr, u32 val);
/* #pragma pack() */
#ifdef END_PACK
# pragma END_PACK
#endif
/*--------------------- type definitions -----------------------------------*/
@ -169,6 +172,7 @@ void X86EMU_halt_sys(void);
#define DEBUG_DISASSEMBLE_F 0x000008
#define DEBUG_BREAK_F 0x000010
#define DEBUG_SVC_F 0x000020
#define DEBUG_SAVE_IP_CS_F 0x000040
#define DEBUG_FS_F 0x000080
#define DEBUG_PROC_F 0x000100
#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
@ -178,7 +182,7 @@ void X86EMU_halt_sys(void);
#define DEBUG_IO_TRACE_F 0x002000
#define DEBUG_TRACECALL_REGS_F 0x004000
#define DEBUG_DECODE_NOPRINT_F 0x008000
#define DEBUG_SAVE_IP_CS_F 0x010000
#define DEBUG_EXIT 0x010000
#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
void X86EMU_trace_regs(void);

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@ -35,7 +35,6 @@
* Description: Header file for debug definitions.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
#ifndef __X86EMU_DEBUG_H
#define __X86EMU_DEBUG_H

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@ -35,7 +35,6 @@
* Description: Header file for instruction decoding logic.
*
****************************************************************************/
/* $XFree86$ */
#ifndef __X86EMU_DECODE_H
#define __X86EMU_DECODE_H

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@ -35,13 +35,16 @@
* Description: Header file for FPU register definitions.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/include/x86emu/fpu_regs.h,v 1.2 2003/10/22 20:03:05 tsi Exp $ */
#ifndef __X86EMU_FPU_REGS_H
#define __X86EMU_FPU_REGS_H
#ifdef X86_FPU_SUPPORT
#ifdef PACK
# pragma PACK
#endif
/* Basic 8087 register can hold any of the following values: */
union x86_fpu_reg_u {
@ -86,6 +89,10 @@ struct x86_fpu_registers {
short x86_fpu_tos, x86_fpu_bos;
};
#ifdef END_PACK
# pragma END_PACK
#endif
/*
* There are two versions of the following macro.
*

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@ -39,7 +39,6 @@
* platform.
*
****************************************************************************/
/* $XFree86$ */
#ifndef __X86EMU_PRIM_ASM_H
#define __X86EMU_PRIM_ASM_H

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@ -39,8 +39,6 @@
#ifndef __X86EMU_PRIM_OPS_H
#define __X86EMU_PRIM_OPS_H
#include "x86emu/prim_asm.h"
#ifdef __cplusplus
extern "C" { /* Use "C" linkage when in C++ mode */
#endif
@ -136,94 +134,6 @@ void push_long (u32 w);
u16 pop_word (void);
u32 pop_long (void);
#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
#endif
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
#endif

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@ -35,13 +35,16 @@
* Description: Header file for x86 register definitions.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.5 2003/10/22 20:03:05 tsi Exp $ */
#ifndef __X86EMU_REGS_H
#define __X86EMU_REGS_H
/*---------------------- Macros and type definitions ----------------------*/
#ifdef PACK
# pragma PACK
#endif
/*
* General EAX, EBX, ECX, EDX type registers. Note that for
* portability, and speed, the issue of byte swapping is not addressed
@ -303,6 +306,10 @@ typedef struct {
X86EMU_regs x86;
} X86EMU_sysEnv;
#ifdef END_PACK
# pragma END_PACK
#endif
/*----------------------------- Global Variables --------------------------*/
#ifdef __cplusplus

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@ -36,12 +36,11 @@
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/include/x86emu/types.h,v 1.6 2003/06/12 14:12:26 eich Exp $ */
#ifndef __X86EMU_TYPES_H
#define __X86EMU_TYPES_H
#ifndef IN_MODULE
#ifndef NO_SYS_HEADERS
#include <sys/types.h>
#endif

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@ -38,7 +38,6 @@
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.3 2000/04/17 16:29:47 eich Exp $ */
#ifndef __X86EMU_X86EMUI_H
#define __X86EMU_X86EMUI_H
@ -71,9 +70,7 @@
#include "x86emu/fpu.h"
#include "x86emu/fpu_regs.h"
#ifdef IN_MODULE
#include <xf86_ansic.h>
#else
#ifndef NO_SYS_HEADERS
#include <stdio.h>
#include <stdlib.h>
#include <string.h>