Refactor DDC2 code to allow for proper segmented addressing.
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@ -39,13 +39,6 @@ static unsigned int *FetchEDID_DDC1(
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register unsigned int (*)(ScrnInfoPtr)
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);
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static unsigned char * DDCRead_DDC2(
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int scrnIndex,
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I2CBusPtr pBus,
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int start,
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int len
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);
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typedef enum {
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DDCOPT_NODDC1,
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DDCOPT_NODDC2,
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@ -110,6 +103,64 @@ xf86DoEDID_DDC1(
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return tmp;
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}
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static I2CDevPtr
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DDC2Init(int scrnIndex, I2CBusPtr pBus)
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{
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I2CDevPtr dev = NULL;
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/*
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* Slow down the bus so that older monitors don't
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* miss things.
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*/
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pBus->RiseFallTime = 20;
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if (!(dev = xf86I2CFindDev(pBus, 0x00A0))) {
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dev = xf86CreateI2CDevRec();
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dev->DevName = "ddc2";
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dev->SlaveAddr = 0xA0;
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dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */
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dev->StartTimeout = 550;
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dev->BitTimeout = 40;
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dev->AcknTimeout = 40;
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dev->pI2CBus = pBus;
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if (!xf86I2CDevInit(dev)) {
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xf86DrvMsg(scrnIndex, X_PROBED, "No DDC2 device\n");
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return NULL;
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}
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}
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return dev;
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}
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static unsigned char *
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DDC2Read(I2CDevPtr dev, int start, int len)
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{
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unsigned char W_Buffer[2];
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int w_bytes;
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unsigned char *R_Buffer;
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int i;
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if (start < 0x100) {
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w_bytes = 1;
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W_Buffer[0] = start;
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} else {
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w_bytes = 2;
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W_Buffer[0] = start & 0xFF;
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W_Buffer[1] = (start & 0xFF00) >> 8;
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}
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R_Buffer = xcalloc(sizeof(unsigned char), len);
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for (i = 0; i < RETRIES; i++) {
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if (xf86I2CWriteRead(dev, W_Buffer, w_bytes, R_Buffer, len)) {
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if (!DDC_checksum(R_Buffer, len))
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return R_Buffer;
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}
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}
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xfree(R_Buffer);
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return NULL;
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}
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/**
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* Attempts to probe the monitor for EDID information, if NoDDC and NoDDC2 are
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* unset. EDID information blocks are interpreted and the results returned in
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@ -133,6 +184,7 @@ xf86DoEEDID(int scrnIndex, I2CBusPtr pBus, int *nblocks)
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ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
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unsigned char *EDID_block = NULL;
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xf86MonPtr tmp = NULL;
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I2CDevPtr dev = NULL;
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/* Default DDC and DDC2 to enabled. */
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Bool noddc = FALSE, noddc2 = FALSE;
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OptionInfoPtr options;
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@ -144,11 +196,14 @@ xf86DoEEDID(int scrnIndex, I2CBusPtr pBus, int *nblocks)
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xf86GetOptValBool(options, DDCOPT_NODDC, &noddc);
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xf86GetOptValBool(options, DDCOPT_NODDC2, &noddc2);
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xfree(options);
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if (noddc || noddc2)
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return NULL;
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EDID_block = DDCRead_DDC2(scrnIndex, pBus, 0, EDID1_LEN);
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if (!(dev = DDC2Init(scrnIndex, pBus)))
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return NULL;
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EDID_block = DDC2Read(dev, 0, EDID1_LEN);
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if (EDID_block)
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tmp = xf86InterpretEDID(scrnIndex, EDID_block);
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@ -247,62 +302,3 @@ FetchEDID_DDC1(register ScrnInfoPtr pScrn,
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} while(--count);
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return (ptr);
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}
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static unsigned char *
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DDCRead_DDC2(int scrnIndex, I2CBusPtr pBus, int start, int len)
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{
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I2CDevPtr dev;
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unsigned char W_Buffer[2];
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int w_bytes;
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unsigned char *R_Buffer;
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int i;
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/*
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* Slow down the bus so that older monitors don't
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* miss things.
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*/
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pBus->RiseFallTime = 20;
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if (!(dev = xf86I2CFindDev(pBus, 0x00A0))) {
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dev = xf86CreateI2CDevRec();
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dev->DevName = "ddc2";
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dev->SlaveAddr = 0xA0;
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dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */
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dev->StartTimeout = 550;
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dev->BitTimeout = 40;
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dev->AcknTimeout = 40;
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dev->pI2CBus = pBus;
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if (!xf86I2CDevInit(dev)) {
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xf86DrvMsg(scrnIndex, X_PROBED, "No DDC2 device\n");
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return NULL;
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}
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}
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if (start < 0x100) {
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w_bytes = 1;
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W_Buffer[0] = start;
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} else {
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w_bytes = 2;
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W_Buffer[0] = start & 0xFF;
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W_Buffer[1] = (start & 0xFF00) >> 8;
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}
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R_Buffer = xcalloc(1,sizeof(unsigned char)
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* (len));
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for (i=0; i<RETRIES; i++) {
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if (xf86I2CWriteRead(dev, W_Buffer,w_bytes, R_Buffer,len)) {
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if (!DDC_checksum(R_Buffer,len))
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return R_Buffer;
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#ifdef DEBUG
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else ErrorF("Checksum error in EDID block\n");
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#endif
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}
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#ifdef DEBUG
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else ErrorF("Error reading EDID block\n");
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#endif
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}
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xf86DestroyI2CDevRec(dev,TRUE);
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xfree(R_Buffer);
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return NULL;
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}
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