Move memory barrier macros into common section
alphabetize by architecture also. Signed-off-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Matt Turner
parent
295e598d9a
commit
1b43ee13b3
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@ -127,6 +127,94 @@ extern unsigned short ldw_brx(volatile unsigned char *, int);
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# endif /* NO_INLINE || DO_PROTOTYPES */
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# ifndef NO_INLINE
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# ifdef __GNUC__
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# ifdef __alpha__
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# define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
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# define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
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# elif defined __amd64__
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# define mem_barrier() \
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__asm__ __volatile__ ("lock; addl $0,0(%%rsp)" : : : "memory")
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# define write_mem_barrier() \
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__asm__ __volatile__ ("" : : : "memory")
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# elif defined __arm__
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# elif defined __arm32__
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# elif defined __ia64__
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# ifndef __INTEL_COMPILER
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# define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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# define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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# else
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# include "ia64intrin.h"
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# define mem_barrier() __mf()
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# define write_mem_barrier() __mf()
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# endif
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# elif defined __mips__
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# ifdef linux
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# define mem_barrier() \
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__asm__ __volatile__( \
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"# prevent instructions being moved around\n\t" \
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".set\tnoreorder\n\t" \
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"# 8 nops to fool the R4400 pipeline\n\t" \
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"nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
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".set\treorder" \
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: /* no output */ \
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: /* no input */ \
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: "memory")
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# define write_mem_barrier() mem_barrier()
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# else /* !linux */
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# define mem_barrier() /* NOP */
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# endif
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# elif defined __powerpc__
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# if defined(linux) && defined(__powerpc64__)
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# include <linux/version.h>
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# if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
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# include <asm/memory.h>
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# endif
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# endif /* defined(linux) && defined(__powerpc64__) */
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# ifndef eieio /* We deal with arch-specific eieio() routines above... */
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# define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
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# endif /* eieio */
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# define mem_barrier() eieio()
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# define write_mem_barrier() eieio()
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# elif defined __sparc__
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# define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
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# define mem_barrier() /* XXX: nop for now */
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# define write_mem_barrier() /* XXX: nop for now */
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# else /* ix86 */
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# endif
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# else
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# endif /* __GNUC__ */
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# endif /* NO_INLINE */
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# ifndef NO_INLINE
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# ifdef __GNUC__
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# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
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@ -357,9 +445,6 @@ static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
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# endif
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}
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# define mem_barrier() __asm__ __volatile__("mb" : : : "memory")
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# define write_mem_barrier() __asm__ __volatile__("wmb" : : : "memory")
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# elif defined(linux) && defined(__ia64__)
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# include <inttypes.h>
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@ -419,15 +504,6 @@ __ustw (unsigned long r5, unsigned short * r11)
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# define stl_u(v,p) __ustl(v,p)
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# define stw_u(v,p) __ustw(v,p)
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# ifndef __INTEL_COMPILER
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# define mem_barrier() __asm__ __volatile__ ("mf" ::: "memory")
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# define write_mem_barrier() __asm__ __volatile__ ("mf" ::: "memory")
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# else
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# include "ia64intrin.h"
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# define mem_barrier() __mf()
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# define write_mem_barrier() __mf()
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# endif
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/*
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* This is overkill, but for different reasons depending on where it is used.
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* This is thus general enough to be used everywhere cache flushes are needed.
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@ -473,12 +549,6 @@ extern _X_EXPORT unsigned int inl(unsigned long port);
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# define stl_u(v,p) (*(unsigned int *)(p)) = (v)
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# define stw_u(v,p) (*(unsigned short *)(p)) = (v)
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# define mem_barrier() \
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__asm__ __volatile__ ("lock; addl $0,0(%%rsp)": : :"memory")
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# define write_mem_barrier() \
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__asm__ __volatile__ ("": : :"memory")
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static __inline__ void
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outb(unsigned short port, unsigned char val)
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{
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@ -534,8 +604,6 @@ inl(unsigned short port)
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# define ASI_PL 0x88
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# endif
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# define barrier() __asm__ __volatile__(".word 0x8143e00a": : :"memory")
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static __inline__ void
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outb(unsigned long port, unsigned char val)
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{
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@ -857,9 +925,6 @@ static __inline__ void stw_u(unsigned long val, unsigned short *p)
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# endif
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}
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# define mem_barrier() /* XXX: nop for now */
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# define write_mem_barrier() /* XXX: nop for now */
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# elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))
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# ifdef __arm32__
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# define PORT_SIZE long
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@ -991,18 +1056,6 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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}
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# endif
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# define mem_barrier() \
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__asm__ __volatile__( \
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"# prevent instructions being moved around\n\t" \
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".set\tnoreorder\n\t" \
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"# 8 nops to fool the R4400 pipeline\n\t" \
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"nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
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".set\treorder" \
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: /* no output */ \
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: /* no input */ \
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: "memory")
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# define write_mem_barrier() mem_barrier()
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# else /* !linux */
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# define stq_u(v,p) stl_u(v,p)
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@ -1014,7 +1067,6 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
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(*(unsigned char *)(p)+1) = ((v) >> 8)
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# define mem_barrier() /* NOP */
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# endif /* !linux */
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# endif /* __mips__ */
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@ -1025,8 +1077,6 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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# define stq_u(v,p) (*(unsigned long *)(p)) = (v)
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# define stl_u(v,p) (*(unsigned int *)(p)) = (v)
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# define stw_u(v,p) (*(unsigned short *)(p)) = (v)
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# endif /* __arm32__ */
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# elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
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@ -1037,16 +1087,6 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
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extern _X_EXPORT volatile unsigned char *ioBase;
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#if defined(linux) && defined(__powerpc64__)
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# include <linux/version.h>
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# if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
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# include <asm/memory.h>
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# endif
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#endif /* defined(linux) && defined(__powerpc64__) */
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#ifndef eieio /* We deal with arch-specific eieio() routines above... */
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# define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
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#endif /* eieio */
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static __inline__ unsigned char
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xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
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{
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@ -1261,9 +1301,6 @@ inl(unsigned short port)
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# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
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(*((unsigned char *)(p)+1)) = ((v) >> 8)
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# define mem_barrier() eieio()
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# define write_mem_barrier() eieio()
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#elif defined(__arm__) && defined(__linux__)
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#define ldq_u(p) (*((unsigned long *)(p)))
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@ -1272,8 +1309,6 @@ inl(unsigned short port)
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#define stq_u(v,p) (*(unsigned long *)(p)) = (v)
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#define stl_u(v,p) (*(unsigned int *)(p)) = (v)
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#define stw_u(v,p) (*(unsigned short *)(p)) = (v)
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#define mem_barrier() /* NOP */
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#define write_mem_barrier() /* NOP */
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/* for Linux on ARM, we use the LIBC inx/outx routines */
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/* note that the appropriate setup via "ioperm" needs to be done */
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@ -1321,8 +1356,6 @@ do { \
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# define stq_u(v,p) (*(unsigned long *)(p)) = (v)
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# define stl_u(v,p) (*(unsigned int *)(p)) = (v)
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# define stw_u(v,p) (*(unsigned short *)(p)) = (v)
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# if !defined(__SUNPRO_C)
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# if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
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@ -1511,8 +1544,6 @@ inl(unsigned short port)
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# define stq_u(v,p) (*(unsigned long *)(p)) = (v)
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# define stl_u(v,p) (*(unsigned int *)(p)) = (v)
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# define stw_u(v,p) (*(unsigned short *)(p)) = (v)
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# define mem_barrier() /* NOP */
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# define write_mem_barrier() /* NOP */
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# endif /* __GNUC__ */
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# endif /* NO_INLINE */
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@ -1528,7 +1559,7 @@ extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
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static __inline__ int
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xf86ReadMmio32(void *Base, unsigned long Offset)
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{
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__asm__ __volatile__("mb" : : : "memory");
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mem_barrier();
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return *(volatile unsigned int*)((unsigned long)Base+(Offset));
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}
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# endif
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