xserver: remove RAC/resource handling code.
This changes the ABI, but since the video ABI is at 6 already it should be fine. driver changes are in the pipeline after this. Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
parent
0a168401c4
commit
4b42448a23
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@ -37,20 +37,20 @@ libcommon_la_SOURCES = xf86Configure.c xf86ShowOpts.c xf86Bus.c xf86Config.c \
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xf86Events.c xf86Globals.c xf86AutoConfig.c \
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xf86Option.c xf86Init.c \
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xf86VidMode.c xf86fbman.c xf86cmap.c \
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xf86Helper.c xf86PM.c xf86RAC.c xf86Xinput.c xisb.c \
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xf86Helper.c xf86PM.c xf86Xinput.c xisb.c \
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xf86Mode.c xorgHelper.c \
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$(XVSOURCES) $(BUSSOURCES) $(RANDRSOURCES)
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nodist_libcommon_la_SOURCES = xf86DefModeSet.c xf86Build.h
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INCLUDES = $(XORG_INCS) -I$(srcdir)/../ddc -I$(srcdir)/../i2c \
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-I$(srcdir)/../loader -I$(srcdir)/../rac -I$(srcdir)/../parser \
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-I$(srcdir)/../loader -I$(srcdir)/../parser \
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-I$(srcdir)/../vbe -I$(srcdir)/../int10 \
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-I$(srcdir)/../vgahw -I$(srcdir)/../dixmods/extmod \
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-I$(srcdir)/../modes -I$(srcdir)/../ramdac
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sdk_HEADERS = compiler.h fourcc.h xf86.h xf86Module.h xf86Opt.h \
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xf86PciInfo.h xf86Priv.h xf86Privstr.h xf86Resources.h \
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xf86cmap.h xf86fbman.h xf86str.h xf86RAC.h xf86Xinput.h xisb.h \
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xf86PciInfo.h xf86Priv.h xf86Privstr.h \
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xf86cmap.h xf86fbman.h xf86str.h xf86Xinput.h xisb.h \
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$(XVSDKINCS) $(XF86VMODE_SDK) xorgVersion.h \
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xf86sbusBus.h
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@ -71,7 +71,6 @@ EXTRA_DIST = \
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xf86PciInfo.h \
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xf86Priv.h \
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xf86Privstr.h \
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xf86Resources.h \
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xf86Xinput.h \
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xf86cmap.h \
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xf86fbman.h \
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@ -102,7 +102,6 @@ extern _X_EXPORT Bool xf86ParsePciBusString(const char *busID, int *bus, int *de
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int *func);
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extern _X_EXPORT Bool xf86ComparePciBusString(const char *busID, int bus, int device, int func);
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extern _X_EXPORT void xf86FormatPciBusNumber(int busnum, char *buffer);
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extern _X_EXPORT resPtr xf86AddRangesToList(resPtr list, resRange *pRange, int entityIndex);
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extern _X_EXPORT int xf86GetFbInfoForScreen(int scrnIndex);
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extern _X_EXPORT int xf86ClaimFbSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active);
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extern _X_EXPORT int xf86ClaimNoSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active);
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@ -110,9 +109,6 @@ extern _X_EXPORT void xf86EnableAccess(ScrnInfoPtr pScrn);
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extern _X_EXPORT void xf86SetCurrentAccess(Bool Enable, ScrnInfoPtr pScrn);
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extern _X_EXPORT Bool xf86IsPrimaryPci(struct pci_device * pPci);
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/* new RAC */
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extern _X_EXPORT resPtr xf86AddResToList(resPtr rlist, resRange *Range, int entityIndex);
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extern _X_EXPORT void xf86FreeResList(resPtr rlist);
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extern _X_EXPORT void xf86ClaimFixedResources(resList list, int entityIndex);
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extern _X_EXPORT Bool xf86DriverHasEntities(DriverPtr drvp);
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extern _X_EXPORT void xf86AddEntityToScreen(ScrnInfoPtr pScrn, int entityIndex);
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extern _X_EXPORT void xf86SetEntityInstanceForScreen(ScrnInfoPtr pScrn, int entityIndex,
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@ -124,18 +120,10 @@ extern _X_EXPORT EntityInfoPtr xf86GetEntityInfo(int entityIndex);
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extern _X_EXPORT struct pci_device * xf86GetPciInfoForEntity(int entityIndex);
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extern _X_EXPORT Bool xf86SetEntityFuncs(int entityIndex, EntityProc init,
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EntityProc enter, EntityProc leave, pointer);
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extern _X_EXPORT void xf86DeallocateResourcesForEntity(int entityIndex, unsigned long type);
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extern _X_EXPORT resPtr xf86RegisterResources(int entityIndex, resList list,
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unsigned long Access);
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extern _X_EXPORT Bool xf86CheckPciMemBase(struct pci_device * pPci, memType base);
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extern _X_EXPORT void xf86SetAccessFuncs(EntityInfoPtr pEnt, xf86SetAccessFuncPtr funcs,
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xf86SetAccessFuncPtr oldFuncs);
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extern _X_EXPORT Bool xf86IsEntityPrimary(int entityIndex);
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extern _X_EXPORT resPtr xf86SetOperatingState(resList list, int entityIndex, int mask);
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extern _X_EXPORT void xf86EnterServerState(xf86State state);
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extern _X_EXPORT ScrnInfoPtr xf86FindScreenForEntity(int entityIndex);
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extern _X_EXPORT Bool xf86NoSharedResources(int screenIndex, resType res);
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extern _X_EXPORT resPtr xf86FindIntersectOfLists(resPtr l1, resPtr l2);
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extern _X_EXPORT void xf86RegisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func, pointer arg);
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extern _X_EXPORT Bool xf86DeregisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func);
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@ -285,27 +273,21 @@ extern _X_EXPORT pointer xf86FindXvOptions(int scrnIndex, int adapt_index, char
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extern _X_EXPORT void xf86GetOS(const char **name, int *major, int *minor, int *teeny);
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extern _X_EXPORT ScrnInfoPtr xf86ConfigPciEntity(ScrnInfoPtr pScrn, int scrnFlag,
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int entityIndex,PciChipsets *p_chip,
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resList res, EntityProc init,
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void *dummy, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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extern _X_EXPORT ScrnInfoPtr xf86ConfigFbEntity(ScrnInfoPtr pScrn, int scrnFlag,
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int entityIndex, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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/* Obsolete! don't use */
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extern _X_EXPORT Bool xf86ConfigActivePciEntity(ScrnInfoPtr pScrn,
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int entityIndex,PciChipsets *p_chip,
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resList res, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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/* Obsolete! don't use */
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extern _X_EXPORT void xf86ConfigPciEntityInactive(EntityInfoPtr pEnt, PciChipsets *p_chip,
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resList res, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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extern _X_EXPORT void xf86ConfigFbEntityInactive(EntityInfoPtr pEnt, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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int entityIndex,PciChipsets *p_chip,
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void *dummy, EntityProc init,
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EntityProc enter, EntityProc leave,
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pointer private);
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extern _X_EXPORT Bool xf86IsScreenPrimary(int scrnIndex);
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extern _X_EXPORT int xf86RegisterRootWindowProperty(int ScrnIndex, Atom property, Atom type,
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int format, unsigned long len,
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File diff suppressed because it is too large
Load Diff
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@ -43,14 +43,6 @@
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#include "xf86sbusBus.h"
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#endif
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typedef struct racInfo {
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xf86AccessPtr mem_new;
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xf86AccessPtr io_new;
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xf86AccessPtr io_mem_new;
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xf86SetAccessFuncPtr old;
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} AccessFuncRec, *AccessFuncPtr;
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typedef struct {
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DriverPtr driver;
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int chipset;
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@ -59,12 +51,9 @@ typedef struct {
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EntityProc entityEnter;
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EntityProc entityLeave;
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pointer private;
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resPtr resources;
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Bool active;
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Bool inUse;
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BusRec bus;
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EntityAccessPtr access;
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AccessFuncPtr rac;
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pointer busAcc;
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int lastScrnFlag;
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DevUnion * entityPrivates;
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@ -73,31 +62,7 @@ typedef struct {
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IOADDRESS domainIO;
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} EntityRec, *EntityPtr;
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#define NO_SEPARATE_IO_FROM_MEM 0x0001
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#define NO_SEPARATE_MEM_FROM_IO 0x0002
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#define NEED_VGA_ROUTED 0x0004
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#define NEED_VGA_ROUTED_SETUP 0x0008
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#define NEED_MEM 0x0010
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#define NEED_IO 0x0020
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#define NEED_MEM_SHARED 0x0040
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#define NEED_IO_SHARED 0x0080
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#define ACCEL_IS_SHARABLE 0x0100
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#define IS_SHARED_ACCEL 0x0200
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#define SA_PRIM_INIT_DONE 0x0400
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#define NEED_VGA_MEM 0x1000
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#define NEED_VGA_IO 0x2000
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#define NEED_SHARED (NEED_MEM_SHARED | NEED_IO_SHARED)
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struct x_BusAccRec;
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typedef void (*BusAccProcPtr)(struct x_BusAccRec *ptr);
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typedef struct x_BusAccRec {
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BusAccProcPtr set_f;
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BusAccProcPtr enable_f;
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BusAccProcPtr disable_f;
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BusAccProcPtr save_f;
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BusAccProcPtr restore_f;
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struct x_BusAccRec *current; /* pointer to bridge open on this bus */
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struct x_BusAccRec *primary; /* pointer to the bus connecting to this */
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struct x_BusAccRec *next; /* this links the different buses together */
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@ -121,15 +86,15 @@ typedef struct _stateChange {
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struct _stateChange *next;
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} StateChangeNotificationRec, *StateChangeNotificationPtr;
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#define ACCEL_IS_SHARABLE 0x100
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#define IS_SHARED_ACCEL 0x200
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#define SA_PRIM_INIT_DONE 0x400
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extern EntityPtr *xf86Entities;
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extern int xf86NumEntities;
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extern xf86AccessRec AccessNULL;
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extern BusRec primaryBus;
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extern BusAccPtr xf86BusAccInfo;
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int xf86AllocateEntity(void);
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BusType StringToBusType(const char* busID, const char **retID);
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Bool xf86IsSubsetOf(resRange range, resPtr list);
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#endif /* _XF86_BUS_H */
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@ -659,8 +659,6 @@ DoConfigure(void)
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}
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/* Disable PCI devices */
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xf86ResourceBrokerInit();
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xf86AccessInit();
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xf86FindPrimaryDevice();
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/* Create XF86Config file structure */
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@ -528,11 +528,6 @@ DGAAvailable(int index)
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if(DGAScreenKey == NULL)
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return FALSE;
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if (!xf86NoSharedResources(((ScrnInfoPtr)dixLookupPrivate(
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&screenInfo.screens[index]->devPrivates,
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xf86ScreenKey))->scrnIndex, MEM))
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return FALSE;
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if(DGA_GET_SCREEN_PRIV(screenInfo.screens[index]))
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return TRUE;
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@ -469,7 +469,6 @@ xf86VTSwitch(void)
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xf86Screens[i]->LeaveVT(i, 0);
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xf86AccessLeave(); /* We need this here, otherwise */
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xf86AccessLeaveState(); /* console won't be restored */
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if (!xf86VTSwitchAway()) {
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/*
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@ -517,8 +516,6 @@ xf86VTSwitch(void)
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* trap calls when switched away.
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*/
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xf86Screens[i]->vtSema = FALSE;
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xf86Screens[i]->access = NULL;
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xf86Screens[i]->busAccess = NULL;
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}
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if (xorgHWAccess)
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xf86DisableIO();
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@ -58,7 +58,6 @@
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#include "xf86Xinput.h"
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#include "xf86InPriv.h"
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#include "mivalidate.h"
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#include "xf86RAC.h"
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#include "xf86Bus.h"
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#include "xf86Crtc.h"
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@ -194,12 +193,6 @@ xf86AllocateScreen(DriverPtr drv, int flags)
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xf86Screens[i]->drv = drv;
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drv->refCount++;
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xf86Screens[i]->module = DuplicateModule(drv->module, NULL);
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/*
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* set the initial access state. This will be modified after PreInit.
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* XXX Or should we do it some other place?
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*/
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xf86Screens[i]->CurrentAccess = &xf86CurrentAccess;
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xf86Screens[i]->resourceType = MEM_IO;
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xf86Screens[i]->DriverFunc = drv->driverFunc;
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@ -2317,13 +2310,8 @@ xf86SetSilkenMouse (ScreenPtr pScreen)
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/* check for commandline option here */
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/* disable if screen shares resources */
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if (((pScrn->racMemFlags & RAC_CURSOR) &&
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!xf86NoSharedResources(pScrn->scrnIndex,MEM)) ||
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((pScrn->racIoFlags & RAC_CURSOR) &&
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!xf86NoSharedResources(pScrn->scrnIndex,IO))) {
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useSM = FALSE;
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from = X_PROBED;
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} else if (xf86silkenMouseDisableFlag) {
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/* TODO VGA arb disable silken mouse */
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if (xf86silkenMouseDisableFlag) {
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from = X_CMDLINE;
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useSM = FALSE;
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} else {
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@ -2374,13 +2362,43 @@ xf86FindXvOptions(int scrnIndex, int adaptor_index, char *port_name,
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#include "loader/os.c"
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/* new RAC */
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/*
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* xf86ConfigPciEntityInactive() -- This function can be used
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* to configure an inactive entity as well as to reconfigure an
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* previously active entity inactive. If the entity has been
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* assigned to a screen before it will be removed. If p_chip is
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* non-NULL all static resources listed there will be registered.
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*/
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static void
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xf86ConfigPciEntityInactive(EntityInfoPtr pEnt, PciChipsets *p_chip,
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EntityProc init, EntityProc enter,
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EntityProc leave, pointer private)
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{
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ScrnInfoPtr pScrn;
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if ((pScrn = xf86FindScreenForEntity(pEnt->index)))
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xf86RemoveEntityFromScreen(pScrn,pEnt->index);
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/* shared resources are only needed when entity is active: remove */
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xf86SetEntityFuncs(pEnt->index,init,enter,leave,private);
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}
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static void
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xf86ConfigFbEntityInactive(EntityInfoPtr pEnt, EntityProc init,
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EntityProc enter, EntityProc leave, pointer private)
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{
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ScrnInfoPtr pScrn;
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if ((pScrn = xf86FindScreenForEntity(pEnt->index)))
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xf86RemoveEntityFromScreen(pScrn,pEnt->index);
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xf86SetEntityFuncs(pEnt->index,init,enter,leave,private);
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}
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ScrnInfoPtr
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xf86ConfigPciEntity(ScrnInfoPtr pScrn, int scrnFlag, int entityIndex,
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PciChipsets *p_chip, resList res, EntityProc init,
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PciChipsets *p_chip, void *dummy, EntityProc init,
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EntityProc enter, EntityProc leave, pointer private)
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{
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PciChipsets *p_id;
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EntityInfoPtr pEnt = xf86GetEntityInfo(entityIndex);
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if (!pEnt) return pScrn;
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@ -2390,7 +2408,7 @@ xf86ConfigPciEntity(ScrnInfoPtr pScrn, int scrnFlag, int entityIndex,
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return pScrn;
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}
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if (!pEnt->active) {
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xf86ConfigPciEntityInactive(pEnt, p_chip, res, init, enter,
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xf86ConfigPciEntityInactive(pEnt, p_chip, init, enter,
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leave, private);
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xfree(pEnt);
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return pScrn;
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@ -2405,15 +2423,8 @@ xf86ConfigPciEntity(ScrnInfoPtr pScrn, int scrnFlag, int entityIndex,
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if (xf86IsEntityShared(entityIndex)) {
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return pScrn;
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}
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if (p_chip) {
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for (p_id = p_chip; p_id->numChipset != -1; p_id++) {
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if (pEnt->chipset == p_id->numChipset) break;
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}
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xf86ClaimFixedResources(p_id->resList,entityIndex);
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}
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xfree(pEnt);
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xf86ClaimFixedResources(res,entityIndex);
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xf86SetEntityFuncs(entityIndex,init,enter,leave,private);
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return pScrn;
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@ -2455,10 +2466,9 @@ xf86ConfigFbEntity(ScrnInfoPtr pScrn, int scrnFlag, int entityIndex,
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Bool
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xf86ConfigActivePciEntity(ScrnInfoPtr pScrn, int entityIndex,
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PciChipsets *p_chip, resList res, EntityProc init,
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PciChipsets *p_chip, void *dummy, EntityProc init,
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EntityProc enter, EntityProc leave, pointer private)
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{
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PciChipsets *p_id;
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EntityInfoPtr pEnt = xf86GetEntityInfo(entityIndex);
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if (!pEnt) return FALSE;
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@ -2468,61 +2478,13 @@ xf86ConfigActivePciEntity(ScrnInfoPtr pScrn, int entityIndex,
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}
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xf86AddEntityToScreen(pScrn,entityIndex);
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if (p_chip) {
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for (p_id = p_chip; p_id->numChipset != -1; p_id++) {
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if (pEnt->chipset == p_id->numChipset) break;
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}
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xf86ClaimFixedResources(p_id->resList,entityIndex);
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}
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xfree(pEnt);
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xf86ClaimFixedResources(res,entityIndex);
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if (!xf86SetEntityFuncs(entityIndex,init,enter,leave,private))
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return FALSE;
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return TRUE;
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}
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/*
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* xf86ConfigPciEntityInactive() -- This function can be used
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* to configure an inactive entity as well as to reconfigure an
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* previously active entity inactive. If the entity has been
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* assigned to a screen before it will be removed. If p_chip is
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* non-NULL all static resources listed there will be registered.
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*/
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void
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xf86ConfigPciEntityInactive(EntityInfoPtr pEnt, PciChipsets *p_chip,
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resList res, EntityProc init, EntityProc enter,
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EntityProc leave, pointer private)
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{
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PciChipsets *p_id;
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ScrnInfoPtr pScrn;
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if ((pScrn = xf86FindScreenForEntity(pEnt->index)))
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xf86RemoveEntityFromScreen(pScrn,pEnt->index);
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else if (p_chip) {
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for (p_id = p_chip; p_id->numChipset != -1; p_id++) {
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if (pEnt->chipset == p_id->numChipset) break;
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}
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xf86ClaimFixedResources(p_id->resList,pEnt->index);
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}
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xf86ClaimFixedResources(res,pEnt->index);
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/* shared resources are only needed when entity is active: remove */
|
||||
xf86DeallocateResourcesForEntity(pEnt->index, ResShared);
|
||||
xf86SetEntityFuncs(pEnt->index,init,enter,leave,private);
|
||||
}
|
||||
|
||||
void
|
||||
xf86ConfigFbEntityInactive(EntityInfoPtr pEnt, EntityProc init,
|
||||
EntityProc enter, EntityProc leave, pointer private)
|
||||
{
|
||||
ScrnInfoPtr pScrn;
|
||||
|
||||
if ((pScrn = xf86FindScreenForEntity(pEnt->index)))
|
||||
xf86RemoveEntityFromScreen(pScrn,pEnt->index);
|
||||
xf86SetEntityFuncs(pEnt->index,init,enter,leave,private);
|
||||
}
|
||||
|
||||
Bool
|
||||
xf86IsScreenPrimary(int scrnIndex)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -792,9 +792,6 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
|
|||
xf86OSPMClose = xf86OSPMOpen();
|
||||
#endif
|
||||
|
||||
/* Initialise the resource broker */
|
||||
xf86ResourceBrokerInit();
|
||||
|
||||
/* Load all modules specified explicitly in the config file */
|
||||
if ((modulelist = xf86ModulelistFromConfig(&optionlist))) {
|
||||
xf86LoadModules(modulelist, optionlist);
|
||||
|
|
@ -1371,16 +1368,12 @@ ddxGiveUp(void)
|
|||
xf86OSPMClose = NULL;
|
||||
#endif
|
||||
|
||||
xf86AccessLeaveState();
|
||||
|
||||
for (i = 0; i < xf86NumScreens; i++) {
|
||||
/*
|
||||
* zero all access functions to
|
||||
* trap calls when switched away.
|
||||
*/
|
||||
xf86Screens[i]->vtSema = FALSE;
|
||||
xf86Screens[i]->access = NULL;
|
||||
xf86Screens[i]->busAccess = NULL;
|
||||
}
|
||||
|
||||
#ifdef XFreeXDGA
|
||||
|
|
|
|||
|
|
@ -70,7 +70,6 @@ suspend (pmEvent event, Bool undo)
|
|||
xf86inSuspend = TRUE;
|
||||
|
||||
for (i = 0; i < xf86NumScreens; i++) {
|
||||
xf86EnableAccess(xf86Screens[i]);
|
||||
if (xf86Screens[i]->EnableDisableFBAccess)
|
||||
(*xf86Screens[i]->EnableDisableFBAccess) (i, FALSE);
|
||||
}
|
||||
|
|
@ -81,7 +80,6 @@ suspend (pmEvent event, Bool undo)
|
|||
}
|
||||
xf86EnterServerState(SETUP);
|
||||
for (i = 0; i < xf86NumScreens; i++) {
|
||||
xf86EnableAccess(xf86Screens[i]);
|
||||
if (xf86Screens[i]->PMEvent)
|
||||
xf86Screens[i]->PMEvent(i,event,undo);
|
||||
else {
|
||||
|
|
@ -90,7 +88,7 @@ suspend (pmEvent event, Bool undo)
|
|||
}
|
||||
}
|
||||
xf86AccessLeave();
|
||||
xf86AccessLeaveState();
|
||||
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
|||
|
|
@ -88,7 +88,6 @@ extern _X_EXPORT int xf86NumDrivers;
|
|||
extern _X_EXPORT Bool xf86Resetting;
|
||||
extern _X_EXPORT Bool xf86Initialising;
|
||||
extern _X_EXPORT int xf86NumScreens;
|
||||
extern _X_EXPORT xf86CurrentAccessRec xf86CurrentAccess;
|
||||
extern _X_EXPORT const char *xf86VisualNames[];
|
||||
extern _X_EXPORT int xf86Verbose; /* verbosity level */
|
||||
extern _X_EXPORT int xf86LogVerbose; /* log file verbosity level */
|
||||
|
|
@ -118,11 +117,9 @@ extern _X_EXPORT void xf86AccessInit(void);
|
|||
extern _X_EXPORT void xf86AccessEnter(void);
|
||||
extern _X_EXPORT void xf86AccessLeave(void);
|
||||
extern _X_EXPORT void xf86EntityInit(void);
|
||||
extern _X_EXPORT void xf86AccessLeaveState(void);
|
||||
|
||||
extern _X_EXPORT void xf86FindPrimaryDevice(void);
|
||||
/* new RAC */
|
||||
extern _X_EXPORT void xf86ResourceBrokerInit(void);
|
||||
extern _X_EXPORT void xf86PostProbe(void);
|
||||
extern _X_EXPORT void xf86ClearEntityListForScreen(int scrnIndex);
|
||||
extern _X_EXPORT void xf86AddDevToEntity(int entityIndex, GDevPtr dev);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,17 +0,0 @@
|
|||
|
||||
#ifndef __XF86RAC_H
|
||||
#define __XF86RAC_H 1
|
||||
|
||||
#include "screenint.h"
|
||||
#include "misc.h"
|
||||
#include "xf86.h"
|
||||
|
||||
extern _X_EXPORT Bool xf86RACInit(ScreenPtr pScreen, unsigned int flag);
|
||||
|
||||
/* flags */
|
||||
#define RAC_FB 0x01
|
||||
#define RAC_CURSOR 0x02
|
||||
#define RAC_COLORMAP 0x04
|
||||
#define RAC_VIEWPORT 0x08
|
||||
|
||||
#endif /* __XF86RAC_H */
|
||||
|
|
@ -1,137 +0,0 @@
|
|||
|
||||
/*
|
||||
* Copyright (c) 1999-2002 by The XFree86 Project, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the copyright holder(s)
|
||||
* and author(s) shall not be used in advertising or otherwise to promote
|
||||
* the sale, use or other dealings in this Software without prior written
|
||||
* authorization from the copyright holder(s) and author(s).
|
||||
*/
|
||||
|
||||
#ifndef _XF86_RESOURCES_H
|
||||
|
||||
#define _XF86_RESOURCES_H
|
||||
|
||||
#include "xf86str.h"
|
||||
|
||||
#define _END {ResEnd,0,0}
|
||||
|
||||
#define _VGA_EXCLUSIVE \
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResExcIoBlock | ResBios | ResBus, 0x03B0, 0x03BB},\
|
||||
{ResExcIoBlock | ResBios | ResBus, 0x03C0, 0x03DF}
|
||||
|
||||
#define _VGA_SHARED \
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResShrIoBlock | ResBios | ResBus, 0x03B0, 0x03BB},\
|
||||
{ResShrIoBlock | ResBios | ResBus, 0x03C0, 0x03DF}
|
||||
|
||||
#define _VGA_SHARED_MEM \
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF}
|
||||
|
||||
#define _VGA_SHARED_IO \
|
||||
{ResShrIoBlock | ResBios | ResBus, 0x03B0, 0x03BB},\
|
||||
{ResShrIoBlock | ResBios | ResBus, 0x03C0, 0x03DF}
|
||||
|
||||
/*
|
||||
* Exclusive unused VGA: resources unneeded but cannot be disabled.
|
||||
* Like old Millennium.
|
||||
*/
|
||||
#define _VGA_EXCLUSIVE_UNUSED \
|
||||
{ResExcUusdMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResExcUusdMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResExcUusdMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResExcUusdIoBlock | ResBios | ResBus, 0x03B0, 0x03BB},\
|
||||
{ResExcUusdIoBlock | ResBios | ResBus, 0x03C0, 0x03DF}
|
||||
|
||||
/*
|
||||
* Shared unused VGA: resources unneeded but cannot be disabled
|
||||
* independently. This is used to determine if a device needs RAC.
|
||||
*/
|
||||
#define _VGA_SHARED_UNUSED \
|
||||
{ResShrUusdMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResShrUusdMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResShrUusdMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResShrUusdIoBlock | ResBios | ResBus, 0x03B0, 0x03BB},\
|
||||
{ResShrUusdIoBlock | ResBios | ResBus, 0x03C0, 0x03DF}
|
||||
|
||||
/*
|
||||
* Sparse versions of the above for those adapters that respond to all ISA
|
||||
* aliases of VGA ports.
|
||||
*/
|
||||
#define _VGA_EXCLUSIVE_SPARSE \
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResExcMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResExcIoSparse | ResBios | ResBus, 0x03B0, 0x03F8},\
|
||||
{ResExcIoSparse | ResBios | ResBus, 0x03B8, 0x03FC},\
|
||||
{ResExcIoSparse | ResBios | ResBus, 0x03C0, 0x03E0}
|
||||
|
||||
#define _VGA_SHARED_SPARSE \
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000A0000, 0x000AFFFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B0000, 0x000B7FFF},\
|
||||
{ResShrMemBlock | ResBios | ResBus, 0x000B8000, 0x000BFFFF},\
|
||||
{ResShrIoSparse | ResBios | ResBus, 0x03B0, 0x03F8},\
|
||||
{ResShrIoSparse | ResBios | ResBus, 0x03B8, 0x03FC},\
|
||||
{ResShrIoSparse | ResBios | ResBus, 0x03C0, 0x03E0}
|
||||
|
||||
#define _8514_EXCLUSIVE \
|
||||
{ResExcIoSparse | ResBios | ResBus, 0x02E8, 0x03F8}
|
||||
|
||||
#define _8514_SHARED \
|
||||
{ResShrIoSparse | ResBios | ResBus, 0x02E8, 0x03F8}
|
||||
|
||||
/* Predefined resources */
|
||||
extern _X_EXPORT resRange resVgaExclusive[];
|
||||
extern _X_EXPORT resRange resVgaShared[];
|
||||
extern _X_EXPORT resRange resVgaIoShared[];
|
||||
extern _X_EXPORT resRange resVgaMemShared[];
|
||||
extern _X_EXPORT resRange resVgaUnusedExclusive[];
|
||||
extern _X_EXPORT resRange resVgaUnusedShared[];
|
||||
extern _X_EXPORT resRange resVgaSparseExclusive[];
|
||||
extern _X_EXPORT resRange resVgaSparseShared[];
|
||||
extern _X_EXPORT resRange res8514Exclusive[];
|
||||
extern _X_EXPORT resRange res8514Shared[];
|
||||
|
||||
/* Less misleading aliases for xf86SetOperatingState() */
|
||||
#define resVgaMem resVgaMemShared
|
||||
#define resVgaIo resVgaIoShared
|
||||
#define resVga resVgaShared
|
||||
|
||||
/* Old style names */
|
||||
#define RES_EXCLUSIVE_VGA resVgaExclusive
|
||||
#define RES_SHARED_VGA resVgaShared
|
||||
#define RES_EXCLUSIVE_8514 res8514Exclusive
|
||||
#define RES_SHARED_8514 res8514Shared
|
||||
|
||||
#define _PCI_AVOID_PC_STYLE \
|
||||
{ResExcIoSparse | ResBus, 0x0100, 0x0300},\
|
||||
{ResExcIoSparse | ResBus, 0x0200, 0x0200},\
|
||||
{ResExcMemBlock | ResBus, 0xA0000,0xFFFFF}
|
||||
|
||||
#define RES_UNDEFINED NULL
|
||||
#endif
|
||||
|
|
@ -40,16 +40,12 @@
|
|||
#include "os.h"
|
||||
#include "xf86.h"
|
||||
#include "xf86Priv.h"
|
||||
#include "xf86Resources.h"
|
||||
|
||||
#include "xf86Bus.h"
|
||||
|
||||
#define XF86_OS_PRIVS
|
||||
#define NEED_OS_RAC_PROTOS
|
||||
#include "xf86_OSproc.h"
|
||||
|
||||
#include "xf86RAC.h"
|
||||
|
||||
Bool fbSlotClaimed = FALSE;
|
||||
|
||||
int
|
||||
|
|
@ -73,10 +69,6 @@ xf86ClaimFbSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active)
|
|||
p->active = active;
|
||||
p->inUse = FALSE;
|
||||
xf86AddDevToEntity(num, dev);
|
||||
p->access = xnfcalloc(1,sizeof(EntityAccessRec));
|
||||
p->access->fallback = &AccessNULL;
|
||||
p->access->pAccess = &AccessNULL;
|
||||
p->busAcc = NULL;
|
||||
|
||||
fbSlotClaimed = TRUE;
|
||||
return num;
|
||||
|
|
|
|||
|
|
@ -40,16 +40,12 @@
|
|||
#include "os.h"
|
||||
#include "xf86.h"
|
||||
#include "xf86Priv.h"
|
||||
#include "xf86Resources.h"
|
||||
|
||||
#include "xf86Bus.h"
|
||||
|
||||
#define XF86_OS_PRIVS
|
||||
#define NEED_OS_RAC_PROTOS
|
||||
#include "xf86_OSproc.h"
|
||||
|
||||
#include "xf86RAC.h"
|
||||
|
||||
int
|
||||
xf86ClaimNoSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active)
|
||||
{
|
||||
|
|
@ -64,10 +60,6 @@ xf86ClaimNoSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active)
|
|||
p->active = active;
|
||||
p->inUse = FALSE;
|
||||
xf86AddDevToEntity(num, dev);
|
||||
p->access = xnfcalloc(1,sizeof(EntityAccessRec));
|
||||
p->access->fallback = &AccessNULL;
|
||||
p->access->pAccess = &AccessNULL;
|
||||
p->busAcc = NULL;
|
||||
|
||||
return num;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,16 +41,13 @@
|
|||
#include "Pci.h"
|
||||
#include "xf86.h"
|
||||
#include "xf86Priv.h"
|
||||
#include "xf86Resources.h"
|
||||
|
||||
/* Bus-specific headers */
|
||||
#include "xf86Bus.h"
|
||||
|
||||
#define XF86_OS_PRIVS
|
||||
#define NEED_OS_RAC_PROTOS
|
||||
#include "xf86_OSproc.h"
|
||||
|
||||
#include "xf86RAC.h"
|
||||
|
||||
/* Bus-specific globals */
|
||||
Bool pciSlotClaimed = FALSE;
|
||||
|
|
@ -107,241 +104,6 @@ xf86FormatPciBusNumber(int busnum, char *buffer)
|
|||
sprintf(buffer, "%d@%d", busnum & 0x00ff, busnum >> 8);
|
||||
}
|
||||
|
||||
/*
|
||||
* IO enable/disable related routines for PCI
|
||||
*/
|
||||
#define pArg ((pciArg*)arg)
|
||||
#define SETBITS PCI_CMD_IO_ENABLE
|
||||
static void
|
||||
pciIoAccessEnable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciIoAccessEnable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
pciIoAccessDisable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciIoAccessDisable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl &= ~SETBITS;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
|
||||
#undef SETBITS
|
||||
#define SETBITS (PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE)
|
||||
static void
|
||||
pciIo_MemAccessEnable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciIo_MemAccessEnable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
pciIo_MemAccessDisable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciIo_MemAccessDisable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl &= ~SETBITS;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
|
||||
#undef SETBITS
|
||||
#define SETBITS (PCI_CMD_MEM_ENABLE)
|
||||
static void
|
||||
pciMemAccessEnable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciMemAccessEnable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
pciMemAccessDisable(void* arg)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciMemAccessDisable: 0x%05lx\n", *(PCITAG *)arg);
|
||||
#endif
|
||||
pArg->ctrl &= ~SETBITS;
|
||||
pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG);
|
||||
#endif
|
||||
}
|
||||
#undef SETBITS
|
||||
#undef pArg
|
||||
|
||||
|
||||
/* move to OS layer */
|
||||
#define MASKBITS (PCI_PCI_BRIDGE_VGA_EN | PCI_PCI_BRIDGE_MASTER_ABORT_EN)
|
||||
static void
|
||||
pciBusAccessEnable(BusAccPtr ptr)
|
||||
{
|
||||
#if 0
|
||||
struct pci_device * const dev = ptr->busdep.pci.dev;
|
||||
uint16_t ctrl;
|
||||
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciBusAccessEnable: bus=%d\n", ptr->busdep.pci.bus);
|
||||
#endif
|
||||
pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG );
|
||||
if ((ctrl & MASKBITS) != PCI_PCI_BRIDGE_VGA_EN) {
|
||||
ctrl = (ctrl | PCI_PCI_BRIDGE_VGA_EN) &
|
||||
~(PCI_PCI_BRIDGE_MASTER_ABORT_EN | PCI_PCI_BRIDGE_SECONDARY_RESET);
|
||||
pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* move to OS layer */
|
||||
static void
|
||||
pciBusAccessDisable(BusAccPtr ptr)
|
||||
{
|
||||
#if 0
|
||||
struct pci_device * const dev = ptr->busdep.pci.dev;
|
||||
uint16_t ctrl;
|
||||
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciBusAccessDisable: bus=%d\n", ptr->busdep.pci.bus);
|
||||
#endif
|
||||
pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG );
|
||||
if (ctrl & MASKBITS) {
|
||||
ctrl &= ~(MASKBITS | PCI_PCI_BRIDGE_SECONDARY_RESET);
|
||||
pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#undef MASKBITS
|
||||
|
||||
static void
|
||||
pciSetBusAccess(BusAccPtr ptr)
|
||||
{
|
||||
#if 0
|
||||
#ifdef DEBUG
|
||||
ErrorF("pciSetBusAccess: route VGA to bus %d\n", ptr->busdep.pci.bus);
|
||||
#endif
|
||||
|
||||
if (!ptr->primary && !ptr->current)
|
||||
return;
|
||||
|
||||
if (ptr->current && ptr->current->disable_f)
|
||||
(*ptr->current->disable_f)(ptr->current);
|
||||
ptr->current = NULL;
|
||||
|
||||
/* walk down */
|
||||
while (ptr->primary) { /* No enable for root bus */
|
||||
if (ptr != ptr->primary->current) {
|
||||
if (ptr->primary->current && ptr->primary->current->disable_f)
|
||||
(*ptr->primary->current->disable_f)(ptr->primary->current);
|
||||
if (ptr->enable_f)
|
||||
(*ptr->enable_f)(ptr);
|
||||
ptr->primary->current = ptr;
|
||||
}
|
||||
ptr = ptr->primary;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* move to OS layer */
|
||||
static void
|
||||
savePciState( struct pci_device * dev, pciSavePtr ptr )
|
||||
{
|
||||
#if 0
|
||||
int i;
|
||||
|
||||
pci_device_cfg_read_u32( dev, & ptr->command, PCI_CMD_STAT_REG );
|
||||
|
||||
for ( i = 0; i < 6; i++ ) {
|
||||
pci_device_cfg_read_u32( dev, & ptr->base[i],
|
||||
PCI_CMD_BASE_REG + (i * 4) );
|
||||
}
|
||||
|
||||
pci_device_cfg_read_u32( dev, & ptr->biosBase, PCI_CMD_BIOS_REG );
|
||||
#endif
|
||||
}
|
||||
|
||||
/* move to OS layer */
|
||||
#if 0
|
||||
static void
|
||||
restorePciState( struct pci_device * dev, pciSavePtr ptr)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* disable card before setting anything */
|
||||
pci_device_cfg_write_bits(dev, PCI_CMD_MEM_ENABLE | PCI_CMD_IO_ENABLE, 0,
|
||||
PCI_CMD_STAT_REG);
|
||||
|
||||
pci_device_cfg_write_u32(dev, ptr->biosBase, PCI_CMD_BIOS_REG);
|
||||
|
||||
for ( i = 0; i < 6; i++ ) {
|
||||
pci_device_cfg_write_u32(dev, ptr->base[i],
|
||||
PCI_CMD_BASE_REG + (i * 4));
|
||||
}
|
||||
|
||||
pci_device_cfg_write_u32(dev, ptr->command, PCI_CMD_STAT_REG);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* move to OS layer */
|
||||
static void
|
||||
savePciBusState(BusAccPtr ptr)
|
||||
{
|
||||
#if 0
|
||||
struct pci_device * const dev = ptr->busdep.pci.dev;
|
||||
uint16_t temp;
|
||||
|
||||
pci_device_cfg_read_u16( dev, & temp, PCI_PCI_BRIDGE_CONTROL_REG );
|
||||
ptr->busdep.pci.save.control = temp & ~PCI_PCI_BRIDGE_SECONDARY_RESET;
|
||||
|
||||
/* Allow master aborts to complete normally on non-root buses */
|
||||
if ( ptr->busdep.pci.save.control & PCI_PCI_BRIDGE_MASTER_ABORT_EN ) {
|
||||
temp = ptr->busdep.pci.save.control & ~PCI_PCI_BRIDGE_MASTER_ABORT_EN;
|
||||
pci_device_cfg_read_u16( dev, & temp, PCI_PCI_BRIDGE_CONTROL_REG );
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* move to OS layer */
|
||||
#define MASKBITS (PCI_PCI_BRIDGE_VGA_EN | PCI_PCI_BRIDGE_MASTER_ABORT_EN)
|
||||
static void
|
||||
restorePciBusState(BusAccPtr ptr)
|
||||
{
|
||||
#if 0
|
||||
struct pci_device * const dev = ptr->busdep.pci.dev;
|
||||
uint16_t ctrl;
|
||||
|
||||
/* Only restore the bits we've changed (and don't cause resets) */
|
||||
pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG );
|
||||
|
||||
if ((ctrl ^ ptr->busdep.pci.save.control) & MASKBITS) {
|
||||
ctrl &= ~(MASKBITS | PCI_PCI_BRIDGE_SECONDARY_RESET);
|
||||
ctrl |= ptr->busdep.pci.save.control & MASKBITS;
|
||||
pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#undef MASKBITS
|
||||
|
||||
|
||||
/*
|
||||
* xf86Bus.c interface
|
||||
*/
|
||||
|
|
@ -488,19 +250,8 @@ initPciState(void)
|
|||
pvp->user_data = (intptr_t) pcaccp;
|
||||
|
||||
pcaccp->arg.dev = pvp;
|
||||
pcaccp->ioAccess.AccessDisable = pciIoAccessDisable;
|
||||
pcaccp->ioAccess.AccessEnable = pciIoAccessEnable;
|
||||
pcaccp->ioAccess.arg = &pcaccp->arg;
|
||||
pcaccp->io_memAccess.AccessDisable = pciIo_MemAccessDisable;
|
||||
pcaccp->io_memAccess.AccessEnable = pciIo_MemAccessEnable;
|
||||
pcaccp->io_memAccess.arg = &pcaccp->arg;
|
||||
pcaccp->memAccess.AccessDisable = pciMemAccessDisable;
|
||||
pcaccp->memAccess.AccessEnable = pciMemAccessEnable;
|
||||
pcaccp->memAccess.arg = &pcaccp->arg;
|
||||
|
||||
pcaccp->ctrl = PCISHAREDIOCLASSES(pvp->device_class);
|
||||
|
||||
savePciState(pvp, &pcaccp->save);
|
||||
pcaccp->arg.ctrl = pcaccp->save.command;
|
||||
}
|
||||
}
|
||||
|
|
@ -535,7 +286,7 @@ initPciBusState(void)
|
|||
};
|
||||
struct pci_device *dev;
|
||||
struct pci_device_iterator *iter;
|
||||
BusAccPtr pbap, pbap_tmp;
|
||||
BusAccPtr pbap;
|
||||
|
||||
iter = pci_id_match_iterator_create(& bridge_match);
|
||||
while((dev = pci_device_next(iter)) != NULL) {
|
||||
|
|
@ -544,7 +295,6 @@ initPciBusState(void)
|
|||
int secondary;
|
||||
int subordinate;
|
||||
|
||||
|
||||
pci_device_get_bridge_buses(dev, &primary, &secondary, &subordinate);
|
||||
|
||||
pbap = xnfcalloc(1,sizeof(BusAccRec));
|
||||
|
|
@ -553,8 +303,6 @@ initPciBusState(void)
|
|||
pbap->busdep_type = BUS_PCI;
|
||||
pbap->busdep.pci.dev = dev;
|
||||
|
||||
pbap->set_f = pciSetBusAccess;
|
||||
|
||||
switch (subclass) {
|
||||
case PCI_SUBCLASS_BRIDGE_HOST:
|
||||
pbap->type = BUS_PCI;
|
||||
|
|
@ -562,142 +310,12 @@ initPciBusState(void)
|
|||
case PCI_SUBCLASS_BRIDGE_PCI:
|
||||
case PCI_SUBCLASS_BRIDGE_CARDBUS:
|
||||
pbap->type = BUS_PCI;
|
||||
pbap->save_f = savePciBusState;
|
||||
pbap->restore_f = restorePciBusState;
|
||||
pbap->enable_f = pciBusAccessEnable;
|
||||
pbap->disable_f = pciBusAccessDisable;
|
||||
savePciBusState(pbap);
|
||||
break;
|
||||
}
|
||||
pbap->next = xf86BusAccInfo;
|
||||
xf86BusAccInfo = pbap;
|
||||
}
|
||||
|
||||
pci_iterator_destroy(iter);
|
||||
|
||||
for (pbap = xf86BusAccInfo; pbap; pbap = pbap->next) {
|
||||
pbap->primary = NULL;
|
||||
|
||||
if (pbap->busdep_type == BUS_PCI
|
||||
&& pbap->busdep.pci.primary_bus > -1) {
|
||||
pbap_tmp = xf86BusAccInfo;
|
||||
while (pbap_tmp) {
|
||||
if (pbap_tmp->busdep_type == BUS_PCI &&
|
||||
pbap_tmp->busdep.pci.bus == pbap->busdep.pci.primary_bus) {
|
||||
/* Don't create loops */
|
||||
if (pbap == pbap_tmp)
|
||||
break;
|
||||
pbap->primary = pbap_tmp;
|
||||
break;
|
||||
}
|
||||
pbap_tmp = pbap_tmp->next;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
PciStateEnter(void)
|
||||
{
|
||||
#if 0
|
||||
unsigned i;
|
||||
|
||||
if (xf86PciVideoInfo == NULL)
|
||||
return;
|
||||
|
||||
for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) {
|
||||
pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data;
|
||||
|
||||
if ( (paccp != NULL) && paccp->ctrl ) {
|
||||
savePciState(paccp->arg.dev, &paccp->save);
|
||||
restorePciState(paccp->arg.dev, &paccp->restore);
|
||||
paccp->arg.ctrl = paccp->restore.command;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
PciBusStateEnter(void)
|
||||
{
|
||||
#if 0
|
||||
BusAccPtr pbap = xf86BusAccInfo;
|
||||
|
||||
while (pbap) {
|
||||
if (pbap->save_f)
|
||||
pbap->save_f(pbap);
|
||||
pbap = pbap->next;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
PciStateLeave(void)
|
||||
{
|
||||
#if 0
|
||||
unsigned i;
|
||||
|
||||
if (xf86PciVideoInfo == NULL)
|
||||
return;
|
||||
|
||||
for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) {
|
||||
pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data;
|
||||
|
||||
if ( (paccp != NULL) && paccp->ctrl ) {
|
||||
savePciState(paccp->arg.dev, &paccp->restore);
|
||||
restorePciState(paccp->arg.dev, &paccp->save);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
PciBusStateLeave(void)
|
||||
{
|
||||
#if 0
|
||||
BusAccPtr pbap = xf86BusAccInfo;
|
||||
|
||||
while (pbap) {
|
||||
if (pbap->restore_f)
|
||||
pbap->restore_f(pbap);
|
||||
pbap = pbap->next;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
DisablePciAccess(void)
|
||||
{
|
||||
#if 0
|
||||
unsigned i;
|
||||
|
||||
if (xf86PciVideoInfo == NULL)
|
||||
return;
|
||||
|
||||
for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) {
|
||||
pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data;
|
||||
|
||||
if ( (paccp != NULL) && paccp->ctrl ) {
|
||||
pciIo_MemAccessDisable(paccp->io_memAccess.arg);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
DisablePciBusAccess(void)
|
||||
{
|
||||
#if 0
|
||||
BusAccPtr pbap = xf86BusAccInfo;
|
||||
|
||||
while (pbap) {
|
||||
if (pbap->disable_f)
|
||||
pbap->disable_f(pbap);
|
||||
if (pbap->primary)
|
||||
pbap->primary->current = NULL;
|
||||
pbap = pbap->next;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -710,10 +328,6 @@ xf86ClaimPciSlot(struct pci_device * d, DriverPtr drvp,
|
|||
int chipset, GDevPtr dev, Bool active)
|
||||
{
|
||||
EntityPtr p = NULL;
|
||||
pciAccPtr paccp = (pciAccPtr) d->user_data;
|
||||
BusAccPtr pbap = xf86BusAccInfo;
|
||||
const unsigned bus = PCI_MAKE_BUS(d->domain, d->bus);
|
||||
|
||||
int num;
|
||||
|
||||
if (xf86CheckPciSlot(d)) {
|
||||
|
|
@ -727,25 +341,6 @@ xf86ClaimPciSlot(struct pci_device * d, DriverPtr drvp,
|
|||
p->inUse = FALSE;
|
||||
if (dev)
|
||||
xf86AddDevToEntity(num, dev);
|
||||
/* Here we initialize the access structure */
|
||||
p->access = xnfcalloc(1,sizeof(EntityAccessRec));
|
||||
if (paccp != NULL) {
|
||||
p->access->fallback = & paccp->io_memAccess;
|
||||
p->access->pAccess = & paccp->io_memAccess;
|
||||
paccp->ctrl = TRUE; /* mark control if not already */
|
||||
}
|
||||
else {
|
||||
p->access->fallback = &AccessNULL;
|
||||
p->access->pAccess = &AccessNULL;
|
||||
}
|
||||
|
||||
p->busAcc = NULL;
|
||||
while (pbap) {
|
||||
if (pbap->type == BUS_PCI && pbap->busdep.pci.bus == bus)
|
||||
p->busAcc = pbap;
|
||||
pbap = pbap->next;
|
||||
}
|
||||
|
||||
pciSlotClaimed = TRUE;
|
||||
|
||||
if (active) {
|
||||
|
|
@ -929,21 +524,3 @@ xf86CheckPciSlot(const struct pci_device *d)
|
|||
}
|
||||
|
||||
|
||||
void
|
||||
pciConvertRange2Host(int entityIndex, resRange *pRange)
|
||||
{
|
||||
struct pci_device *const pvp = xf86GetPciInfoForEntity(entityIndex);
|
||||
const PCITAG tag = PCI_MAKE_TAG(PCI_MAKE_BUS(pvp->domain, pvp->bus),
|
||||
pvp->dev, pvp->func);
|
||||
|
||||
if (pvp == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (!(pRange->type & ResBus))
|
||||
return;
|
||||
|
||||
/* Set domain number */
|
||||
pRange->type &= ~(ResDomain | ResBus);
|
||||
pRange->type |= pvp->domain << 24;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -48,9 +48,6 @@ typedef struct {
|
|||
|
||||
typedef struct {
|
||||
pciArg arg;
|
||||
xf86AccessRec ioAccess;
|
||||
xf86AccessRec io_memAccess;
|
||||
xf86AccessRec memAccess;
|
||||
pciSave save;
|
||||
pciSave restore;
|
||||
Bool ctrl;
|
||||
|
|
@ -69,6 +66,5 @@ void PciStateEnter(void);
|
|||
void PciBusStateEnter(void);
|
||||
void PciStateLeave(void);
|
||||
void PciBusStateLeave(void);
|
||||
void pciConvertRange2Host(int entityIndex, resRange *pRange);
|
||||
|
||||
#endif /* _XF86_PCI_BUS_H */
|
||||
|
|
|
|||
|
|
@ -556,145 +556,6 @@ typedef enum {
|
|||
PM_NONE
|
||||
} pmWait;
|
||||
|
||||
/*
|
||||
* The IO access enabler struct. This contains the address for
|
||||
* the IOEnable/IODisable funcs for their specific bus along
|
||||
* with a pointer to data needed by them
|
||||
*/
|
||||
typedef struct _AccessRec {
|
||||
void (*AccessDisable)(void *arg);
|
||||
void (*AccessEnable)(void *arg);
|
||||
void *arg;
|
||||
} xf86AccessRec, *xf86AccessPtr;
|
||||
|
||||
typedef struct {
|
||||
xf86AccessPtr mem;
|
||||
xf86AccessPtr io;
|
||||
xf86AccessPtr io_mem;
|
||||
} xf86SetAccessFuncRec, *xf86SetAccessFuncPtr;
|
||||
|
||||
/* bus-access-related types */
|
||||
typedef enum {
|
||||
NONE,
|
||||
IO,
|
||||
MEM_IO,
|
||||
MEM
|
||||
} resType;
|
||||
|
||||
typedef struct _EntityAccessRec {
|
||||
xf86AccessPtr fallback;
|
||||
xf86AccessPtr pAccess;
|
||||
resType rt;
|
||||
pointer busAcc;
|
||||
struct _EntityAccessRec *next;
|
||||
} EntityAccessRec, *EntityAccessPtr;
|
||||
|
||||
typedef struct _CurrAccRec {
|
||||
EntityAccessPtr pMemAccess;
|
||||
EntityAccessPtr pIoAccess;
|
||||
} xf86CurrentAccessRec, *xf86CurrentAccessPtr;
|
||||
|
||||
/* new RAC */
|
||||
|
||||
/* Resource Type values */
|
||||
#define ResNone ((unsigned long)(-1))
|
||||
|
||||
#define ResMem 0x0001
|
||||
#define ResIo 0x0002
|
||||
#define ResPhysMask 0x000F
|
||||
|
||||
#define ResExclusive 0x0010
|
||||
#define ResShared 0x0020
|
||||
#define ResAny 0x0040
|
||||
#define ResAccMask 0x0070
|
||||
#define ResUnused 0x0080
|
||||
|
||||
#define ResUnusedOpr 0x0100
|
||||
#define ResDisableOpr 0x0200
|
||||
#define ResOprMask 0x0300
|
||||
|
||||
#define ResBlock 0x0400
|
||||
#define ResSparse 0x0800
|
||||
#define ResExtMask 0x0C00
|
||||
|
||||
#define ResEstimated 0x001000
|
||||
#define ResInit 0x002000
|
||||
#define ResBios 0x004000
|
||||
#define ResMiscMask 0x00F000
|
||||
|
||||
#define ResBus 0x010000
|
||||
|
||||
#if defined(__alpha__) && defined(linux)
|
||||
# define ResDomain 0x1ff000000ul
|
||||
#else
|
||||
# define ResDomain 0xff000000ul
|
||||
#endif
|
||||
#define ResTypeMask (ResPhysMask | ResDomain) /* For conflict check */
|
||||
|
||||
#define ResEnd ResNone
|
||||
|
||||
#define ResExcMemBlock (ResMem | ResExclusive | ResBlock)
|
||||
#define ResExcIoBlock (ResIo | ResExclusive | ResBlock)
|
||||
#define ResShrMemBlock (ResMem | ResShared | ResBlock)
|
||||
#define ResShrIoBlock (ResIo | ResShared | ResBlock)
|
||||
#define ResExcUusdMemBlock (ResMem | ResExclusive | ResUnused | ResBlock)
|
||||
#define ResExcUusdIoBlock (ResIo | ResExclusive | ResUnused | ResBlock)
|
||||
#define ResShrUusdMemBlock (ResMem | ResShared | ResUnused | ResBlock)
|
||||
#define ResShrUusdIoBlock (ResIo | ResShared | ResUnused | ResBlock)
|
||||
#define ResExcUusdMemSparse (ResMem | ResExclusive | ResUnused | ResSparse)
|
||||
#define ResExcUusdIoSparse (ResIo | ResExclusive | ResUnused | ResSparse)
|
||||
#define ResShrUusdMemSparse (ResMem | ResShared | ResUnused | ResSparse)
|
||||
#define ResShrUusdIoSparse (ResIo | ResShared | ResUnused | ResSparse)
|
||||
|
||||
#define ResExcMemSparse (ResMem | ResExclusive | ResSparse)
|
||||
#define ResExcIoSparse (ResIo | ResExclusive | ResSparse)
|
||||
#define ResShrMemSparse (ResMem | ResShared | ResSparse)
|
||||
#define ResShrIoSparse (ResIo | ResShared | ResSparse)
|
||||
#define ResUusdMemSparse (ResMem | ResUnused | ResSparse)
|
||||
#define ResUusdIoSparse (ResIo | ResUnused | ResSparse)
|
||||
|
||||
#define ResIsMem(r) (((r)->type & ResPhysMask) == ResMem)
|
||||
#define ResIsIo(r) (((r)->type & ResPhysMask) == ResIo)
|
||||
#define ResIsExclusive(r) (((r)->type & ResAccMask) == ResExclusive)
|
||||
#define ResIsShared(r) (((r)->type & ResAccMask) == ResShared)
|
||||
#define ResIsUnused(r) (((r)->type & ResAccMask) == ResUnused)
|
||||
#define ResIsBlock(r) (((r)->type & ResExtMask) == ResBlock)
|
||||
#define ResIsSparse(r) (((r)->type & ResExtMask) == ResSparse)
|
||||
#define ResIsEstimated(r) (((r)->type & ResMiscMask) == ResEstimated)
|
||||
|
||||
typedef struct {
|
||||
unsigned long type; /* shared, exclusive, unused etc. */
|
||||
memType a;
|
||||
memType b;
|
||||
} resRange, *resList;
|
||||
|
||||
#define RANGE_TYPE(type, domain) \
|
||||
(((unsigned long)(domain) << 24) | ((type) & ~ResBus))
|
||||
#define RANGE(r,u,v,t) {\
|
||||
(r).a = (u);\
|
||||
(r).b = (v);\
|
||||
(r).type = (t);\
|
||||
}
|
||||
|
||||
#define rBase a
|
||||
#define rMask b
|
||||
#define rBegin a
|
||||
#define rEnd b
|
||||
|
||||
/* resource record */
|
||||
typedef struct _resRec *resPtr;
|
||||
typedef struct _resRec {
|
||||
resRange val;
|
||||
int entityIndex; /* who owns the resource */
|
||||
resPtr next;
|
||||
} resRec;
|
||||
|
||||
#define sparse_base val.rBase
|
||||
#define sparse_mask val.rMask
|
||||
#define block_begin val.rBegin
|
||||
#define block_end val.rEnd
|
||||
#define res_type val.type
|
||||
|
||||
typedef struct _PciChipsets {
|
||||
/**
|
||||
* Key used to match this device with its name in an array of
|
||||
|
|
@ -720,12 +581,14 @@ typedef struct _PciChipsets {
|
|||
*/
|
||||
int PCIid;
|
||||
|
||||
/**
|
||||
* Resources associated with this type of device.
|
||||
*/
|
||||
resRange *resList;
|
||||
/* dummy place holders for drivers to build against old/new servers */
|
||||
#define RES_UNDEFINED NULL
|
||||
#define RES_EXCLUSIVE_VGA NULL
|
||||
#define RES_SHARED_VGA NULL
|
||||
void *dummy;
|
||||
} PciChipsets;
|
||||
|
||||
|
||||
/* Entity properties */
|
||||
typedef void (*EntityProc)(int entityIndex,pointer private);
|
||||
|
||||
|
|
@ -734,7 +597,6 @@ typedef struct _entityInfo {
|
|||
BusRec location;
|
||||
int chipset;
|
||||
Bool active;
|
||||
resPtr resources;
|
||||
GDevPtr device;
|
||||
DriverPtr driver;
|
||||
} EntityInfoRec, *EntityInfoPtr;
|
||||
|
|
@ -926,12 +788,6 @@ typedef struct _ScrnInfoRec {
|
|||
|
||||
int chipID;
|
||||
int chipRev;
|
||||
int racMemFlags;
|
||||
int racIoFlags;
|
||||
pointer access;
|
||||
xf86CurrentAccessPtr CurrentAccess;
|
||||
resType resourceType;
|
||||
pointer busAccess;
|
||||
|
||||
/* Allow screens to be enabled/disabled individually */
|
||||
Bool vtSema;
|
||||
|
|
|
|||
|
|
@ -117,11 +117,9 @@ cat > sdksyms.c << EOF
|
|||
#include "xf86PciInfo.h"
|
||||
#include "xf86Priv.h"
|
||||
#include "xf86Privstr.h"
|
||||
#include "xf86Resources.h"
|
||||
#include "xf86cmap.h"
|
||||
#include "xf86fbman.h"
|
||||
#include "xf86str.h"
|
||||
#include "xf86RAC.h"
|
||||
#include "xf86Xinput.h"
|
||||
#include "xisb.h"
|
||||
#if XV
|
||||
|
|
|
|||
|
|
@ -17,9 +17,6 @@ else
|
|||
KMOD_SOURCES = $(srcdir)/../shared/kmod_noop.c
|
||||
endif
|
||||
|
||||
# FIXME: Non-i386/ia64 resource support.
|
||||
RES_SOURCES = $(srcdir)/../shared/stdResource.c
|
||||
|
||||
if AGP
|
||||
AGP_SOURCES = $(srcdir)/../linux/lnx_agp.c
|
||||
else
|
||||
|
|
|
|||
|
|
@ -453,58 +453,3 @@ xf86MapLegacyIO(struct pci_device *dev)
|
|||
return (IOADDRESS)DomainMmappedIO[domain];
|
||||
}
|
||||
|
||||
resPtr
|
||||
xf86AccResFromOS(resPtr pRes)
|
||||
{
|
||||
struct pci_device *dev;
|
||||
struct pci_device_iterator *iter;
|
||||
resRange range;
|
||||
|
||||
iter = pci_id_match_iterator_create(& match_host_bridge);
|
||||
while ((dev = pci_device_next(iter)) != NULL) {
|
||||
const int domain = dev->domain;
|
||||
const struct pciSizes * const sizes = linuxGetSizesStruct(dev);
|
||||
|
||||
/*
|
||||
* At minimum, the top and bottom resources must be claimed, so
|
||||
* that resources that are (or appear to be) unallocated can be
|
||||
* relocated.
|
||||
*/
|
||||
RANGE(range, 0x00000000u, 0x0009ffffu,
|
||||
RANGE_TYPE(ResExcMemBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
RANGE(range, 0x000c0000u, 0x000effffu,
|
||||
RANGE_TYPE(ResExcMemBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
RANGE(range, 0x000f0000u, 0x000fffffu,
|
||||
RANGE_TYPE(ResExcMemBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
|
||||
RANGE(range, (ADDRESS)(sizes->mem_size - 1),
|
||||
(ADDRESS)(sizes->mem_size - 1),
|
||||
RANGE_TYPE(ResExcMemBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
|
||||
RANGE(range, 0x00000000u, 0x00000000u,
|
||||
RANGE_TYPE(ResExcIoBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
RANGE(range, (IOADDRESS)(sizes->io_size - 1),
|
||||
(IOADDRESS)(sizes->io_size - 1),
|
||||
RANGE_TYPE(ResExcIoBlock, domain));
|
||||
pRes = xf86AddResToList(pRes, &range, -1);
|
||||
|
||||
/* FIXME: The old code reserved domain 0 for a special purpose. The
|
||||
* FIXME: new code just uses whatever domains the kernel tells it,
|
||||
* FIXME: but there is no way to get a domain < 0. What should
|
||||
* FIXME: happen here?
|
||||
*
|
||||
if (domain <= 0)
|
||||
break;
|
||||
*/
|
||||
}
|
||||
|
||||
pci_iterator_destroy(iter);
|
||||
|
||||
return pRes;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,6 @@ libhurd_la_SOURCES = hurd_bell.c hurd_init.c hurd_mmap.c \
|
|||
hurd_video.c \
|
||||
$(srcdir)/../shared/VTsw_noop.c \
|
||||
$(srcdir)/../shared/posix_tty.c \
|
||||
$(srcdir)/../shared/stdResource.c \
|
||||
$(srcdir)/../shared/vidmem.c \
|
||||
$(srcdir)/../shared/sigiostubs.c \
|
||||
$(srcdir)/../shared/pm_noop.c \
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@ liblinux_la_SOURCES = lnx_init.c lnx_video.c \
|
|||
$(srcdir)/../shared/posix_tty.c \
|
||||
$(srcdir)/../shared/vidmem.c \
|
||||
$(srcdir)/../shared/sigio.c \
|
||||
$(srcdir)/../shared/stdResource.c \
|
||||
$(ACPI_SRCS) \
|
||||
$(APM_SRCS) \
|
||||
$(PLATFORM_PCI_SUPPORT)
|
||||
|
|
|
|||
|
|
@ -1,110 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 1999-2003 by The XFree86 Project, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the copyright holder(s)
|
||||
* and author(s) shall not be used in advertising or otherwise to promote
|
||||
* the sale, use or other dealings in this Software without prior written
|
||||
* authorization from the copyright holder(s) and author(s).
|
||||
*/
|
||||
|
||||
/* Standard resource information code */
|
||||
|
||||
#ifdef HAVE_XORG_CONFIG_H
|
||||
#include <xorg-config.h>
|
||||
#endif
|
||||
|
||||
#include <X11/X.h>
|
||||
#include "xf86.h"
|
||||
#include "xf86Priv.h"
|
||||
#include "xf86Privstr.h"
|
||||
#define NEED_OS_RAC_PROTOS
|
||||
#include "xf86_OSlib.h"
|
||||
#include "xf86Resources.h"
|
||||
|
||||
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || \
|
||||
defined(__NetBSD__) || defined(__OpenBSD__) || \
|
||||
defined(__DragonFly__) || defined(__sun) || defined(__GNU__)
|
||||
#define xf86StdAccResFromOS xf86AccResFromOS
|
||||
#endif
|
||||
|
||||
resPtr
|
||||
xf86StdAccResFromOS(resPtr ret)
|
||||
{
|
||||
resRange range;
|
||||
|
||||
/*
|
||||
* Fallback is to claim the following areas:
|
||||
*
|
||||
* 0x00000000 - 0x0009ffff low 640k host memory
|
||||
* 0x000c0000 - 0x000effff location of VGA and other extensions ROMS
|
||||
* 0x000f0000 - 0x000fffff system BIOS
|
||||
* 0x00100000 - 0x3fffffff low 1G - 1MB host memory
|
||||
* 0xfec00000 - 0xfecfffff default I/O APIC config space
|
||||
* 0xfee00000 - 0xfeefffff default Local APIC config space
|
||||
* 0xffe00000 - 0xffffffff high BIOS area (should this be included?)
|
||||
*
|
||||
* reference: Intel 440BX AGP specs
|
||||
*
|
||||
* The two APIC spaces appear to be BX-specific and should be dealt with
|
||||
* elsewhere.
|
||||
*/
|
||||
|
||||
/* Fallback is to claim 0x0 - 0x9ffff and 0x100000 - 0x7fffffff */
|
||||
RANGE(range, 0x00000000, 0x0009ffff, ResExcMemBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
RANGE(range, 0x000c0000, 0x000effff, ResExcMemBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
RANGE(range, 0x000f0000, 0x000fffff, ResExcMemBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
#if 0
|
||||
RANGE(range, 0xfec00000, 0xfecfffff, ResExcMemBlock | ResBios);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
RANGE(range, 0xfee00000, 0xfeefffff, ResExcMemBlock | ResBios);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
/* airlied - remove BIOS range it shouldn't be here
|
||||
this should use E820 - or THE OS */
|
||||
RANGE(range, 0xffe00000, 0xffffffff, ResExcMemBlock | ResBios);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
#endif
|
||||
/*
|
||||
* Fallback would be to claim well known ports in the 0x0 - 0x3ff range
|
||||
* along with their sparse I/O aliases, but that's too imprecise. Instead
|
||||
* claim a bare minimum here.
|
||||
*/
|
||||
RANGE(range, 0x00000000, 0x000000ff, ResExcIoBlock); /* For mainboard */
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
|
||||
/*
|
||||
* At minimum, the top and bottom resources must be claimed, so that
|
||||
* resources that are (or appear to be) unallocated can be relocated.
|
||||
*/
|
||||
/* RANGE(range, 0x00000000, 0x00000000, ResExcMemBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
RANGE(range, 0xffffffff, 0xffffffff, ResExcMemBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
RANGE(range, 0x00000000, 0x00000000, ResExcIoBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1); */
|
||||
RANGE(range, 0x0000ffff, 0x0000ffff, ResExcIoBlock);
|
||||
ret = xf86AddResToList(ret, &range, -1);
|
||||
|
||||
/* XXX add others */
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -22,7 +22,6 @@ libsolaris_la_SOURCES = sun_init.c \
|
|||
$(srcdir)/../shared/kmod_noop.c \
|
||||
$(srcdir)/../shared/posix_tty.c \
|
||||
$(srcdir)/../shared/sigio.c \
|
||||
$(srcdir)/../shared/stdResource.c \
|
||||
$(srcdir)/../shared/vidmem.c \
|
||||
$(VTSW_SRC)
|
||||
nodist_libsolaris_la_SOURCES = $(SOLARIS_INOUT_SRC)
|
||||
|
|
|
|||
|
|
@ -210,15 +210,6 @@ extern _X_EXPORT int xf86ProcessArgument(int, char **, int);
|
|||
extern _X_EXPORT void xf86UseMsg(void);
|
||||
extern _X_EXPORT PMClose xf86OSPMOpen(void);
|
||||
|
||||
#ifdef NEED_OS_RAC_PROTOS
|
||||
/* RAC-related privs */
|
||||
/* internal to os-support layer */
|
||||
extern _X_EXPORT resPtr xf86StdAccResFromOS(resPtr ret);
|
||||
|
||||
/* available to the common layer */
|
||||
extern _X_EXPORT resPtr xf86AccResFromOS(resPtr ret);
|
||||
#endif /* NEED_OS_RAC_PROTOS */
|
||||
|
||||
extern _X_EXPORT void xf86MakeNewMapping(int, int, unsigned long, unsigned long, pointer);
|
||||
extern _X_EXPORT void xf86InitVidMem(void);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue