fix max clock unit
max clock from EDID data is in MHz, while we need KHz to validate modes.
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@ -1362,8 +1362,8 @@ xf86ProbeOutputModes (ScrnInfoPtr scrn, int maxX, int maxY)
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if (sync_source == sync_default)
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sync_source = sync_edid;
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}
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if (ranges->max_clock > max_clock)
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max_clock = ranges->max_clock;
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if (ranges->max_clock * 1000 > max_clock)
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max_clock = ranges->max_clock * 1000;
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}
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}
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}
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