xfree86: nds32: add nds32 support for compiler related mmio codes
Add nds32 support for compiler related mmio codes. It includes byte-swap or non-swap operations. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Acked-by: Tiago Vignatti <tiago.vignatti@nokia.com> Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Macpaul Lin
Keith Packard
parent
28e6de66b4
commit
58bd317e29
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@ -1018,6 +1018,355 @@ xf_outl(unsigned short port, unsigned int val)
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#define outw xf_outw
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#define outl xf_outl
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# elif defined(__nds32__)
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/*
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* Assume all port access are aligned. We need to revise this implementation
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* if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
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* stw_u, they are assumed unaligned.
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*/
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#define barrier() /* no barrier */
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#define PORT_SIZE long
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static __inline__ unsigned char
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xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
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{
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return *(volatile unsigned char *)((unsigned char *)base + offset) ;
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}
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static __inline__ void
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xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned char *)((unsigned char *)base + offset) = val ;
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barrier();
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}
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static __inline__ void
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xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned char *)((unsigned char *)base + offset) = val ;
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}
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static __inline__ unsigned short
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xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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unsigned short ret;
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__asm__ __volatile__(
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"lhi %0, [%1];\n\t"
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"wsbh %0, %0;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ unsigned short
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xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
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{
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return *(volatile unsigned short *)((char *)base + offset) ;
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}
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static __inline__ void
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xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"shi %0, [%1];\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned short *)((unsigned char *)base + offset) = val ;
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barrier();
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}
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static __inline__ void
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xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"shi %0, [%1];\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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static __inline__ void
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xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned short *)((unsigned char *)base + offset) = val ;
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}
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static __inline__ unsigned int
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xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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unsigned int ret;
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__asm__ __volatile__(
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"lwi %0, [%1];\n\t"
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ unsigned int
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xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
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{
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return *(volatile unsigned int *)((unsigned char *)base + offset) ;
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}
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static __inline__ void
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xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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"swi %0, [%1];\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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barrier();
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}
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static __inline__ void
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xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned int *)((unsigned char *)base + offset) = val ;
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barrier();
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}
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static __inline__ void
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xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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unsigned long addr = ((unsigned long)base) + offset;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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"swi %0, [%1];\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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static __inline__ void
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xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,
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const unsigned int val)
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{
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*(volatile unsigned int *)((unsigned char *)base + offset) = val ;
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}
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# if defined(NDS32_MMIO_SWAP)
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static __inline__ void
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outb(unsigned PORT_SIZE port, unsigned char val)
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{
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xf86WriteMmio8(IOPortBase, port, val);
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}
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static __inline__ void
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outw(unsigned PORT_SIZE port, unsigned short val)
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{
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xf86WriteMmio16Swap(IOPortBase, port, val);
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}
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static __inline__ void
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outl(unsigned PORT_SIZE port, unsigned int val)
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{
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xf86WriteMmio32Swap(IOPortBase, port, val);
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}
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static __inline__ unsigned int
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inb(unsigned PORT_SIZE port)
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{
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return xf86ReadMmio8(IOPortBase, port);
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}
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static __inline__ unsigned int
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inw(unsigned PORT_SIZE port)
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{
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return xf86ReadMmio16Swap(IOPortBase, port);
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}
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static __inline__ unsigned int
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inl(unsigned PORT_SIZE port)
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{
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return xf86ReadMmio32Swap(IOPortBase, port);
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}
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static __inline__ unsigned long ldq_u(unsigned long *p)
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{
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unsigned long addr = (unsigned long)p;
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unsigned int ret;
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__asm__ __volatile__(
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"lmw.bi %0, [%1], %0, 0;\n\t"
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ unsigned long ldl_u(unsigned int *p)
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{
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unsigned long addr = (unsigned long)p;
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unsigned int ret;
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__asm__ __volatile__(
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"lmw.bi %0, [%1], %0, 0;\n\t"
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ void stq_u(unsigned long val, unsigned long *p)
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{
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unsigned long addr = (unsigned long)p;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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"smw.bi %0, [%1], %0, 0;\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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static __inline__ void stl_u(unsigned long val, unsigned int *p)
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{
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unsigned long addr = (unsigned long)p;
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__asm__ __volatile__(
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"wsbh %0, %0;\n\t"
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"rotri %0, %0, 16;\n\t"
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"smw.bi %0, [%1], %0, 0;\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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# else /* !NDS32_MMIO_SWAP */
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static __inline__ void
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outb(unsigned PORT_SIZE port, unsigned char val)
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{
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*(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val;
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barrier();
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}
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static __inline__ void
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outw(unsigned PORT_SIZE port, unsigned short val)
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{
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*(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val;
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barrier();
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}
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static __inline__ void
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outl(unsigned PORT_SIZE port, unsigned int val)
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{
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*(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val;
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barrier();
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}
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static __inline__ unsigned int
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inb(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port)));
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}
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static __inline__ unsigned int
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inw(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port)));
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}
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static __inline__ unsigned int
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inl(unsigned PORT_SIZE port)
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{
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return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port)));
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}
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static __inline__ unsigned long ldq_u(unsigned long *p)
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{
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unsigned long addr = (unsigned long)p;
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unsigned int ret;
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__asm__ __volatile__(
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"lmw.bi %0, [%1], %0, 0;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ unsigned long ldl_u(unsigned int *p)
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{
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unsigned long addr = (unsigned long)p;
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unsigned int ret;
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__asm__ __volatile__(
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"lmw.bi %0, [%1], %0, 0;\n\t"
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: "=r" (ret)
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: "r" (addr));
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return ret;
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}
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static __inline__ void stq_u(unsigned long val, unsigned long *p)
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{
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unsigned long addr = (unsigned long)p;
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__asm__ __volatile__(
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"smw.bi %0, [%1], %0, 0;\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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static __inline__ void stl_u(unsigned long val, unsigned int *p)
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{
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unsigned long addr = (unsigned long)p;
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__asm__ __volatile__(
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"smw.bi %0, [%1], %0, 0;\n\t"
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: /* No outputs */
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: "r" (val), "r" (addr));
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}
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# endif /* NDS32_MMIO_SWAP */
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# if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
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# define ldw_u(p) ((*(unsigned char *)(p)) << 8 | \
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(*((unsigned char *)(p)+1)))
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# define stw_u(v,p) (*(unsigned char *)(p)) = ((v) >> 8); \
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(*((unsigned char *)(p)+1)) = (v)
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# else
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# define ldw_u(p) ((*(unsigned char *)(p)) | \
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(*((unsigned char *)(p)+1)<<8))
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# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
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(*((unsigned char *)(p)+1)) = ((v) >> 8)
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# endif
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# define mem_barrier() /* XXX: nop for now */
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# define write_mem_barrier() /* XXX: nop for now */
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# else /* ix86 */
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# if !defined(__SUNPRO_C)
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@ -1338,6 +1687,67 @@ extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
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# define MMIO_MOVE32(base, offset, val) \
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xf86WriteMmio32Be(base, offset, (CARD32)(val))
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# elif defined(__nds32__)
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/*
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* we provide byteswapping and no byteswapping functions here
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* with no byteswapping as default; when endianness of CPU core
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* and I/O devices don't match, byte swapping is necessary
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* drivers that need byteswapping should define NDS32_MMIO_SWAP
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*/
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# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
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# define MMIO_OUT8(base, offset, val) \
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xf86WriteMmio8(base, offset, (CARD8)(val))
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# define MMIO_ONB8(base, offset, val) \
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xf86WriteMmioNB8(base, offset, (CARD8)(val))
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# if defined(NDS32_MMIO_SWAP) /* byteswapping */
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# define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
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# define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
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# define MMIO_OUT16(base, offset, val) \
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xf86WriteMmio16Swap(base, offset, (CARD16)(val))
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# define MMIO_OUT32(base, offset, val) \
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xf86WriteMmio32Swap(base, offset, (CARD32)(val))
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# define MMIO_ONB16(base, offset, val) \
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xf86WriteMmioNB16Swap(base, offset, (CARD16)(val))
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# define MMIO_ONB32(base, offset, val) \
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xf86WriteMmioNB32Swap(base, offset, (CARD32)(val))
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# else /* no byteswapping is the default */
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# define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
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# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
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# define MMIO_OUT16(base, offset, val) \
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xf86WriteMmio16(base, offset, (CARD16)(val))
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# define MMIO_OUT32(base, offset, val) \
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xf86WriteMmio32(base, offset, (CARD32)(val))
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# define MMIO_ONB16(base, offset, val) \
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xf86WriteMmioNB16(base, offset, (CARD16)(val))
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# define MMIO_ONB32(base, offset, val) \
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xf86WriteMmioNB32(base, offset, (CARD32)(val))
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# endif
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# define MMIO_MOVE32(base, offset, val) \
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xf86WriteMmio32(base, offset, (CARD32)(val))
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#ifdef N1213_HC /* for NDS32 N1213 hardcore */
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static __inline__ void nds32_flush_icache(char *addr)
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{
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__asm__ volatile (
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"isync %0;"
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"msync;"
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"isb;"
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"cctl %0,L1I_VA_INVAL;"
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"isb;"
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: : "r"(addr) : "memory");
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}
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#else
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static __inline__ void nds32_flush_icache(char *addr)
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{
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__asm__ volatile (
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"isync %0;"
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"isb;"
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: : "r"(addr) : "memory");
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}
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#endif
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# else /* !__alpha__ && !__powerpc__ && !__sparc__ */
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# define MMIO_IN8(base, offset) \
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