Bug #12439: add a quirk to use +hsync +vsync for the probed detailed mode.
Samsung 205BW quirk is somehow reworked.
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@ -66,6 +66,8 @@ typedef enum {
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DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE = 1 << 5,
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/* Monitor forgot to set the first detailed is preferred bit. */
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DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6,
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/* use +hsync +vsync for detailed mode */
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DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7,
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} ddc_quirk_t;
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static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC)
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@ -160,6 +162,15 @@ static Bool quirk_first_detailed_preferred (int scrnIndex, xf86MonPtr DDC)
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return FALSE;
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}
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static Bool quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC)
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{
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/* Bug #12439: Samsung SyncMaster 205BW */
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if (memcmp (DDC->vendor.name, "SAM", 4) == 0 &&
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DDC->vendor.prod_id == 541)
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return TRUE;
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return FALSE;
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}
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typedef struct {
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Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
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ddc_quirk_t quirk;
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@ -195,6 +206,10 @@ static const ddc_quirk_map_t ddc_quirks[] = {
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quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED,
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"First detailed timing was not marked as preferred."
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},
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{
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quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP,
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"Use +hsync +vsync for detailed timing."
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},
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{
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NULL, DDC_QUIRK_NONE,
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"No known quirks"
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@ -341,15 +356,19 @@ DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
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if (timing->interlaced)
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Mode->Flags |= V_INTERLACE;
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if (timing->misc & 0x02)
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Mode->Flags |= V_PVSYNC;
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else
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Mode->Flags |= V_NVSYNC;
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if (quirks & DDC_QUIRK_DETAILED_SYNC_PP)
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Mode->Flags |= V_PVSYNC | V_PHSYNC;
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else {
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if (timing->misc & 0x02)
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Mode->Flags |= V_PVSYNC;
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else
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Mode->Flags |= V_NVSYNC;
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if (timing->misc & 0x01)
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Mode->Flags |= V_PHSYNC;
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else
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Mode->Flags |= V_NHSYNC;
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if (timing->misc & 0x01)
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Mode->Flags |= V_PHSYNC;
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else
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Mode->Flags |= V_NHSYNC;
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}
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return Mode;
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}
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