andreacavalli/xserver-multidpi
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Merge branch 'pci-rework'

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This commit is contained in:
Ian Romanick 2007-08-24 15:04:21 -07:00
commit 91f358336f
61 changed files with 1405 additions and 7710 deletions
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8
configure.ac
View File

@ -1306,6 +1306,10 @@ dnl has it in libc), or if libdl is needed to get it.
AC_CHECK_FUNC([dlopen], [],
AC_CHECK_LIB([dl], [dlopen], XORG_LIBS="$XORG_LIBS -ldl"))
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
XSERVER_LIBS="$XSERVER_LIBS $PCIACCESS_LIBS"
XORG_CFLAGS="$XORG_CFLAGS $PCIACCESS_CFLAGS"
case $host_os in
darwin*)
XORG_OS="Darwin"
@ -1561,7 +1565,6 @@ return 0;}
AC_SUBST([XORG_OS])
AC_SUBST([XORG_OS_SUBDIR])
dnl only used in hw/xfree86/scanpci, TTBOMK
AC_PATH_PROG(PERL, perl, no)
dnl unlikely as this may be ...
if test "x$PERL" = xno; then
@ -2075,7 +2078,6 @@ hw/xfree86/os-support/usl/Makefile
hw/xfree86/parser/Makefile
hw/xfree86/rac/Makefile
hw/xfree86/ramdac/Makefile
hw/xfree86/scanpci/Makefile
hw/xfree86/shadowfb/Makefile
hw/xfree86/vbe/Makefile
hw/xfree86/vgahw/Makefile
@ -2090,8 +2092,6 @@ hw/xfree86/utils/cvt/Makefile
hw/xfree86/utils/gtf/Makefile
hw/xfree86/utils/ioport/Makefile
hw/xfree86/utils/kbd_mode/Makefile
hw/xfree86/utils/pcitweak/Makefile
hw/xfree86/utils/scanpci/Makefile
hw/xfree86/utils/xorgcfg/Makefile
hw/xfree86/utils/xorgconfig/Makefile
hw/dmx/config/Makefile

4
hw/xfree86/Makefile.am
View File

@ -20,12 +20,12 @@ DOC_SUBDIR = doc
SUBDIRS = common ddc dummylib i2c x86emu int10 fbdevhw os-support parser rac \
ramdac shadowfb vbe vgahw xaa $(MFB_SUBDIR) $(CFB_SUBDIR) \
loader scanpci dixmods exa modes \
loader dixmods exa modes \
$(DRI_SUBDIR) $(XF86UTILS_SUBDIR) $(DOC_SUBDIR)
DIST_SUBDIRS = common ddc dummylib i2c x86emu int10 fbdevhw os-support \
parser rac ramdac shadowfb vbe vgahw xaa xf1bpp xf4bpp \
xf8_16bpp xf8_32bpp loader scanpci dixmods dri exa modes \
xf8_16bpp xf8_32bpp loader dixmods dri exa modes \
utils doc
bin_PROGRAMS = Xorg

2
hw/xfree86/common/Makefile.am
View File

@ -44,7 +44,7 @@ libinit_a_SOURCES = xf86Build.h xf86Init.c
INCLUDES = $(XORG_INCS) -I$(srcdir)/../ddc -I$(srcdir)/../i2c \
-I$(srcdir)/../loader -I$(srcdir)/../rac -I$(srcdir)/../parser \
-I$(srcdir)/../scanpci -I$(srcdir)/../vbe -I$(srcdir)/../int10 \
-I$(srcdir)/../vbe -I$(srcdir)/../int10 \
-I$(srcdir)/../vgahw -I$(srcdir)/../dixmods/extmod
sdk_HEADERS = compiler.h fourcc.h xf86.h xf86Module.h xf86Opt.h \

27
hw/xfree86/common/xf86.h
View File

@ -42,6 +42,8 @@
#include <dix-config.h>
#endif
#include <pciaccess.h>
#include "xf86str.h"
#include "xf86Opt.h"
#include <X11/Xfuncproto.h>
@ -90,16 +92,13 @@ extern Bool xf86inSuspend;
/* xf86Bus.c */
Bool xf86CheckPciSlot(int bus, int device, int func);
int xf86ClaimPciSlot(int bus, int device, int func, DriverPtr drvp,
Bool xf86CheckPciSlot( const struct pci_device * );
int xf86ClaimPciSlot( struct pci_device *, DriverPtr drvp,
int chipset, GDevPtr dev, Bool active);
Bool xf86ParsePciBusString(const char *busID, int *bus, int *device,
int *func);
Bool xf86ComparePciBusString(const char *busID, int bus, int device, int func);
void xf86FormatPciBusNumber(int busnum, char *buffer);
pciVideoPtr *xf86GetPciVideoInfo(void);
pciConfigPtr *xf86GetPciConfigInfo(void);
void xf86SetPciVideo(pciVideoPtr, resType);
void xf86PrintResList(int verb, resPtr list);
resPtr xf86AddRangesToList(resPtr list, resRange *pRange, int entityIndex);
int xf86ClaimIsaSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active);
@ -110,7 +109,7 @@ int xf86ClaimFbSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active);
int xf86ClaimNoSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active);
void xf86EnableAccess(ScrnInfoPtr pScrn);
void xf86SetCurrentAccess(Bool Enable, ScrnInfoPtr pScrn);
Bool xf86IsPrimaryPci(pciVideoPtr pPci);
Bool xf86IsPrimaryPci(struct pci_device * pPci);
Bool xf86IsPrimaryIsa(void);
/* new RAC */
resPtr xf86AddResToList(resPtr rlist, resRange *Range, int entityIndex);
@ -126,19 +125,16 @@ int xf86GetNumEntityInstances(int entityIndex);
GDevPtr xf86GetDevFromEntity(int entityIndex, int instance);
void xf86RemoveEntityFromScreen(ScrnInfoPtr pScrn, int entityIndex);
EntityInfoPtr xf86GetEntityInfo(int entityIndex);
pciVideoPtr xf86GetPciInfoForEntity(int entityIndex);
int xf86GetPciEntity(int bus, int dev, int func);
struct pci_device * xf86GetPciInfoForEntity(int entityIndex);
Bool xf86SetEntityFuncs(int entityIndex, EntityProc init,
EntityProc enter, EntityProc leave, pointer);
void xf86DeallocateResourcesForEntity(int entityIndex, unsigned long type);
resPtr xf86RegisterResources(int entityIndex, resList list,
unsigned long Access);
Bool xf86CheckPciMemBase(pciVideoPtr pPci, memType base);
Bool xf86CheckPciMemBase(struct pci_device * pPci, memType base);
void xf86SetAccessFuncs(EntityInfoPtr pEnt, xf86SetAccessFuncPtr funcs,
xf86SetAccessFuncPtr oldFuncs);
Bool xf86IsEntityPrimary(int entityIndex);
Bool xf86FixPciResource(int entityIndex, int prt, memType alignment,
unsigned long type);
resPtr xf86ReallocatePciResources(int entityIndex, resPtr pRes);
resPtr xf86SetOperatingState(resList list, int entityIndex, int mask);
void xf86EnterServerState(xf86State state);
@ -149,14 +145,9 @@ resRange xf86GetSparse(unsigned long type, memType fixed_bits,
memType decode_mask, memType address_mask,
resPtr avoid);
memType xf86ChkConflict(resRange *rgp, int entityIndex);
Bool xf86IsPciDevPresent(int bus, int dev, int func);
ScrnInfoPtr xf86FindScreenForEntity(int entityIndex);
Bool xf86NoSharedResources(int screenIndex, resType res);
resPtr xf86FindIntersectOfLists(resPtr l1, resPtr l2);
pciVideoPtr xf86FindPciDeviceVendor(CARD16 vendorID, CARD16 deviceID,
char n, pciVideoPtr pvp_exclude);
pciVideoPtr xf86FindPciClass(CARD8 intf, CARD8 subClass, CARD16 class,
char n, pciVideoPtr pvp_exclude);
void xf86RegisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func, pointer arg);
Bool xf86DeregisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func);
@ -175,8 +166,8 @@ DevUnion *xf86GetEntityPrivate(int entityIndex, int privIndex);
/* xf86Configure.c */
GDevPtr xf86AddBusDeviceToConfigure(const char *driver, BusType bus,
void *busData, int chipset);
GDevPtr xf86AddDeviceToConfigure(const char *driver, pciVideoPtr pVideo,
int chipset);
GDevPtr xf86AddDeviceToConfigure( const char *driver,
struct pci_device * pVideo, int chipset );
/* xf86Cursor.c */

35
hw/xfree86/common/xf86AutoConfig.c
View File

@ -155,7 +155,7 @@ AppendToConfig(const char *s)
}
static const char *
videoPtrToDriverName(pciVideoPtr info)
videoPtrToDriverName(struct pci_device *dev)
{
/*
* things not handled yet:
@ -163,7 +163,7 @@ videoPtrToDriverName(pciVideoPtr info)
* xgi
*/
switch (info->vendor)
switch (dev->vendor_id)
{
case 0x1142: return "apm";
case 0xedd8: return "ark";
@ -172,7 +172,7 @@ videoPtrToDriverName(pciVideoPtr info)
case 0x102c: return "chips";
case 0x1013: return "cirrus";
case 0x8086:
if ((info->chipType == 0x00d1) || (info->chipType == 0x7800))
if ((dev->device_id == 0x00d1) || (dev->device_id == 0x7800))
return "i740";
else return "i810";
case 0x102b: return "mga";
@ -181,7 +181,7 @@ videoPtrToDriverName(pciVideoPtr info)
case 0x10de: case 0x12d2: return "nv";
case 0x1163: return "rendition";
case 0x5333:
switch (info->chipType)
switch (dev->device_id)
{
case 0x88d0: case 0x88d1: case 0x88f0: case 0x8811:
case 0x8812: case 0x8814: case 0x8901:
@ -195,7 +195,7 @@ videoPtrToDriverName(pciVideoPtr info)
case 0x1039: return "sis";
case 0x126f: return "siliconmotion";
case 0x121a:
if (info->chipType < 0x0003)
if (dev->device_id < 0x0003)
return "voodoo";
else
return "tdfx";
@ -214,22 +214,23 @@ xf86AutoConfig(void)
{
const char **p;
char buf[1024];
pciVideoPtr *pciptr, info = NULL;
char *driver = NULL;
struct pci_device_iterator *iter;
struct pci_device * info = NULL;
const char *driver = NULL;
ConfigStatus ret;
/* Find the primary device, and get some information about it. */
if (xf86PciVideoInfo) {
for (pciptr = xf86PciVideoInfo; (info = *pciptr); pciptr++) {
if (xf86IsPrimaryPci(info)) {
break;
}
iter = pci_slot_match_iterator_create(NULL);
while ((info = pci_device_next(iter)) != NULL) {
if (xf86IsPrimaryPci(info)) {
break;
}
if (!info) {
ErrorF("Primary device is not PCI\n");
}
} else {
ErrorF("xf86PciVideoInfo is not set\n");
}
pci_iterator_destroy(iter);
if (!info) {
ErrorF("Primary device is not PCI\n");
}
if (info)

77
hw/xfree86/common/xf86Bus.c
View File

@ -52,6 +52,7 @@
#include "xf86_OSproc.h"
#include "xf86RAC.h"
#include "Pci.h"
/* Entity data */
EntityPtr *xf86Entities = NULL; /* Bus slots claimed by drivers */
@ -253,9 +254,7 @@ xf86IsEntityPrimary(int entityIndex)
switch (pEnt->busType) {
case BUS_PCI:
return (pEnt->pciBusId.bus == primaryBus.id.pci.bus &&
pEnt->pciBusId.device == primaryBus.id.pci.device &&
pEnt->pciBusId.func == primaryBus.id.pci.func);
return (pEnt->bus.id.pci == primaryBus.id.pci);
case BUS_ISA:
return TRUE;
case BUS_SBUS:
@ -1361,7 +1360,9 @@ xf86AddRangesToList(resPtr list, resRange *pRange, int entityIndex)
void
xf86ResourceBrokerInit(void)
{
#if 0
resPtr resPci;
#endif
osRes = NULL;
@ -1376,8 +1377,12 @@ xf86ResourceBrokerInit(void)
xf86PrintResList(3, osRes);
/* Bus dep initialization */
#if 0
resPci = ResourceBrokerInitPci(&osRes);
Acc = xf86JoinResLists(xf86DupResList(osRes), resPci);
#else
Acc = xf86DupResList( osRes );
#endif
xf86MsgVerb(X_INFO, 3, "All system resource ranges:\n");
xf86PrintResList(3, Acc);
@ -1765,7 +1770,7 @@ xf86GetResourcesImplicitly(int entityIndex)
case BUS_SBUS:
return NULL;
case BUS_PCI:
return GetImplicitPciResources(entityIndex);
return NULL;
case BUS_last:
return NULL;
}
@ -1856,31 +1861,34 @@ xf86RegisterResources(int entityIndex, resList list, unsigned long access)
}
static void
busTypeSpecific(EntityPtr pEnt, xf86State state, xf86AccessPtr *acc_mem,
busTypeSpecific(EntityPtr pEnt, xf86AccessPtr *acc_mem,
xf86AccessPtr *acc_io, xf86AccessPtr *acc_mem_io)
{
pciAccPtr *ppaccp;
switch (pEnt->bus.type) {
case BUS_ISA:
case BUS_SBUS:
*acc_mem = *acc_io = *acc_mem_io = &AccessNULL;
break;
*acc_mem = *acc_io = *acc_mem_io = &AccessNULL;
break;
case BUS_PCI:
ppaccp = xf86PciAccInfo;
while (*ppaccp) {
if ((*ppaccp)->busnum == pEnt->pciBusId.bus
&& (*ppaccp)->devnum == pEnt->pciBusId.device
&& (*ppaccp)->funcnum == pEnt->pciBusId.func) {
*acc_io = &(*ppaccp)->ioAccess;
*acc_mem = &(*ppaccp)->memAccess;
*acc_mem_io = &(*ppaccp)->io_memAccess;
break;
}
ppaccp++;
case BUS_PCI: {
struct pci_device *const dev = pEnt->bus.id.pci;
if ((dev != NULL) && ((void *)dev->user_data != NULL)) {
pciAccPtr const paccp = (pciAccPtr) dev->user_data;
*acc_io = & paccp->ioAccess;
*acc_mem = & paccp->memAccess;
*acc_mem_io = & paccp->io_memAccess;
}
else {
/* FIXME: This is an error path. We should probably have an
* FIXME: assertion here or something.
*/
*acc_io = NULL;
*acc_mem = NULL;
*acc_mem_io = NULL;
}
break;
}
default:
*acc_mem = *acc_io = *acc_mem_io = NULL;
break;
@ -1896,7 +1904,7 @@ setAccess(EntityPtr pEnt, xf86State state)
xf86AccessPtr org_mem = NULL, org_io = NULL, org_mem_io = NULL;
int prop;
busTypeSpecific(pEnt,state,&acc_mem,&acc_io,&acc_mem_io);
busTypeSpecific(pEnt, &acc_mem, &acc_io, &acc_mem_io);
/* The replacement function needs to handle _all_ shared resources */
/* unless they are handeled locally and disabled otherwise */
@ -2449,15 +2457,6 @@ xf86PostProbe(void)
#endif
}
xf86FreeResList(acc);
#if !(defined(__alpha__) && defined(linux)) && \
!(defined(__ia64__) && defined(linux)) && \
!(defined(__sparc64__) && defined(__OpenBSD__))
/*
* No need to validate on Alpha Linux or OpenBSD/sparc64,
* trust the kernel.
*/
ValidatePci();
#endif
xf86MsgVerb(X_INFO, 3, "resource ranges after probing:\n");
xf86PrintResList(3, Acc);
@ -2976,14 +2975,16 @@ xf86FindPrimaryDevice()
CheckGenericGA();
if (primaryBus.type != BUS_NONE) {
char *bus;
char *loc = xnfcalloc(1,9);
if (loc == NULL) return;
char loc[16];
switch (primaryBus.type) {
case BUS_PCI:
bus = "PCI";
sprintf(loc," %2.2x:%2.2x:%1.1x",primaryBus.id.pci.bus,
primaryBus.id.pci.device,primaryBus.id.pci.func);
snprintf(loc, sizeof(loc), " %2.2x@%2.2x:%2.2x:%1.1x",
primaryBus.id.pci->bus,
primaryBus.id.pci->domain,
primaryBus.id.pci->dev,
primaryBus.id.pci->func);
break;
case BUS_ISA:
bus = "ISA";
@ -2991,17 +2992,15 @@ xf86FindPrimaryDevice()
break;
case BUS_SBUS:
bus = "SBUS";
sprintf(loc," %2.2x",primaryBus.id.sbus.fbNum);
snprintf(loc, sizeof(loc), " %2.2x", primaryBus.id.sbus.fbNum);
break;
default:
bus = "";
loc[0] = '\0';
}
xf86MsgVerb(X_INFO, 2, "Primary Device is: %s%s\n",bus,loc);
xfree(loc);
}
}
#if !defined(__sparc) && !defined(__sparc__) && !defined(__powerpc__) && !defined(__mips__) && !defined(__arm__)

3
hw/xfree86/common/xf86Bus.h
View File

@ -91,7 +91,6 @@ typedef struct {
#define NEED_SHARED (NEED_MEM_SHARED | NEED_IO_SHARED)
#define busType bus.type
#define pciBusId bus.id.pci
#define isaBusId bus.id.isa
#define sbusBusId bus.id.sbus
@ -114,7 +113,7 @@ typedef struct x_BusAccRec {
struct {
int bus;
int primary_bus;
PCITAG acc;
struct pci_device * dev;
pciBridgesSave save;
} pci;
} busdep;

6
hw/xfree86/common/xf86Config.c
View File

@ -60,6 +60,7 @@
#include "configProcs.h"
#include "globals.h"
#include "extension.h"
#include "Pci.h"
#ifdef XINPUT
#include "xf86Xinput.h"
@ -2541,8 +2542,9 @@ xf86HandleConfigFile(Bool autoconfig)
xf86Msg(X_WARNING, "Bus types other than PCI not yet isolable.\n"
"\tIgnoring IsolateDevice option.\n");
} else if (sscanf(scanptr, "PCI:%d:%d:%d", &bus, &device, &func) == 3) {
xf86IsolateDevice.bus = bus;
xf86IsolateDevice.device = device;
xf86IsolateDevice.domain = PCI_DOM_FROM_BUS(bus);
xf86IsolateDevice.bus = PCI_BUS_NO_DOMAIN(bus);
xf86IsolateDevice.dev = device;
xf86IsolateDevice.func = func;
xf86Msg(X_INFO,
"Isolating PCI bus \"%d:%d:%d\"\n", bus, device, func);

52
hw/xfree86/common/xf86Configure.c
View File

@ -35,13 +35,14 @@
#include <fcntl.h>
#include <X11/X.h>
#include <X11/Xmd.h>
#include <pciaccess.h>
#include "Pci.h"
#include "os.h"
#include "loaderProcs.h"
#include "xf86.h"
#include "xf86Config.h"
#include "xf86_OSlib.h"
#include "xf86Priv.h"
#include "xf86PciData.h"
#define IN_XSERVER
#include "xf86Parser.h"
#include "xf86tokens.h"
@ -56,7 +57,7 @@
typedef struct _DevToConfig {
GDevRec GDev;
pciVideoPtr pVideo;
struct pci_device * pVideo;
#if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)
sbusDevicePtr sVideo;
#endif
@ -101,7 +102,7 @@ GDevPtr
xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int chipset)
{
int i, j;
pciVideoPtr pVideo = NULL;
struct pci_device * pVideo = NULL;
Bool isPrimary = FALSE;
if (xf86DoProbe || !xf86DoConfigure || !xf86DoConfigurePass1)
@ -110,11 +111,12 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
/* Check for duplicates */
switch (bus) {
case BUS_PCI:
pVideo = (pciVideoPtr) busData;
pVideo = (struct pci_device *) busData;
for (i = 0; i < nDevToConfig; i++)
if (DevToConfig[i].pVideo &&
(DevToConfig[i].pVideo->domain == pVideo->domain) &&
(DevToConfig[i].pVideo->bus == pVideo->bus) &&
(DevToConfig[i].pVideo->device == pVideo->device) &&
(DevToConfig[i].pVideo->dev == pVideo->dev) &&
(DevToConfig[i].pVideo->func == pVideo->func))
return NULL;
isPrimary = xf86IsPrimaryPci(pVideo);
@ -173,9 +175,9 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
char busnum[8];
NewDevice.pVideo = pVideo;
xf86FindPciNamesByDevice(pVideo->vendor, pVideo->chipType,
NOVENDOR, NOSUBSYS,
&VendorName, &CardName, NULL, NULL);
VendorName = pci_device_get_vendor_name( pVideo );
CardName = pci_device_get_device_name( pVideo );
if (!VendorName) {
VendorName = xnfalloc(15);
@ -197,13 +199,13 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
NewDevice.GDev.busID = xnfalloc(16);
xf86FormatPciBusNumber(pVideo->bus, busnum);
sprintf(NewDevice.GDev.busID, "PCI:%s:%d:%d",
busnum, pVideo->device, pVideo->func);
busnum, pVideo->dev, pVideo->func);
NewDevice.GDev.chipID = pVideo->chipType;
NewDevice.GDev.chipRev = pVideo->chipRev;
NewDevice.GDev.chipID = pVideo->device_id;
NewDevice.GDev.chipRev = pVideo->revision;
if (chipset < 0)
chipset = (pVideo->vendor << 16) | pVideo->chipType;
chipset = (pVideo->vendor_id << 16) | pVideo->device_id;
}
break;
case BUS_ISA:
@ -249,7 +251,8 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
* Backwards compatibility
*/
_X_EXPORT GDevPtr
xf86AddDeviceToConfigure(const char *driver, pciVideoPtr pVideo, int chipset)
xf86AddDeviceToConfigure(const char *driver, struct pci_device * pVideo,
int chipset)
{
return xf86AddBusDeviceToConfigure(driver, pVideo ? BUS_PCI : BUS_ISA,
pVideo, chipset);
@ -759,22 +762,20 @@ DoConfigure()
/* Call all of the probe functions, reporting the results. */
for (CurrentDriver = 0; CurrentDriver < xf86NumDrivers; CurrentDriver++) {
xorgHWFlags flags;
Bool found_screen;
DriverRec * const drv = xf86DriverList[CurrentDriver];
if (!xorgHWAccess) {
if (!xf86DriverList[CurrentDriver]->driverFunc
|| !xf86DriverList[CurrentDriver]->driverFunc(NULL,
GET_REQUIRED_HW_INTERFACES,
&flags)
if (!drv->driverFunc
|| !drv->driverFunc( NULL, GET_REQUIRED_HW_INTERFACES, &flags )
|| NEED_IO_ENABLED(flags))
continue;
}
if (xf86DriverList[CurrentDriver]->Probe == NULL) continue;
if ((*xf86DriverList[CurrentDriver]->Probe)(
xf86DriverList[CurrentDriver], PROBE_DETECT) &&
xf86DriverList[CurrentDriver]->Identify)
(*xf86DriverList[CurrentDriver]->Identify)(0);
found_screen = xf86CallDriverProbe( drv, TRUE );
if ( found_screen && drv->Identify ) {
(*drv->Identify)(0);
}
}
if (nDevToConfig <= 0) {
@ -860,7 +861,7 @@ DoConfigure()
oldNumScreens = xf86NumScreens;
(*xf86DriverList[i]->Probe)(xf86DriverList[i], 0);
xf86CallDriverProbe( xf86DriverList[i], FALSE );
/* reorder */
k = screennum > 0 ? screennum : 1;
@ -888,7 +889,6 @@ DoConfigure()
}
}
}
xf86SetPciVideo(NULL,NONE);
}
xfree(driverProbed);
}

4
hw/xfree86/common/xf86DoProbe.c
View File

@ -92,9 +92,7 @@ DoProbe()
xf86MsgVerb(X_INFO, 3, "Probing in driver %s\n", drv->driverName);
if (drv->Probe == NULL) continue;
probeResult = (*drv->Probe)( drv, PROBE_DETECT );
probeResult = xf86CallDriverProbe( drv, TRUE );
if (!probeResult) {
xf86ErrorF("Probe in driver `%s' returns FALSE\n",
drv->driverName);

95
hw/xfree86/common/xf86DoScanPci.c
View File

@ -38,20 +38,76 @@
#include <stdlib.h>
#include <X11/X.h>
#include <X11/Xmd.h>
#include <pciaccess.h>
#include "os.h"
#include "loaderProcs.h"
#include "xf86.h"
#include "xf86Priv.h"
#include "xf86Pci.h"
#include "xf86ScanPci.h"
#include "Pci.h"
#include "xf86_OSproc.h"
static void ScanPciDisplayPCICardInfo(void);
void
ScanPciDisplayPCICardInfo(void)
{
struct pci_id_match match;
struct pci_device_iterator *iter;
const struct pci_device *dev;
xf86EnableIO();
if (! xf86scanpci()) {
xf86MsgVerb(X_NONE, 0, "No PCI info available\n");
return;
}
xf86MsgVerb(X_NONE, 0,
"Probing for PCI devices (Bus:Device:Function)\n\n");
iter = pci_id_match_iterator_create(NULL);
while ((dev = pci_device_next(iter)) != NULL) {
const char *svendorname = NULL, *subsysname = NULL;
const char *vendorname = NULL, *devicename = NULL;
xf86MsgVerb(X_NONE, 0, "(%d:%d:%d) ",
PCI_MAKE_BUS(dev->domain, dev->bus), dev->dev, dev->func);
/*
* Lookup as much as we can about the device.
*/
match.vendor_id = dev->vendor_id;
match.device_id = dev->device_id;
match.subvendor_id = (dev->subvendor_id != 0)
? dev->subvendor_id : PCI_MATCH_ANY;
match.subdevice_id = (dev->subdevice_id != 0)
? dev->subdevice_id : PCI_MATCH_ANY;
match.device_class = 0;
match.device_class_mask = 0;
pci_get_strings(& match, & vendorname, & devicename,
& svendorname, & subsysname);
if ((dev->subvendor_id != 0) || (dev->subdevice_id != 0)) {
xf86MsgVerb(X_NONE, 0, "%s %s (0x%04x / 0x%04x) using ",
(svendorname == NULL) ? "unknown vendor" : svendorname,
(subsysname == NULL) ? "unknown card" : subsysname,
dev->subvendor_id, dev->subdevice_id);
}
xf86MsgVerb(X_NONE, 0, "%s %s (0x%04x / 0x%04x)\n",
(vendorname == NULL) ? "unknown vendor" : vendorname,
(devicename == NULL) ? "unknown chip" : devicename,
dev->vendor_id, dev->device_id);
}
pci_iterator_destroy(iter);
}
void DoScanPci(int argc, char **argv, int i)
{
int j,skip,globalVerbose,scanpciVerbose;
ScanPciSetupProcPtr PciSetup;
ScanPciDisplayCardInfoProcPtr DisplayPCICardInfo;
int errmaj, errmin;
int j,skip,globalVerbose;
/*
* first we need to finish setup of the OS so that we can call other
@ -81,32 +137,7 @@ void DoScanPci(int argc, char **argv, int i)
if (xf86Verbose > globalVerbose)
xf86SetVerbosity(globalVerbose);
/*
* Setting scanpciVerbose to 0 will ensure that the output will go to
* stderr for all reasonable default stderr verbosity levels.
*/
scanpciVerbose = 0;
/*
* now get the loader set up and load the scanpci module
*/
/* Initialise the loader */
LoaderInit();
/* Tell the loader the default module search path */
LoaderSetPath(xf86ModulePath);
if (!LoadModule("scanpci", NULL, NULL, NULL, NULL, NULL,
&errmaj, &errmin)) {
LoaderErrorMsg(NULL, "scanpci", errmaj, errmin);
exit(1);
}
PciSetup = (ScanPciSetupProcPtr)LoaderSymbol("ScanPciSetupPciIds");
DisplayPCICardInfo =
(ScanPciDisplayCardInfoProcPtr)LoaderSymbol("ScanPciDisplayPCICardInfo");
if (!(*PciSetup)())
FatalError("ScanPciSetupPciIds() failed\n");
(*DisplayPCICardInfo)(scanpciVerbose);
ScanPciDisplayPCICardInfo();
/*
* That's it; we really should clean things up, but a simple

5
hw/xfree86/common/xf86Globals.c
View File

@ -203,4 +203,7 @@ Bool xf86MiscModInDevAllowNonLocal = FALSE;
RootWinPropPtr *xf86RegisteredPropertiesTable = NULL;
_X_EXPORT Bool xf86inSuspend = FALSE;
Bool xorgHWAccess = FALSE;
PciBusId xf86IsolateDevice;
struct pci_slot_match xf86IsolateDevice = {
PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0
};

91
hw/xfree86/common/xf86Helper.c
View File

@ -39,6 +39,9 @@
#include <xorg-config.h>
#endif
#include <pciaccess.h>
#include "Pci.h"
#include <X11/X.h>
#include "os.h"
#include "servermd.h"
@ -1595,7 +1598,7 @@ xf86MatchDevice(const char *drivername, GDevPtr **sectlist)
}
struct Inst {
pciVideoPtr pci;
struct pci_device * pci;
GDevPtr dev;
Bool foundHW; /* PCIid in list of supported chipsets */
Bool claimed; /* BusID matches with a device section */
@ -1643,7 +1646,8 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
int **foundEntities)
{
int i,j;
pciVideoPtr pPci, *ppPci;
struct pci_device * pPci;
struct pci_device_iterator *iter;
struct Inst *instances = NULL;
int numClaimedInstances = 0;
int allocatedInstances = 0;
@ -1654,8 +1658,6 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
*foundEntities = NULL;
if (!xf86PciVideoInfo)
return 0;
/* Each PCI device will contribute at least one entry. Each device
* section can contribute at most one entry. The sum of the two is
@ -1665,21 +1667,22 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
*/
if ( !xf86DoProbe && !(xf86DoConfigure && xf86DoConfigurePass1) ) {
unsigned max_entries = numDevs;
for (ppPci = xf86PciVideoInfo ; *ppPci != NULL ; ppPci++) {
iter = pci_slot_match_iterator_create(NULL);
while ((pPci = pci_device_next(iter)) != NULL) {
max_entries++;
}
instances = xnfalloc( max_entries * sizeof(struct Inst) );
pci_iterator_destroy(iter);
instances = xnfalloc(max_entries * sizeof(struct Inst));
}
for (ppPci = xf86PciVideoInfo; *ppPci != NULL; ppPci++) {
unsigned device_class = ((*ppPci)->class << 16)
| ((*ppPci)->subclass << 8) | ((*ppPci)->interface);
iter = pci_slot_match_iterator_create(NULL);
while ((pPci = pci_device_next(iter)) != NULL) {
unsigned device_class = pPci->device_class;
Bool foundVendor = FALSE;
pPci = *ppPci;
/* Convert the pre-PCI 2.0 device class for a VGA adapter to the
* 2.0 version of the same class.
*/
@ -1704,19 +1707,21 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
const unsigned device_id = (id->PCIid & 0x0000FFFF);
const unsigned match_class = 0x00030000 | id->PCIid;
if ( (vendor_id == pPci->vendor)
|| ((vendorID == PCI_VENDOR_GENERIC) && (match_class == device_class)) ) {
if ( !foundVendor && (instances != NULL) ) {
if ((vendor_id == pPci->vendor_id)
|| ((vendorID == PCI_VENDOR_GENERIC) && (match_class == device_class))) {
if (!foundVendor && (instances != NULL)) {
++allocatedInstances;
instances[allocatedInstances - 1].pci = *ppPci;
instances[allocatedInstances - 1].pci = pPci;
instances[allocatedInstances - 1].dev = NULL;
instances[allocatedInstances - 1].claimed = FALSE;
instances[allocatedInstances - 1].foundHW = FALSE;
instances[allocatedInstances - 1].screen = 0;
foundVendor = TRUE;
}
if ( (device_id == pPci->chipType)
|| ((vendorID == PCI_VENDOR_GENERIC)
foundVendor = TRUE;
if ( (device_id == pPci->device_id)
|| ((vendorID == PCI_VENDOR_GENERIC)
&& (match_class == device_class)) ) {
if ( instances != NULL ) {
instances[allocatedInstances - 1].foundHW = TRUE;
@ -1725,11 +1730,10 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
if ( xf86DoConfigure && xf86DoConfigurePass1 ) {
if ( xf86CheckPciSlot(pPci->bus, pPci->device,
pPci->func) ) {
GDevPtr pGDev =
xf86AddDeviceToConfigure( drvp->driverName,
pPci, -1 );
if (xf86CheckPciSlot(pPci)) {
GDevPtr pGDev =
xf86AddDeviceToConfigure(drvp->driverName,
pPci, -1);
if (pGDev) {
/* After configure pass 1, chipID and chipRev
* are treated as over-rides, so clobber them
@ -1752,6 +1756,8 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
}
}
pci_iterator_destroy(iter);
/* In "probe only" or "configure" mode (signaled by instances being NULL),
* our work is done. Return the number of detected devices.
@ -1789,8 +1795,9 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
&& *devList[j]->busID) {
for (i = 0; i < allocatedInstances; i++) {
pPci = instances[i].pci;
if (xf86ComparePciBusString(devList[j]->busID, pPci->bus,
pPci->device,
if (xf86ComparePciBusString(devList[j]->busID,
PCI_MAKE_BUS( pPci->domain, pPci->bus ),
pPci->dev,
pPci->func)) {
allocatedInstances++;
instances[allocatedInstances - 1] = instances[i];
@ -1810,9 +1817,10 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
pPci = instances[i].pci;
for (j = 0; j < numDevs; j++) {
if (devList[j]->busID && *devList[j]->busID) {
if (xf86ComparePciBusString(devList[j]->busID, pPci->bus,
pPci->device,
pPci->func) &&
if (xf86ComparePciBusString(devList[j]->busID,
PCI_MAKE_BUS( pPci->domain, pPci->bus ),
pPci->dev,
pPci->func) &&
devList[j]->screen == instances[i].screen) {
if (devBus)
@ -1843,10 +1851,11 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
}
if (devBus) dev = devBus; /* busID preferred */
if (!dev) {
if (xf86CheckPciSlot(pPci->bus, pPci->device, pPci->func)) {
if ( xf86CheckPciSlot( pPci ) ) {
xf86MsgVerb(X_WARNING, 0, "%s: No matching Device section "
"for instance (BusID PCI:%i:%i:%i) found\n",
driverName, pPci->bus, pPci->device, pPci->func);
"for instance (BusID PCI:%u@%u:%u:%u) found\n",
driverName, pPci->domain, pPci->bus, pPci->dev,
pPci->func);
}
} else {
numClaimedInstances++;
@ -1957,31 +1966,27 @@ xf86MatchPciInstances(const char *driverName, int vendorID,
* XXX Need to make sure that two different drivers don't claim
* the same screen > 0 instance.
*/
if (instances[i].screen == 0 &&
!xf86CheckPciSlot(pPci->bus, pPci->device, pPci->func))
if (instances[i].screen == 0 && !xf86CheckPciSlot( pPci ))
continue;
#ifdef DEBUG
ErrorF("%s: card at %d:%d:%d is claimed by a Device section\n",
driverName, pPci->bus, pPci->device, pPci->func);
driverName, pPci->bus, pPci->dev, pPci->func);
#endif
/* Allocate an entry in the lists to be returned */
numFound++;
retEntities = xnfrealloc(retEntities, numFound * sizeof(int));
retEntities[numFound - 1]
= xf86ClaimPciSlot(pPci->bus, pPci->device,
pPci->func,drvp, instances[i].chip,
instances[i].dev,instances[i].dev->active ?
TRUE : FALSE);
retEntities[numFound - 1] = xf86ClaimPciSlot( pPci, drvp,
instances[i].chip,
instances[i].dev,
instances[i].dev->active);
if (retEntities[numFound - 1] == -1 && instances[i].screen > 0) {
for (j = 0; j < xf86NumEntities; j++) {
EntityPtr pEnt = xf86Entities[j];
if (pEnt->busType != BUS_PCI)
if (pEnt->bus.type != BUS_PCI)
continue;
if (pEnt->pciBusId.bus == pPci->bus &&
pEnt->pciBusId.device == pPci->device &&
pEnt->pciBusId.func == pPci->func) {
if (pEnt->bus.id.pci == pPci) {
retEntities[numFound - 1] = j;
xf86AddDevToEntity(j, instances[i].dev);
break;

260
hw/xfree86/common/xf86Init.c
View File

@ -92,6 +92,9 @@
#include "dpmsproc.h"
#endif
#include <pciaccess.h>
#include "Pci.h"
#include "xf86Bus.h"
/* forward declarations */
@ -101,15 +104,14 @@ static void xf86PrintDefaultModulePath(void);
static void xf86PrintDefaultLibraryPath(void);
static void xf86RunVtInit(void);
static Bool probe_devices_from_device_sections(DriverPtr drvp);
static Bool add_matching_devices_to_configure_list(DriverPtr drvp);
static Bool check_for_matching_devices(DriverPtr drvp);
#ifdef XF86PM
void (*xf86OSPMClose)(void) = NULL;
#endif
static char *baseModules[] = {
"pcidata",
NULL
};
/* Common pixmap formats */
static PixmapFormatRec formats[MAXFORMATS] = {
@ -243,6 +245,233 @@ PostConfigInit(void)
OsInitColors();
}
#define END_OF_MATCHES(m) \
(((m).vendor_id == 0) && ((m).device_id == 0) && ((m).subvendor_id == 0))
Bool
probe_devices_from_device_sections(DriverPtr drvp)
{
int i, j;
struct pci_device * pPci;
Bool foundScreen = FALSE;
const struct pci_id_match * const devices = drvp->supported_devices;
GDevPtr *devList;
const unsigned numDevs = xf86MatchDevice(drvp->driverName, & devList);
for ( i = 0 ; i < numDevs ; i++ ) {
struct pci_device_iterator *iter;
unsigned device_id;
/* Find the pciVideoRec associated with this device section.
*/
iter = pci_id_match_iterator_create(NULL);
while ((pPci = pci_device_next(iter)) != NULL) {
if (devList[i]->busID && *devList[i]->busID) {
if (xf86ComparePciBusString(devList[i]->busID,
((pPci->domain << 8)
| pPci->bus),
pPci->dev,
pPci->func)) {
break;
}
}
else if (xf86IsPrimaryPci(pPci)) {
break;
}
}
pci_iterator_destroy(iter);
if (pPci == NULL) {
continue;
}
device_id = (devList[i]->chipID > 0)
? devList[i]->chipID : pPci->device_id;
/* Once the pciVideoRec is found, determine if the device is supported
* by the driver. If it is, probe it!
*/
for ( j = 0 ; ! END_OF_MATCHES( devices[j] ) ; j++ ) {
if ( PCI_ID_COMPARE( devices[j].vendor_id, pPci->vendor_id )
&& PCI_ID_COMPARE( devices[j].device_id, device_id )
&& ((devices[j].device_class_mask & pPci->device_class)
== devices[j].device_class) ) {
int entry;
/* Allow the same entity to be used more than once for
* devices with multiple screens per entity. This assumes
* implicitly that there will be a screen == 0 instance.
*
* FIXME Need to make sure that two different drivers don't
* FIXME claim the same screen > 0 instance.
*/
if ( (devList[i]->screen == 0) && !xf86CheckPciSlot( pPci ) )
continue;
#ifdef DEBUG
ErrorF("%s: card at %d:%d:%d is claimed by a Device section\n",
drvp->driverName, pPci->bus, pPci->device, pPci->func);
#endif
/* Allocate an entry in the lists to be returned */
entry = xf86ClaimPciSlot(pPci, drvp, device_id,
devList[i], devList[i]->active);
if ((entry == -1) && (devList[i]->screen > 0)) {
unsigned k;
for ( k = 0; k < xf86NumEntities; k++ ) {
EntityPtr pEnt = xf86Entities[k];
if (pEnt->busType != BUS_PCI)
continue;
if (pEnt->bus.id.pci == pPci) {
entry = k;
xf86AddDevToEntity(k, devList[i]);
break;
}
}
}
if (entry != -1) {
if ((*drvp->PciProbe)(drvp, entry, pPci,
devices[j].match_data)) {
foundScreen = TRUE;
}
}
break;
}
}
}
return foundScreen;
}
Bool
add_matching_devices_to_configure_list(DriverPtr drvp)
{
const struct pci_id_match * const devices = drvp->supported_devices;
int j;
struct pci_device *pPci;
struct pci_device_iterator *iter;
int numFound = 0;
iter = pci_id_match_iterator_create(NULL);
while ((pPci = pci_device_next(iter)) != NULL) {
/* Determine if this device is supported by the driver. If it is,
* add it to the list of devices to configure.
*/
for (j = 0 ; ! END_OF_MATCHES(devices[j]) ; j++) {
if ( PCI_ID_COMPARE( devices[j].vendor_id, pPci->vendor_id )
&& PCI_ID_COMPARE( devices[j].device_id, pPci->device_id )
&& ((devices[j].device_class_mask & pPci->device_class)
== devices[j].device_class) ) {
if (xf86CheckPciSlot(pPci)) {
GDevPtr pGDev =
xf86AddDeviceToConfigure(drvp->driverName, pPci, -1);
if (pGDev != NULL) {
/* After configure pass 1, chipID and chipRev are
* treated as over-rides, so clobber them here.
*/
pGDev->chipID = -1;
pGDev->chipRev = -1;
}
numFound++;
}
break;
}
}
}
pci_iterator_destroy(iter);
return (numFound != 0);
}
Bool
check_for_matching_devices(DriverPtr drvp)
{
const struct pci_id_match * const devices = drvp->supported_devices;
int j;
for (j = 0; ! END_OF_MATCHES(devices[j]); j++) {
struct pci_device_iterator *iter;
struct pci_device *dev;
iter = pci_id_match_iterator_create(& devices[j]);
dev = pci_device_next(iter);
pci_iterator_destroy(iter);
if (dev != NULL) {
return TRUE;
}
}
return FALSE;
}
/**
* Call the driver's correct probe function.
*
* If the driver implements the \c DriverRec::PciProbe entry-point and an
* appropriate PCI device (with matching Device section in the xorg.conf file)
* is found, it is called. If \c DriverRec::PciProbe or no devices can be
* successfully probed with it (e.g., only non-PCI devices are available),
* the driver's \c DriverRec::Probe function is called.
*
* \param drv Driver to probe
*
* \return
* If a device can be successfully probed by the driver, \c TRUE is
* returned. Otherwise, \c FALSE is returned.
*/
Bool
xf86CallDriverProbe( DriverPtr drv, Bool detect_only )
{
Bool foundScreen = FALSE;
if ( drv->PciProbe != NULL ) {
if ( xf86DoProbe ) {
assert( detect_only );
foundScreen = check_for_matching_devices( drv );
}
else if ( xf86DoConfigure && xf86DoConfigurePass1 ) {
assert( detect_only );
foundScreen = add_matching_devices_to_configure_list( drv );
}
else {
assert( ! detect_only );
foundScreen = probe_devices_from_device_sections( drv );
}
}
if ( ! foundScreen && (drv->Probe != NULL) ) {
xf86Msg( X_WARNING, "Falling back to old probe method for %s\n",
drv->driverName );
foundScreen = (*drv->Probe)( drv, (detect_only) ? PROBE_DETECT
: PROBE_DEFAULT );
}
return foundScreen;
}
void
InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
{
@ -313,10 +542,6 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
LoaderSetOptions(LDR_OPT_ABI_MISMATCH_NONFATAL);
}
/* Force load mandatory base modules */
if (!xf86LoadModules(baseModules, NULL))
FatalError("Unable to load required base modules, Exiting...\n");
xf86OpenConsole();
/* Do a general bus probe. This will be a PCI probe for x86 platforms */
@ -433,16 +658,8 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
|| NEED_IO_ENABLED(flags))
continue;
}
if (xf86DriverList[i]->Probe != NULL)
xf86DriverList[i]->Probe(xf86DriverList[i], PROBE_DEFAULT);
else {
xf86MsgVerb(X_WARNING, 0,
"Driver `%s' has no Probe function (ignoring)\n",
xf86DriverList[i]->driverName
? xf86DriverList[i]->driverName : "noname");
}
xf86SetPciVideo(NULL,NONE);
xf86CallDriverProbe( xf86DriverList[i], FALSE );
}
/*
@ -1501,8 +1718,9 @@ ddxProcessArgument(int argc, char **argv, int i)
FatalError("Bus types other than PCI not yet isolable\n");
}
if (sscanf(argv[i], "PCI:%d:%d:%d", &bus, &device, &func) == 3) {
xf86IsolateDevice.bus = bus;
xf86IsolateDevice.device = device;
xf86IsolateDevice.domain = PCI_DOM_FROM_BUS(bus);
xf86IsolateDevice.bus = PCI_BUS_NO_DOMAIN(bus);
xf86IsolateDevice.dev = device;
xf86IsolateDevice.func = func;
return 2;
} else {

9
hw/xfree86/common/xf86Priv.h
View File

@ -36,6 +36,8 @@
#ifndef _XF86PRIV_H
#define _XF86PRIV_H
#include <pciaccess.h>
#include "xf86Privstr.h"
#include "propertyst.h"
@ -76,7 +78,7 @@ extern Bool xf86BestRefresh;
extern Gamma xf86Gamma;
extern char *xf86ServerName;
extern Bool xf86ShowUnresolved;
extern PciBusId xf86IsolateDevice;
extern struct pci_slot_match xf86IsolateDevice;
/* Other parameters */
@ -101,7 +103,6 @@ extern int xf86NumDrivers;
extern Bool xf86Resetting;
extern Bool xf86Initialising;
extern int xf86NumScreens;
extern pciVideoPtr *xf86PciVideoInfo;
extern xf86CurrentAccessRec xf86CurrentAccess;
extern const char *xf86VisualNames[];
extern int xf86Verbose; /* verbosity level */
@ -148,9 +149,6 @@ void xf86ClearEntityListForScreen(int scrnIndex);
void xf86AddDevToEntity(int entityIndex, GDevPtr dev);
extern void xf86PostPreInit(void);
extern void xf86PostScreenInit(void);
extern memType getValidBIOSBase(PCITAG tag, int num);
extern memType getEmptyPciRange(PCITAG tag, int base_reg);
extern int pciTestMultiDeviceCard(int bus, int dev, int func, PCITAG** pTag);
/* xf86Config.c */
@ -187,6 +185,7 @@ void xf86CloseLog(void);
Bool xf86LoadModules(char **list, pointer *optlist);
int xf86SetVerbosity(int verb);
int xf86SetLogVerbosity(int verb);
Bool xf86CallDriverProbe( struct _DriverRec * drv, Bool detect_only );
/* xf86Lock.c */

3018
hw/xfree86/common/xf86pciBus.c
View File

File diff suppressed because it is too large Load Diff

25
hw/xfree86/common/xf86pciBus.h
View File

@ -42,14 +42,11 @@ typedef struct {
} pciSave, *pciSavePtr;
typedef struct {
PCITAG tag;
struct pci_device * dev;
CARD32 ctrl;
} pciArg;
typedef struct {
int busnum;
int devnum;
int funcnum;
pciArg arg;
xf86AccessRec ioAccess;
xf86AccessRec io_memAccess;
@ -63,24 +60,7 @@ typedef union {
CARD16 control;
} pciBridgesSave, *pciBridgesSavePtr;
typedef struct pciBusRec {
int brbus, brdev, brfunc; /* ID of the bridge to this bus */
int primary, secondary, subordinate;
int subclass; /* bridge type */
int interface;
resPtr preferred_io; /* I/O range */
resPtr preferred_mem; /* non-prefetchable memory range */
resPtr preferred_pmem; /* prefetchable memory range */
resPtr io; /* for subtractive PCI-PCI bridges */
resPtr mem;
resPtr pmem;
int brcontrol; /* bridge_control byte */
struct pciBusRec *next;
} PciBusRec, *PciBusPtr;
void xf86PciProbe(void);
void ValidatePci(void);
resList GetImplicitPciResources(int entityIndex);
void initPciState(void);
void initPciBusState(void);
void DisablePciAccess(void);
@ -89,10 +69,7 @@ void PciStateEnter(void);
void PciBusStateEnter(void);
void PciStateLeave(void);
void PciBusStateLeave(void);
resPtr ResourceBrokerInitPci(resPtr *osRes);
void pciConvertRange2Host(int entityIndex, resRange *pRange);
void isaConvertRange2Host(resRange *pRange);
extern pciAccPtr * xf86PciAccInfo;
#endif /* _XF86_PCI_BUS_H */

60
hw/xfree86/common/xf86str.h
View File

@ -43,11 +43,21 @@
#include "xf86Opt.h"
#include "xf86Pci.h"
/*
* memType is of the size of the addressable memory (machine size)
* usually unsigned long.
#include <pciaccess.h>
/**
* Integer type that is of the size of the addressable memory (machine size).
* On most platforms \c uintptr_t will suffice. However, on some mixed
* 32-bit / 64-bit platforms, such as 32-bit binaries on 64-bit PowerPC, this
* must be 64-bits.
*/
typedef unsigned long memType;
#include <inttypes.h>
#if defined(__powerpc__)
typedef uint64_t memType;
#else
typedef uintptr_t memType;
#endif
/* Video mode flags */
@ -307,6 +317,9 @@ typedef struct {
int refCount;
} DriverRec1;
struct _SymTabRec;
struct _PciChipsets;
typedef struct _DriverRec {
int driverVersion;
char * driverName;
@ -316,6 +329,10 @@ typedef struct _DriverRec {
pointer module;
int refCount;
xorgDriverFuncProc *driverFunc;
const struct pci_id_match * supported_devices;
Bool (*PciProbe)( struct _DriverRec * drv, int entity_num,
struct pci_device * dev, intptr_t match_data );
} DriverRec, *DriverPtr;
/*
@ -361,11 +378,7 @@ typedef enum {
BUS_last /* Keep last */
} BusType;
typedef struct {
int bus;
int device;
int func;
} PciBusId;
struct pci_device;
typedef struct {
unsigned int dummy;
@ -379,7 +392,7 @@ typedef struct _bus {
BusType type;
union {
IsaBusId isa;
PciBusId pci;
struct pci_device *pci;
SbusBusId sbus;
} id;
} BusRec, *BusPtr;
@ -430,29 +443,6 @@ typedef struct {
pointer extraOptions;
} IDevRec, *IDevPtr;
typedef struct {
int vendor;
int chipType;
int chipRev;
int subsysVendor;
int subsysCard;
int bus;
int device;
int func;
int class;
int subclass;
int interface;
memType memBase[6];
memType ioBase[6];
int size[6];
unsigned char type[6];
memType biosBase;
int biosSize;
pointer thisCard;
Bool validSize;
Bool validate;
} pciVideoRec, *pciVideoPtr;
typedef struct {
int frameX0;
int frameY0;
@ -735,7 +725,7 @@ typedef struct {
resRange *resList;
} IsaChipsets;
typedef struct {
typedef struct _PciChipsets {
/**
* Key used to match this device with its name in an array of
* \c SymTabRec.
@ -1064,7 +1054,7 @@ typedef struct {
);
} DGAFunctionRec, *DGAFunctionPtr;
typedef struct {
typedef struct _SymTabRec {
int token; /* id of the token */
const char * name; /* token name */
} SymTabRec, *SymTabPtr;

11
hw/xfree86/dri/dri.c
View File

@ -2449,20 +2449,17 @@ DRIMoveBuffersHelper(
}
char *
DRICreatePCIBusID(pciVideoPtr PciInfo)
DRICreatePCIBusID(const struct pci_device * dev)
{
char *busID;
int domain;
PCITAG tag;
busID = xalloc(20);
if (busID == NULL)
return NULL;
tag = pciTag(PciInfo->bus, PciInfo->device, PciInfo->func);
domain = xf86GetPciDomain(tag);
snprintf(busID, 20, "pci:%04x:%02x:%02x.%d", domain,
PCI_BUS_NO_DOMAIN(PciInfo->bus), PciInfo->device, PciInfo->func);
snprintf(busID, 20, "pci:%04x:%02x:%02x.%d", dev->domain, dev->bus,
dev->dev, dev->func);
return busID;
}

4
hw/xfree86/dri/dri.h
View File

@ -35,6 +35,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _DRI_H_
#include <pciaccess.h>
#include "scrnintstr.h"
#include "xf86dri.h"
@ -363,7 +365,7 @@ extern void DRIMoveBuffersHelper(ScreenPtr pScreen,
int *ydir,
RegionPtr reg);
extern char *DRICreatePCIBusID(pciVideoPtr PciInfo);
extern char *DRICreatePCIBusID(const struct pci_device *PciInfo);
extern int drmInstallSIGIOHandler(int fd, void (*f)(int, void *, void *));
extern int drmRemoveSIGIOHandler(int fd);

3
hw/xfree86/dummylib/Makefile.am
View File

@ -14,10 +14,7 @@ endif
libdummy_nonserver_a_SOURCES = \
fatalerror.c \
getvalidbios.c \
getemptypci.c \
logvwrite.c \
pcitestmulti.c \
$(STRL_SRCS) \
verrorf.c \
xalloc.c \

132
hw/xfree86/fbdevhw/fbdevhw.c
View File

@ -296,53 +296,99 @@ fbdev2xfree_timing(struct fb_var_screeninfo *var, DisplayModePtr mode)
/* -------------------------------------------------------------------- */
/* open correct framebuffer device */
/* try to find the framebuffer device for a given PCI device */
/**
* Try to find the framebuffer device for a given PCI device
*/
static int
fbdev_open_pci(pciVideoPtr pPci, char **namep)
fbdev_open_pci(struct pci_device * pPci, char **namep)
{
struct fb_fix_screeninfo fix;
char filename[16];
int fd,i,j;
memType res_start, res_end;
struct fb_fix_screeninfo fix;
char filename[256];
int fd,i,j;
for (i = 0; i < 8; i++) {
sprintf(filename,"/dev/fb%d",i);
if (-1 == (fd = open(filename,O_RDWR,0))) {
xf86DrvMsg(-1, X_WARNING,
"open %s: %s\n", filename, strerror(errno));
continue;
/* There are two ways to that we can determine which fb device is
* associated with this PCI device. The more modern way is to look in
* the sysfs directory for the PCI device for a file named
* "graphics:fb*"
*/
for (i = 0; i < 8; i++) {
sprintf(filename,
"/sys/bus/pci/devices/%04x:%02x:%02x.%d/graphics:fb%d",
pPci->domain, pPci->bus, pPci->dev, pPci->func, i);
fd = open(filename, O_RDONLY, 0);
if (fd != -1) {
close(fd);
sprintf(filename, "/dev/fb%d", i);
fd = open(filename, O_RDWR, 0);
if (fd != -1) {
if (ioctl(fd, FBIOGET_FSCREENINFO, (void*) & fix) != -1) {
if (namep) {
*namep = xnfalloc(16);
strncpy(*namep,fix.id,16);
}
return fd;
}
if (-1 == ioctl(fd,FBIOGET_FSCREENINFO,(void*)&fix)) {
close(fd);
continue;
}
for (j = 0; j < 6; j++) {
res_start = pPci->memBase[j];
res_end = res_start+pPci->size[j];
if ((0 != fix.smem_len &&
(memType) fix.smem_start >= res_start &&
(memType) fix.smem_start < res_end) ||
(0 != fix.mmio_len &&
(memType) fix.mmio_start >= res_start &&
(memType) fix.mmio_start < res_end))
break;
}
if (j == 6) {
close(fd);
continue;
}
if (namep) {
*namep = xnfalloc(16);
strncpy(*namep,fix.id,16);
}
return fd;
}
}
if (namep)
*namep = NULL;
xf86DrvMsg(-1, X_ERROR,
"Unable to find a valid framebuffer device\n");
return -1;
close(fd);
}
/* The other way is to examine the resources associated with each fb
* device and see if there is a match with the PCI device. This technique
* has some problems on certain mixed 64-bit / 32-bit architectures.
* There is a flaw in the fb_fix_screeninfo structure in that it only
* returns the low 32-bits of the address of the resources associated with
* a device. However, on a mixed architecture the base addresses of PCI
* devices, even for 32-bit applications, may be higher than 0x0f0000000.
*/
for (i = 0; i < 8; i++) {
sprintf(filename,"/dev/fb%d",i);
if (-1 == (fd = open(filename,O_RDWR,0))) {
xf86DrvMsg(-1, X_WARNING,
"open %s: %s\n", filename, strerror(errno));
continue;
}
if (-1 == ioctl(fd,FBIOGET_FSCREENINFO,(void*)&fix)) {
close(fd);
continue;
}
for (j = 0; j < 6; j++) {
const pciaddr_t res_start = pPci->regions[j].base_addr;
const pciaddr_t res_end = res_start + pPci->regions[j].size;
if ((0 != fix.smem_len &&
(pciaddr_t) fix.smem_start >= res_start &&
(pciaddr_t) fix.smem_start < res_end) ||
(0 != fix.mmio_len &&
(pciaddr_t) fix.mmio_start >= res_start &&
(pciaddr_t) fix.mmio_start < res_end))
break;
}
if (j == 6) {
close(fd);
continue;
}
if (namep) {
*namep = xnfalloc(16);
strncpy(*namep,fix.id,16);
}
return fd;
}
if (namep)
*namep = NULL;
xf86DrvMsg(-1, X_ERROR,
"Unable to find a valid framebuffer device\n");
return -1;
}
static int
@ -387,7 +433,7 @@ fbdev_open(int scrnIndex, char *dev, char** namep)
/* -------------------------------------------------------------------- */
Bool
fbdevHWProbe(pciVideoPtr pPci, char *device,char **namep)
fbdevHWProbe(struct pci_device * pPci, char *device,char **namep)
{
int fd;
@ -403,7 +449,7 @@ fbdevHWProbe(pciVideoPtr pPci, char *device,char **namep)
}
Bool
fbdevHWInit(ScrnInfoPtr pScrn, pciVideoPtr pPci, char *device)
fbdevHWInit(ScrnInfoPtr pScrn, struct pci_device * pPci, char *device)
{
fbdevHWPtr fPtr;

6
hw/xfree86/fbdevhw/fbdevhw.h
View File

@ -5,6 +5,8 @@
#include "xf86str.h"
#include "colormapst.h"
#include <pciaccess.h>
#define FBDEVHW_PACKED_PIXELS 0 /* Packed Pixels */
#define FBDEVHW_PLANES 1 /* Non interleaved planes */
#define FBDEVHW_INTERLEAVED_PLANES 2 /* Interleaved planes */
@ -14,8 +16,8 @@
Bool fbdevHWGetRec(ScrnInfoPtr pScrn);
void fbdevHWFreeRec(ScrnInfoPtr pScrn);
Bool fbdevHWProbe(pciVideoPtr pPci, char *device, char **namep);
Bool fbdevHWInit(ScrnInfoPtr pScrn, pciVideoPtr pPci, char *device);
Bool fbdevHWProbe(struct pci_device * pPci, char *device, char **namep);
Bool fbdevHWInit(ScrnInfoPtr pScrn, struct pci_device * pPci, char *device);
char* fbdevHWGetName(ScrnInfoPtr pScrn);
int fbdevHWGetDepth(ScrnInfoPtr pScrn, int *fbbpp);

1
hw/xfree86/int10/Makefile.am
View File

@ -9,7 +9,6 @@ libint10_la_LDFLAGS = -avoid-version
COMMON_SOURCES = \
helper_exec.c \
helper_mem.c \
pci.c \
xf86int10.c \
xf86int10module.c

111
hw/xfree86/int10/generic.c
View File

@ -16,6 +16,7 @@
#define _INT10_PRIVATE
#include "xf86int10.h"
#include "int10Defines.h"
#include "Pci.h"
#define ALLOC_ENTRIES(x) ((V_RAM / x) - 1)
@ -55,12 +56,66 @@ int10MemRec genericMem = {
static void MapVRam(xf86Int10InfoPtr pInt);
static void UnmapVRam(xf86Int10InfoPtr pInt);
#ifdef _PC
#define GET_HIGH_BASE(x) (((V_BIOS + size + getpagesize() - 1)/getpagesize()) \
* getpagesize())
#define GET_HIGH_BASE(x) (((V_BIOS + (x) + getpagesize() - 1)/getpagesize()) \
* getpagesize())
#endif
static void *sysMem = NULL;
/**
* Read legacy VGA video BIOS associated with specified domain.
*
* Attempts to read up to 128KiB of legacy VGA video BIOS.
*
* \return
* The number of bytes read on success or -1 on failure.
*
* \bug
* PCI ROMs can contain multiple BIOS images (e.g., OpenFirmware, x86 VGA,
* etc.). How do we know that \c pci_device_read_rom will return the
* legacy VGA BIOS image?
*/
static int
read_legacy_video_BIOS(struct pci_device *dev, unsigned char *Buf)
{
const ADDRESS Base = 0xC0000;
const int Len = 0x10000 * 2;
const int pagemask = getpagesize() - 1;
const ADDRESS offset = Base & ~pagemask;
const unsigned long size = ((Base + Len + pagemask) & ~pagemask) - offset;
unsigned char *ptr, *src;
int len;
/* Try to use the civilized PCI interface first.
*/
if (pci_device_read_rom(dev, Buf) == 0) {
return dev->rom_size;
}
ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, dev, offset, size);
if (!ptr)
return -1;
/* Using memcpy() here can hang the system */
src = ptr + (Base - offset);
for (len = 0; len < (Len / 2); len++) {
Buf[len] = src[len];
}
if ((Buf[0] == 0x55) && (Buf[1] == 0xAA) && (Buf[2] > 0x80)) {
for ( /* empty */ ; len < Len; len++) {
Buf[len] = src[len];
}
}
xf86UnMapVidMem(-1, ptr, size);
return Len;
}
xf86Int10InfoPtr
xf86ExtendedInitInt10(int entityIndex, int Flags)
{
@ -68,7 +123,6 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
void* base = 0;
void* vbiosMem = 0;
void* options = NULL;
pciVideoPtr pvp;
int screen;
legacyVGARec vga;
@ -96,8 +150,10 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
pInt->scrnIndex = screen;
base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS);
pvp = xf86GetPciInfoForEntity(entityIndex);
if (pvp) pInt->Tag = pciTag(pvp->bus, pvp->device, pvp->func);
/* FIXME: Shouldn't this be a failure case? Leaving dev as NULL seems like
* FIXME: an error
*/
pInt->dev = xf86GetPciInfoForEntity(entityIndex);
/*
* we need to map video RAM MMIO as some chipsets map mmio
@ -150,14 +206,18 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
switch (location_type) {
case BUS_PCI: {
const int pci_entity = pInt->entityIndex;
int err;
struct pci_device *rom_device =
xf86GetPciInfoForEntity(pInt->entityIndex);
vbiosMem = (unsigned char *)base + bios_location;
if (!(size = mapPciRom(pci_entity,(unsigned char *)(vbiosMem)))) {
xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3)\n");
err = pci_device_read_rom(rom_device, vbiosMem);
if (err) {
xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3) %s\n",
strerror(err));
goto error1;
}
INTPriv(pInt)->highMemory = GET_HIGH_BASE(size);
INTPriv(pInt)->highMemory = GET_HIGH_BASE(rom_device->rom_size);
break;
}
case BUS_ISA:
@ -191,24 +251,15 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
setup_int_vect(pInt);
set_return_trap(pInt);
/*
* Retrieve two segments: one at V_BIOS, the other 64kB beyond the first.
* This'll catch any BIOS that might have been initialised before server
* entry.
/* Retrieve the entire legacy video BIOS segment. This can be upto
* 128KiB.
*/
vbiosMem = (char *)base + V_BIOS;
(void)memset(vbiosMem, 0, 2 * V_BIOS_SIZE);
if (xf86ReadDomainMemory(pInt->Tag, V_BIOS, V_BIOS_SIZE, vbiosMem) <
V_BIOS_SIZE)
if (read_legacy_video_BIOS(pInt->dev, vbiosMem) < V_BIOS_SIZE) {
xf86DrvMsg(screen, X_WARNING,
"Unable to retrieve all of segment 0x0C0000.\n");
else if ((((unsigned char *)vbiosMem)[0] == 0x55) &&
(((unsigned char *)vbiosMem)[1] == 0xAA) &&
(((unsigned char *)vbiosMem)[2] > 0x80))
if (xf86ReadDomainMemory(pInt->Tag, V_BIOS + V_BIOS_SIZE, V_BIOS_SIZE,
(unsigned char *)vbiosMem + V_BIOS_SIZE) < V_BIOS_SIZE)
xf86DrvMsg(screen, X_WARNING,
"Unable to retrieve all of segment 0x0D0000.\n");
"Unable to retrieve all of segment 0x0C0000.\n");
}
/*
* If this adapter is the primary, use its post-init BIOS (if we can find
@ -227,9 +278,15 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
"No legacy BIOS found -- trying PCI\n");
}
if (!done) {
if (!mapPciRom(pInt->entityIndex, vbiosMem)) {
xf86DrvMsg(screen, X_ERROR, "Cannot read V_BIOS (5)\n");
goto error1;
int err;
struct pci_device *rom_device =
xf86GetPciInfoForEntity(pInt->entityIndex);
err = pci_device_read_rom(rom_device, vbiosMem);
if (err) {
xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (5) %s\n",
strerror(err));
goto error1;
}
}
}
@ -262,7 +319,7 @@ MapVRam(xf86Int10InfoPtr pInt)
int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;
INTPriv(pInt)->vRam = xf86MapDomainMemory(pInt->scrnIndex, VIDMEM_MMIO,
pInt->Tag, V_RAM, size);
pInt->dev, V_RAM, size);
pInt->ioBase = xf86Screens[pInt->scrnIndex]->domainIOBase;
}

33
hw/xfree86/int10/helper_exec.c
View File

@ -29,6 +29,7 @@
#define _INT10_PRIVATE
#include "int10Defines.h"
#include "xf86int10.h"
#include "Pci.h"
#ifdef _X86EMU
#include "x86emu/x86emui.h"
#endif
@ -470,7 +471,7 @@ pciCfg1in(CARD16 addr, CARD32 *val)
return 1;
}
if (addr == 0xCFC) {
*val = pciReadLong(Int10Current->Tag, OFFSET(PciCfg1Addr));
pci_device_cfg_read_u32(Int10Current->dev, val, OFFSET(PciCfg1Addr));
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_inl(%#x) = %8.8x\n", PciCfg1Addr, *val);
return 1;
@ -488,7 +489,7 @@ pciCfg1out(CARD16 addr, CARD32 val)
if (addr == 0xCFC) {
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_outl(%#x, %8.8x)\n", PciCfg1Addr, val);
pciWriteLong(Int10Current->Tag, OFFSET(PciCfg1Addr), val);
pci_device_cfg_write_u32(Int10Current->dev, val, OFFSET(PciCfg1Addr));
return 1;
}
return 0;
@ -497,7 +498,7 @@ pciCfg1out(CARD16 addr, CARD32 val)
static int
pciCfg1inw(CARD16 addr, CARD16 *val)
{
int offset, shift;
int shift;
if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
shift = (addr - 0xCF8) * 8;
@ -505,8 +506,9 @@ pciCfg1inw(CARD16 addr, CARD16 *val)
return 1;
}
if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
offset = addr - 0xCFC;
*val = pciReadWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset);
const unsigned offset = addr - 0xCFC;
pci_device_cfg_read_u16(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset);
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_inw(%#x) = %4.4x\n", PciCfg1Addr + offset, *val);
return 1;
@ -517,7 +519,7 @@ pciCfg1inw(CARD16 addr, CARD16 *val)
static int
pciCfg1outw(CARD16 addr, CARD16 val)
{
int offset, shift;
int shift;
if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
shift = (addr - 0xCF8) * 8;
@ -526,10 +528,11 @@ pciCfg1outw(CARD16 addr, CARD16 val)
return 1;
}
if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
offset = addr - 0xCFC;
const unsigned offset = addr - 0xCFC;
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_outw(%#x, %4.4x)\n", PciCfg1Addr + offset, val);
pciWriteWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val);
pci_device_cfg_write_u16(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset);
return 1;
}
return 0;
@ -538,7 +541,7 @@ pciCfg1outw(CARD16 addr, CARD16 val)
static int
pciCfg1inb(CARD16 addr, CARD8 *val)
{
int offset, shift;
int shift;
if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
shift = (addr - 0xCF8) * 8;
@ -546,8 +549,9 @@ pciCfg1inb(CARD16 addr, CARD8 *val)
return 1;
}
if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
offset = addr - 0xCFC;
*val = pciReadByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset);
const unsigned offset = addr - 0xCFC;
pci_device_cfg_read_u8(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset);
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_inb(%#x) = %2.2x\n", PciCfg1Addr + offset, *val);
return 1;
@ -558,7 +562,7 @@ pciCfg1inb(CARD16 addr, CARD8 *val)
static int
pciCfg1outb(CARD16 addr, CARD8 val)
{
int offset, shift;
int shift;
if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
shift = (addr - 0xCF8) * 8;
@ -567,10 +571,11 @@ pciCfg1outb(CARD16 addr, CARD8 val)
return 1;
}
if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
offset = addr - 0xCFC;
const unsigned offset = addr - 0xCFC;
if (PRINT_PORT && DEBUG_IO_TRACE())
ErrorF(" cfg_outb(%#x, %2.2x)\n", PciCfg1Addr + offset, val);
pciWriteByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val);
pci_device_cfg_write_u8(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset);
return 1;
}
return 0;

55
hw/xfree86/int10/pci.c
View File

@ -1,55 +0,0 @@
/*
* XFree86 int10 module
* execute BIOS int 10h calls in x86 real mode environment
* Copyright 1999 Egbert Eich
*/
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
#include <string.h>
#include "xf86Pci.h"
#include "xf86.h"
#define _INT10_PRIVATE
#include "xf86int10.h"
int
mapPciRom(int pciEntity, unsigned char * address)
{
PCITAG tag;
unsigned char *mem, *ptr;
int length;
pciVideoPtr pvp = xf86GetPciInfoForEntity(pciEntity);
if (pvp == NULL) {
#ifdef DEBUG
ErrorF("mapPciRom: no PCI info\n");
#endif
return 0;
}
tag = pciTag(pvp->bus,pvp->device,pvp->func);
length = 1 << pvp->biosSize;
/* Read in entire PCI ROM */
mem = ptr = xnfcalloc(length, 1);
length = xf86ReadPciBIOS(0, tag, -1, ptr, length);
if (length > 0)
memcpy(address, ptr, length);
/* unmap/close/disable PCI bios mem */
xfree(mem);
#ifdef DEBUG
if (!length)
ErrorF("mapPciRom: no BIOS found\n");
#ifdef PRINT_PCI
else
dprint(address,0x20);
#endif
#endif
return length;
}

138
hw/xfree86/int10/xf86int10.c
View File

@ -13,6 +13,7 @@
#define _INT10_PRIVATE
#include "xf86int10.h"
#include "int10Defines.h"
#include "Pci.h"
#define REG pInt
@ -23,8 +24,8 @@ static int int1A_handler(xf86Int10InfoPtr pInt);
static int int42_handler(xf86Int10InfoPtr pInt);
#endif
static int intE6_handler(xf86Int10InfoPtr pInt);
static PCITAG findPci(xf86Int10InfoPtr pInt, unsigned short bx);
static CARD32 pciSlotBX(pciVideoPtr pvp);
static struct pci_device *findPci(xf86Int10InfoPtr pInt, unsigned short bx);
static CARD32 pciSlotBX( const struct pci_device * pvp );
int
int_handler(xf86Int10InfoPtr pInt)
@ -592,13 +593,75 @@ int42_handler(xf86Int10InfoPtr pInt)
#define DEVICE_NOT_FOUND 0x86
#define BAD_REGISTER_NUMBER 0x87
#ifdef SHOW_ALL_DEVICES
/**
* These functions are meant to be used by the PCI BIOS emulation. Some
* BIOSes need to see if there are \b other chips of the same type around so
* by setting \c exclude one PCI device can be explicitely excluded, if
* required.
*/
static struct pci_device *
do_find(const struct pci_id_match *m, char n, const struct pci_device * exclude)
{
struct pci_device *dev;
struct pci_device_iterator *iter;
n++;
iter = pci_id_match_iterator_create(m);
while ((dev = pci_device_next(iter)) != NULL) {
if ((dev != exclude) && !(--n)) {
break;
}
}
pci_iterator_destroy(iter);
return dev;
}
static struct pci_device *
find_pci_device_vendor(CARD16 vendorID, CARD16 deviceID,
char n, const struct pci_device * exclude)
{
struct pci_id_match m;
m.vendor_id = vendorID;
m.device_id = deviceID;
m.subvendor_id = PCI_MATCH_ANY;
m.subdevice_id = PCI_MATCH_ANY;
m.device_class = 0;
m.device_class_mask = 0;
return do_find(& m, n, exclude);
}
static struct pci_device *
find_pci_class(CARD8 intf, CARD8 subClass, CARD16 _class,
char n, const struct pci_device * exclude)
{
struct pci_id_match m;
m.vendor_id = PCI_MATCH_ANY;
m.device_id = PCI_MATCH_ANY;
m.subvendor_id = PCI_MATCH_ANY;
m.subdevice_id = PCI_MATCH_ANY;
m.device_class = (((uint32_t)_class) << 16)
| (((uint32_t)subClass) << 8) | intf;
m.device_class_mask = 0x00ffffff;
return do_find(& m, n, exclude);
}
#endif
static int
int1A_handler(xf86Int10InfoPtr pInt)
{
PCITAG tag;
pciVideoPtr pvp;
struct pci_device * const pvp = xf86GetPciInfoForEntity(pInt->entityIndex);
struct pci_device * dev;
if (!(pvp = xf86GetPciInfoForEntity(pInt->entityIndex)))
if (pvp == NULL)
return 0; /* oops */
#ifdef PRINT_INT
@ -619,17 +682,19 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb102:
if (X86_DX == pvp->vendor && X86_CX == pvp->chipType && X86_ESI == 0) {
if ( (X86_DX == pvp->vendor_id)
&& (X86_CX == pvp->device_id)
&& (X86_ESI == 0) ) {
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
X86_EBX = pciSlotBX(pvp);
}
#ifdef SHOW_ALL_DEVICES
else
if ((pvp = xf86FindPciDeviceVendor(X86_EDX, X86_ECX, X86_ESI, pvp))) {
if ((dev = find_pci_device_vendor(X86_EDX, X86_ECX, X86_ESI, pvp))) {
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
X86_EBX = pciSlotBX(pvp);
X86_EBX = pciSlotBX(dev);
}
#endif
else {
@ -641,20 +706,18 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb103:
if (X86_CL == pvp->interface &&
X86_CH == pvp->subclass &&
((X86_ECX & 0xFFFF0000) >> 16) == pvp->class) {
if ( (X86_ECX & 0x00FFFFFF) == pvp->device_class ) {
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EBX = pciSlotBX(pvp);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
}
#ifdef SHOW_ALL_DEVICES
else if ((pvp = xf86FindPciClass(X86_CL, X86_CH,
(X86_ECX & 0xffff0000) >> 16,
X86_ESI, pvp))) {
else if ((dev = find_pci_class(X86_CL, X86_CH,
(X86_ECX & 0xffff0000) >> 16,
X86_ESI, pvp))) {
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
X86_EBX = pciSlotBX(pvp);
X86_EBX = pciSlotBX(dev);
}
#endif
else {
@ -666,8 +729,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb108:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
X86_CL = pciReadByte(tag, X86_EDI);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_read_u8(dev, & X86_CL, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -679,8 +742,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb109:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
X86_CX = pciReadWord(tag, X86_EDI);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_read_u16(dev, & X86_CX, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -692,8 +755,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb10a:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
X86_ECX = pciReadLong(tag, X86_EDI);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_read_u32(dev, & X86_ECX, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -705,8 +768,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb10b:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
pciWriteByte(tag, X86_EDI, X86_CL);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_write_u8(dev, X86_CL, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -718,8 +781,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb10c:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
pciWriteWord(tag, X86_EDI, X86_CX);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_write_u16(dev, X86_CX, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -731,8 +794,8 @@ int1A_handler(xf86Int10InfoPtr pInt)
#endif
return 1;
case 0xb10d:
if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) {
pciWriteLong(tag, X86_EDI, X86_ECX);
if ((dev = findPci(pInt, X86_EBX)) != NULL) {
pci_device_cfg_write_u32(dev, X86_ECX, X86_EDI);
X86_EAX = X86_AL | (SUCCESSFUL << 8);
X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */
} else {
@ -753,21 +816,20 @@ int1A_handler(xf86Int10InfoPtr pInt)
}
}
static PCITAG
static struct pci_device *
findPci(xf86Int10InfoPtr pInt, unsigned short bx)
{
int bus = ((pInt->Tag >> 16) & ~0x00FF) | ((bx >> 8) & 0x00FF);
int dev = (bx >> 3) & 0x1F;
int func = bx & 0x7;
if (xf86IsPciDevPresent(bus, dev, func))
return pciTag(bus, dev, func);
return PCI_NOT_FOUND;
const unsigned bus = (bx >> 8) & 0x00FF;
const unsigned dev = (bx >> 3) & 0x001F;
const unsigned func = (bx ) & 0x0007;
return pci_device_find_by_slot(pInt->dev->domain, bus, dev, func);
}
static CARD32
pciSlotBX(pciVideoPtr pvp)
pciSlotBX(const struct pci_device * pvp)
{
return ((pvp->bus << 8) & 0x00FF00) | (pvp->device << 3) | (pvp->func);
return ((pvp->bus << 8) & 0x00FF00) | (pvp->dev << 3) | (pvp->func);
}
/*
@ -776,10 +838,10 @@ pciSlotBX(pciVideoPtr pvp)
static int
intE6_handler(xf86Int10InfoPtr pInt)
{
pciVideoPtr pvp;
struct pci_device * pvp;
if ((pvp = xf86GetPciInfoForEntity(pInt->entityIndex)))
X86_AX = (pvp->bus << 8) | (pvp->device << 3) | (pvp->func & 0x7);
X86_AX = (pvp->bus << 8) | (pvp->dev << 3) | (pvp->func & 0x7);
pushw(pInt, X86_CS);
pushw(pInt, X86_IP);
X86_CS = pInt->BIOSseg;

5
hw/xfree86/int10/xf86int10.h
View File

@ -40,7 +40,7 @@ typedef struct {
int bp;
int flags;
int stackseg;
PCITAG Tag;
struct pci_device *dev;
IOADDRESS ioBase;
} xf86Int10InfoRec, *xf86Int10InfoPtr;
@ -179,8 +179,5 @@ Bool xf86int10GetBiosSegment(xf86Int10InfoPtr pInt, void *base);
void dprint(unsigned long start, unsigned long size);
#endif
/* pci.c */
int mapPciRom(int pciEntity, unsigned char *address);
#endif /* _INT10_PRIVATE */
#endif /* _XF86INT10_H */

33
hw/xfree86/loader/xf86sym.c
View File

@ -252,10 +252,7 @@ _X_HIDDEN void *xfree86LookupTab[] = {
SYMFUNC(xf86MapVidMem)
SYMFUNC(xf86UnMapVidMem)
SYMFUNC(xf86MapReadSideEffects)
SYMFUNC(xf86GetPciDomain)
SYMFUNC(xf86MapDomainMemory)
SYMFUNC(xf86MapDomainIO)
SYMFUNC(xf86ReadDomainMemory)
SYMFUNC(xf86UDelay)
SYMFUNC(xf86IODelay)
SYMFUNC(xf86SlowBcopy)
@ -304,10 +301,6 @@ _X_HIDDEN void *xfree86LookupTab[] = {
/* xf86Bus.c */
SYMFUNC(xf86CheckPciSlot)
SYMFUNC(xf86ClaimPciSlot)
SYMFUNC(xf86GetPciVideoInfo)
SYMFUNC(xf86GetPciEntity)
SYMFUNC(xf86GetPciConfigInfo)
SYMFUNC(xf86SetPciVideo)
SYMFUNC(xf86ClaimIsaSlot)
SYMFUNC(xf86ClaimFbSlot)
SYMFUNC(xf86ClaimNoSlot)
@ -338,17 +331,12 @@ _X_HIDDEN void *xfree86LookupTab[] = {
SYMFUNC(xf86CheckPciMemBase)
SYMFUNC(xf86SetAccessFuncs)
SYMFUNC(xf86IsEntityPrimary)
SYMFUNC(xf86FixPciResource)
SYMFUNC(xf86SetOperatingState)
SYMFUNC(xf86EnterServerState)
SYMFUNC(xf86GetBlock)
SYMFUNC(xf86GetSparse)
SYMFUNC(xf86ReallocatePciResources)
SYMFUNC(xf86ChkConflict)
SYMFUNC(xf86IsPciDevPresent)
SYMFUNC(xf86FindScreenForEntity)
SYMFUNC(xf86FindPciDeviceVendor)
SYMFUNC(xf86FindPciClass)
SYMFUNC(xf86RegisterStateChangeNotificationCallback)
SYMFUNC(xf86DeregisterStateChangeNotificationCallback)
SYMFUNC(xf86NoSharedResources)
@ -707,21 +695,18 @@ _X_HIDDEN void *xfree86LookupTab[] = {
SYMFUNC(DPMSSet)
SYMFUNC(DPMSSupported)
#endif
SYMFUNC(pciFindFirst)
SYMFUNC(pciFindNext)
SYMFUNC(pciWriteByte)
SYMFUNC(pciWriteWord)
SYMFUNC(pciWriteLong)
SYMFUNC(pciReadByte)
SYMFUNC(pciReadWord)
SYMFUNC(pciReadLong)
SYMFUNC(pciSetBitsLong)
/* xf86Debug.c */
#ifdef BUILDDEBUG
SYMFUNC(xf86Break1)
SYMFUNC(xf86Break2)
SYMFUNC(xf86Break3)
SYMFUNC(xf86SPTimestamp)
SYMFUNC(xf86STimestamp)
#endif
SYMFUNC(pciTag)
SYMFUNC(pciBusAddrToHostAddr)
SYMFUNC(pciHostAddrToBusAddr)
SYMFUNC(xf86MapPciMem)
SYMFUNC(xf86scanpci)
SYMFUNC(xf86ReadPciBIOS)
/* Loader functions */
SYMFUNC(LoadSubModule)

1171
hw/xfree86/os-support/bus/Pci.c
View File

File diff suppressed because it is too large Load Diff

125
hw/xfree86/os-support/bus/Pci.h
View File

@ -156,50 +156,6 @@
#define PCI_BUS_NO_DOMAIN(bus) ((bus) & 0xffu)
#define PCI_TAG_NO_DOMAIN(tag) ((tag) & 0x00ffff00u)
/*
* Macros for bus numbers found in P2P headers.
*/
#define PCI_PRIMARY_BUS_EXTRACT(x, tag) \
((((x) & PCI_PRIMARY_BUS_MASK ) >> 0) | (PCI_DOM_FROM_TAG(tag) << 8))
#define PCI_SECONDARY_BUS_EXTRACT(x, tag) \
((((x) & PCI_SECONDARY_BUS_MASK ) >> 8) | (PCI_DOM_FROM_TAG(tag) << 8))
#define PCI_SUBORDINATE_BUS_EXTRACT(x, tag) \
((((x) & PCI_SUBORDINATE_BUS_MASK) >> 16) | (PCI_DOM_FROM_TAG(tag) << 8))
#define PCI_PRIMARY_BUS_INSERT(x, y) \
(((x) & ~PCI_PRIMARY_BUS_MASK ) | (((y) & 0xffu) << 0))
#define PCI_SECONDARY_BUS_INSERT(x, y) \
(((x) & ~PCI_SECONDARY_BUS_MASK ) | (((y) & 0xffu) << 8))
#define PCI_SUBORDINATE_BUS_INSERT(x, y) \
(((x) & ~PCI_SUBORDINATE_BUS_MASK) | (((y) & 0xffu) << 16))
/* Ditto for CardBus bridges */
#define PCI_CB_PRIMARY_BUS_EXTRACT(x, tag) \
PCI_PRIMARY_BUS_EXTRACT(x, tag)
#define PCI_CB_CARDBUS_BUS_EXTRACT(x, tag) \
PCI_SECONDARY_BUS_EXTRACT(x, tag)
#define PCI_CB_SUBORDINATE_BUS_EXTRACT(x, tag) \
PCI_SUBORDINATE_BUS_EXTRACT(x, tag)
#define PCI_CB_PRIMARY_BUS_INSERT(x, tag) \
PCI_PRIMARY_BUS_INSERT(x, tag)
#define PCI_CB_CARDBUS_BUS_INSERT(x, tag) \
PCI_SECONDARY_BUS_INSERT(x, tag)
#define PCI_CB_SUBORDINATE_BUS_INSERT(x, tag) \
PCI_SUBORDINATE_BUS_INSERT(x, tag)
#if X_BYTE_ORDER == X_BIG_ENDIAN
#define PCI_CPU(val) (((val >> 24) & 0x000000ff) | \
((val >> 8) & 0x0000ff00) | \
((val << 8) & 0x00ff0000) | \
((val << 24) & 0xff000000))
#define PCI_CPU16(val) (((val >> 8) & 0x000000ff) | \
((val << 8) & 0x0000ff00))
#else
#define PCI_CPU(val) (val)
#define PCI_CPU16(val) (val)
#endif
/*
* Debug Macros/Definitions
*/
@ -234,97 +190,79 @@
#if defined(__alpha__)
# if defined(linux)
# define ARCH_PCI_INIT axpPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
# define ARCH_PCI_INIT freebsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# elif defined(__NetBSD__)
# define ARCH_PCI_INIT netbsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__arm__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__hppa__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__ia64__)
# if defined(linux)
# define ARCH_PCI_INIT ia64linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# elif defined(FreeBSD)
# define ARCH_PCI_INIT freebsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
# define XF86SCANPCI_WRAPPER ia64ScanPCIWrapper
#elif defined(__i386__) || defined(i386)
# define ARCH_PCI_INIT ix86PciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# if defined(linux)
# define ARCH_PCI_OS_INIT linuxPciInit
# define ARCH_PCI_INIT linuxPciInit
# else
# define ARCH_PCI_INIT ix86PciInit
# endif
# define INCLUDE_XF86_NO_DOMAIN
#elif defined(__mc68000__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__mips__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__powerpc__) || defined(__powerpc64__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN /* Needs kernel work to remove */
# elif defined(__FreeBSD__) || defined(__OpenBSD__)
# define ARCH_PCI_INIT freebsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# elif defined(__NetBSD__)
# define ARCH_PCI_INIT netbsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# else
# define ARCH_PCI_INIT ppcPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__s390__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__sh__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
#elif defined(__sparc__) || defined(sparc)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# elif defined(sun)
# define ARCH_PCI_INIT sparcPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc64__)
# define ARCH_PCI_INIT freebsdPciInit
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# endif
# if !defined(__FreeBSD__) && !defined(linux)
@ -333,28 +271,21 @@
#elif defined(__amd64__) || defined(__amd64)
# if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
# define ARCH_PCI_INIT freebsdPciInit
# elif defined(linux)
# define ARCH_PCI_INIT linuxPciInit
# else
# define ARCH_PCI_INIT ix86PciInit
# endif
# define INCLUDE_XF86_MAP_PCI_MEM
# define INCLUDE_XF86_NO_DOMAIN
# if defined(linux)
# define ARCH_PCI_OS_INIT linuxPciInit
# endif
#endif
#ifndef ARCH_PCI_INIT
#error No PCI support available for this architecture/OS combination
#endif
extern void ARCH_PCI_INIT(void);
#if defined(ARCH_PCI_OS_INIT)
extern void ARCH_PCI_OS_INIT(void);
#endif
#undef INCLUDE_XF86_NO_DOMAIN
#if defined(ARCH_PCI_PCI_BRIDGE)
extern void ARCH_PCI_PCI_BRIDGE(pciConfigPtr pPCI);
#endif
extern void ARCH_PCI_INIT(void);
#if defined(XF86SCANPCI_WRAPPER)
typedef enum {
@ -369,27 +300,7 @@ extern void XF86SCANPCI_WRAPPER(scanpciWrapperOpt flags);
* (e.g. a primary PCI bus and all of its secondaries)
*/
typedef struct pci_bus_funcs {
CARD32 (*pciReadLong)(PCITAG, int);
void (*pciWriteLong)(PCITAG, int, CARD32);
void (*pciSetBitsLong)(PCITAG, int, CARD32, CARD32);
ADDRESS (*pciAddrHostToBus)(PCITAG, PciAddrType, ADDRESS);
ADDRESS (*pciAddrBusToHost)(PCITAG, PciAddrType, ADDRESS);
/*
* The next three are optional. If NULL, the corresponding function is
* to be performed generically.
*/
CARD16 (*pciControlBridge)(int, CARD16, CARD16);
void (*pciGetBridgeBuses)(int, int *, int *, int *);
/* Use pointer's to avoid #include recursion */
void (*pciGetBridgeResources)(int, pointer *, pointer *, pointer *);
/* These are optional and will be implemented using read long
* if not present. */
CARD8 (*pciReadByte)(PCITAG, int);
void (*pciWriteByte)(PCITAG, int, CARD8);
CARD16 (*pciReadWord)(PCITAG, int);
void (*pciWriteWord)(PCITAG, int, CARD16);
} pciBusFuncs_t, *pciBusFuncs_p;
/*
@ -402,7 +313,7 @@ typedef struct pci_bus_info {
int primary_bus; /* Parent bus */
pciBusFuncs_p funcs; /* PCI access functions */
void *pciBusPriv; /* Implementation private data */
pciConfigPtr bridge; /* bridge that opens this bus */
struct pci_device *bridge; /* bridge that opens this bus */
} pciBusInfo_t;
#define HOST_NO_BUS ((pciBusInfo_t *)(-1))
@ -414,32 +325,14 @@ typedef struct pci_bus_info {
#define PCI_CFG_MECH_OTHER 3 /* Something else */
/* Generic PCI service functions and helpers */
PCITAG pciGenFindFirst(void);
PCITAG pciGenFindNext(void);
CARD32 pciCfgMech1Read(PCITAG tag, int offset);
void pciCfgMech1Write(PCITAG tag, int offset, CARD32 val);
void pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask,
CARD32 val);
CARD32 pciByteSwap(CARD32);
Bool pciMfDev(int, int);
ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS);
extern void pciSetOSBIOSPtr(int (*bios_fn)(PCITAG Tag, int basereg, unsigned char * buf, int len));
extern PCITAG (*pciFindFirstFP)(void);
extern PCITAG (*pciFindNextFP)(void);
extern CARD32 pciDevid;
extern CARD32 pciDevidMask;
extern int pciMaxBusNum;
extern int pciBusNum;
extern int pciDevNum;
extern int pciFuncNum;
extern PCITAG pciDeviceTag;
extern int xf86MaxPciDevs;
extern pciBusInfo_t *pciBusInfo[];
#endif /* _PCI_H */

47
hw/xfree86/os-support/bus/axpPci.c
View File

@ -229,9 +229,6 @@ axpPciInit()
pciNumBuses = bus + 1;
}
pciFindFirstFP = pciGenFindFirst;
pciFindNextFP = pciGenFindNext;
}
/*
@ -330,12 +327,11 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
pDomain->dense_mem + Base - _bus_base(), Size);
}
_X_EXPORT IOADDRESS
xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
IOADDRESS Base, unsigned long Size)
IOADDRESS
xf86MapLegacyIO(struct pci_device *dev)
{
axpDomainPtr pDomain;
int domain = PCI_DOM_FROM_TAG(Tag);
const int domain = dev->domain;
if ((domain < 0) || (domain >= pciNumDomains) ||
!(pDomain = xf86DomainInfo[domain]))
@ -346,7 +342,7 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
* base [this is ok since we also constrain sparse I/O systems to
* a single domain in axpSetupDomains()]
*/
if (pDomain->sparse_io) return Base;
if (pDomain->sparse_io) return 0;
/*
* I/O addresses on Alpha are really just different physical memory
@ -359,42 +355,11 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
* Map the entire I/O space (64kB) at once and only once.
*/
if (!pDomain->mapped_io)
pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(ScreenNum, Flags,
pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(-1, VIDMEM_MMIO,
pDomain->dense_io - _bus_base(),
0x10000);
return pDomain->mapped_io + Base;
}
_X_EXPORT int
xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf)
{
static unsigned long pagemask = 0;
unsigned char *MappedAddr;
unsigned long MapSize;
ADDRESS MapBase;
int i;
if (!pagemask) pagemask = xf86getpagesize() - 1;
/* Ensure page boundaries */
MapBase = Base & ~pagemask;
MapSize = ((Base + Len + pagemask) & ~pagemask) - MapBase;
/*
* VIDMEM_MMIO in order to get sparse mapping on sparse memory systems
* so we can use mmio functions to read (that way we can really get byte
* at a time reads on dense memory systems with byte/word instructions.
*/
MappedAddr = xf86MapDomainMemory(-1, VIDMEM_READONLY | VIDMEM_MMIO,
Tag, MapBase, MapSize);
for (i = 0; i < Len; i++) {
*Buf++ = xf86ReadMmio8(MappedAddr, Base - MapBase + i);
}
xf86UnMapVidMem(-1, MappedAddr, MapSize);
return Len;
return pDomain->mapped_io;
}
resPtr

2
hw/xfree86/os-support/bus/freebsdPci.c
View File

@ -124,8 +124,6 @@ freebsdPciInit()
pciNumBuses = 1;
pciBusInfo[0] = &freebsdPci0;
pciFindFirstFP = pciGenFindFirst;
pciFindNextFP = pciGenFindNext;
}
static CARD32

19
hw/xfree86/os-support/bus/ix86Pci.c
View File

@ -171,6 +171,7 @@
/*
* Intel x86 platform specific PCI access functions
*/
#if 0
static CARD32 ix86PciReadLongSetup(PCITAG tag, int off);
static void ix86PciWriteLongSetup(PCITAG, int off, CARD32 val);
static void ix86PciSetBitsLongSetup(PCITAG, int off, CARD32 mask, CARD32 val);
@ -180,27 +181,34 @@ static void ix86PciSetBitsLongCFG1(PCITAG, int off, CARD32 mask, CARD32 val);
static CARD32 ix86PciReadLongCFG2(PCITAG tag, int off);
static void ix86PciWriteLongCFG2(PCITAG, int off, CARD32 val);
static void ix86PciSetBitsLongCFG2(PCITAG, int off, CARD32 mask, CARD32 val);
#endif
static pciBusFuncs_t ix86Funcs0 = {
#if 0
/* pciReadLong */ ix86PciReadLongSetup,
/* pciWriteLong */ ix86PciWriteLongSetup,
/* pciSetBitsLong */ ix86PciSetBitsLongSetup,
#endif
/* pciAddrHostToBus */ pciAddrNOOP,
/* pciAddrBusToHost */ pciAddrNOOP
};
static pciBusFuncs_t ix86Funcs1 = {
#if 0
/* pciReadLong */ ix86PciReadLongCFG1,
/* pciWriteLong */ ix86PciWriteLongCFG1,
/* pciSetBitsLong */ ix86PciSetBitsLongCFG1,
#endif
/* pciAddrHostToBus */ pciAddrNOOP,
/* pciAddrBusToHost */ pciAddrNOOP
};
static pciBusFuncs_t ix86Funcs2 = {
#if 0
/* pciReadLong */ ix86PciReadLongCFG2,
/* pciWriteLong */ ix86PciWriteLongCFG2,
/* pciSetBitsLong */ ix86PciSetBitsLongCFG2,
#endif
/* pciAddrHostToBus */ pciAddrNOOP,
/* pciAddrBusToHost */ pciAddrNOOP
};
@ -218,6 +226,7 @@ static pciBusInfo_t ix86Pci0 = {
static Bool
ix86PciBusCheck(void)
{
#if 0
PCITAG tag;
CARD32 id, class;
CARD8 device;
@ -250,6 +259,7 @@ ix86PciBusCheck(void)
break;
}
}
#endif
return FALSE;
}
@ -271,12 +281,7 @@ void ix86PciSelectCfgmech(void)
* We rely on xf86Info.pciFlags to tell which mechanisms to try....
*/
switch (xf86Info.pciFlags) {
case PCIOsConfig:
#ifdef ARCH_PCI_OS_INIT
return;
#endif
case PCIProbe1:
if (!xf86EnableIO())
return;
@ -544,6 +549,7 @@ ix86PcibusTag(CARD8 bus, CARD8 cardnum, CARD8 func)
}
#endif
#if 0
static CARD32
ix86PciReadLongSetup(PCITAG Tag, int reg)
{
@ -680,6 +686,7 @@ ix86PciSetBitsLongCFG2(PCITAG Tag, int reg, CARD32 mask, CARD32 val)
outb(PCI_CFGMECH2_ENABLE_REG, 0);
outb(PCI_CFGMECH2_FORWARD_REG, 0);
}
#endif
void
ix86PciInit()
@ -687,8 +694,6 @@ ix86PciInit()
/* Initialize pciBusInfo[] array and function pointers */
pciNumBuses = 1;
pciBusInfo[0] = &ix86Pci0;
pciFindFirstFP = pciGenFindFirst;
pciFindNextFP = pciGenFindNext;
/* Make sure that there is a PCI bus present. */
ix86PciSelectCfgmech();

935
hw/xfree86/os-support/bus/linuxPci.c
View File

File diff suppressed because it is too large Load Diff

2
hw/xfree86/os-support/bus/netbsdPci.c
View File

@ -79,8 +79,6 @@ netbsdPciInit()
pciNumBuses = 1;
pciBusInfo[0] = &netbsdPci0;
pciFindFirstFP = pciGenFindFirst;
pciFindNextFP = pciGenFindNext;
/* use businfo to get the number of devs */
if (ioctl(devpci, PCI_IOC_BUSINFO, &pci_businfo) != 0)
FatalError("netbsdPciInit: not a PCI bus device");

28
hw/xfree86/os-support/bus/sparcPci.c
View File

@ -622,7 +622,7 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
}
_X_EXPORT IOADDRESS
xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
xf86MapLegacyIO(int ScreenNum, int Flags, PCITAG Tag,
IOADDRESS Base, unsigned long Size)
{
sparcDomainPtr pDomain;
@ -632,7 +632,7 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
!(pDomain = xf86DomainInfo[domain]) ||
(((unsigned long long)Base + (unsigned long long)Size) >
pDomain->io_size))
FatalError("xf86MapDomainIO() called with invalid parameters.\n");
FatalError("xf86MapLegacyIO() called with invalid parameters.\n");
/* Permanently map all of I/O space */
if (!pDomain->io) {
@ -648,30 +648,6 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
return (IOADDRESS)pDomain->io + Base;
}
_X_EXPORT int
xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf)
{
unsigned char *ptr, *src;
ADDRESS offset;
unsigned long size;
int len;
/* Ensure page boundaries */
offset = Base & ~pagemask;
size = ((Base + Len + pagemask) & ~pagemask) - offset;
ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, Tag, offset, size);
/* Using memcpy() here hangs the system */
src = ptr + (Base - offset);
for (len = Len; len-- > 0;)
*Buf++ = *src++;
xf86UnMapVidMem(-1, ptr, size);
return Len;
}
resPtr
xf86BusAccWindowsFromOS(void)
{

547
hw/xfree86/os-support/bus/xf86Pci.h
View File

@ -106,8 +106,7 @@
#include <X11/Xarch.h>
#include <X11/Xfuncproto.h>
#include "misc.h"
#define PCI_NOT_FOUND 0xFFFFFFFFU
#include <pciaccess.h>
/*
* PCI cfg space definitions (e.g. stuff right out of the PCI spec)
@ -172,19 +171,6 @@
#define PCI_SUBCLASS_PREHISTORIC_MISC 0x00
#define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
/* 0x01 mass storage subclasses */
#define PCI_SUBCLASS_MASS_STORAGE_SCSI 0x00
#define PCI_SUBCLASS_MASS_STORAGE_IDE 0x01
#define PCI_SUBCLASS_MASS_STORAGE_FLOPPY 0x02
#define PCI_SUBCLASS_MASS_STORAGE_IPI 0x03
#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80
/* 0x02 network subclasses */
#define PCI_SUBCLASS_NETWORK_ETHERNET 0x00
#define PCI_SUBCLASS_NETWORK_TOKENRING 0x01
#define PCI_SUBCLASS_NETWORK_FDDI 0x02
#define PCI_SUBCLASS_NETWORK_MISC 0x80
/* 0x03 display subclasses */
#define PCI_SUBCLASS_DISPLAY_VGA 0x00
#define PCI_SUBCLASS_DISPLAY_XGA 0x01
@ -195,11 +181,6 @@
#define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x01
#define PCI_SUBCLASS_MULTIMEDIA_MISC 0x80
/* 0x05 memory subclasses */
#define PCI_SUBCLASS_MEMORY_RAM 0x00
#define PCI_SUBCLASS_MEMORY_FLASH 0x01
#define PCI_SUBCLASS_MEMORY_MISC 0x80
/* 0x06 bridge subclasses */
#define PCI_SUBCLASS_BRIDGE_HOST 0x00
#define PCI_SUBCLASS_BRIDGE_ISA 0x01
@ -213,33 +194,6 @@
#define PCI_SUBCLASS_BRIDGE_MISC 0x80
#define PCI_IF_BRIDGE_PCI_SUBTRACTIVE 0x01
/* 0x07 communications controller subclasses */
#define PCI_SUBCLASS_COMMUNICATIONS_SERIAL 0x00
#define PCI_SUBCLASS_COMMUNICATIONS_PARALLEL 0x01
#define PCI_SUBCLASS_COMMUNICATIONS_MULTISERIAL 0x02
#define PCI_SUBCLASS_COMMUNICATIONS_MODEM 0x03
#define PCI_SUBCLASS_COMMUNICATIONS_MISC 0x80
/* 0x08 generic system peripherals subclasses */
#define PCI_SUBCLASS_SYSPERIPH_PIC 0x00
#define PCI_SUBCLASS_SYSPERIPH_DMA 0x01
#define PCI_SUBCLASS_SYSPERIPH_TIMER 0x02
#define PCI_SUBCLASS_SYSPERIPH_RTC 0x03
#define PCI_SUBCLASS_SYSPERIPH_HOTPCI 0x04
#define PCI_SUBCLASS_SYSPERIPH_MISC 0x80
/* 0x09 input device subclasses */
#define PCI_SUBCLASS_INPUT_KEYBOARD 0x00
#define PCI_SUBCLASS_INPUT_DIGITIZER 0x01
#define PCI_SUBCLASS_INPUT_MOUSE 0x02
#define PCI_SUBCLASS_INPUT_SCANNER 0x03
#define PCI_SUBCLASS_INPUT_GAMEPORT 0x04
#define PCI_SUBCLASS_INPUT_MISC 0x80
/* 0x0a docking station subclasses */
#define PCI_SUBCLASS_DOCKING_GENERIC 0x00
#define PCI_SUBCLASS_DOCKING_MISC 0x80
/* 0x0b processor subclasses */
#define PCI_SUBCLASS_PROCESSOR_386 0x00
#define PCI_SUBCLASS_PROCESSOR_486 0x01
@ -249,101 +203,6 @@
#define PCI_SUBCLASS_PROCESSOR_MIPS 0x30
#define PCI_SUBCLASS_PROCESSOR_COPROC 0x40
/* 0x0c serial bus controller subclasses */
#define PCI_SUBCLASS_SERIAL_FIREWIRE 0x00
#define PCI_SUBCLASS_SERIAL_ACCESS 0x01
#define PCI_SUBCLASS_SERIAL_SSA 0x02
#define PCI_SUBCLASS_SERIAL_USB 0x03
#define PCI_SUBCLASS_SERIAL_FIBRECHANNEL 0x04
#define PCI_SUBCLASS_SERIAL_SMBUS 0x05
/* 0x0d wireless controller subclasses */
#define PCI_SUBCLASS_WIRELESS_IRDA 0x00
#define PCI_SUBCLASS_WIRELESS_CONSUMER_IR 0x01
#define PCI_SUBCLASS_WIRELESS_RF 0x02
#define PCI_SUBCLASS_WIRELESS_MISC 0x80
/* 0x0e intelligent I/O controller subclasses */
#define PCI_SUBCLASS_I2O_I2O 0x00
/* 0x0f satellite communications controller subclasses */
#define PCI_SUBCLASS_SATELLITE_TV 0x01
#define PCI_SUBCLASS_SATELLITE_AUDIO 0x02
#define PCI_SUBCLASS_SATELLITE_VOICE 0x03
#define PCI_SUBCLASS_SATELLITE_DATA 0x04
/* 0x10 encryption/decryption controller subclasses */
#define PCI_SUBCLASS_CRYPT_NET_COMPUTING 0x00
#define PCI_SUBCLASS_CRYPT_ENTERTAINMENT 0x10
#define PCI_SUBCLASS_CRYPT_MISC 0x80
/* 0x11 data acquisition and signal processing controller subclasses */
#define PCI_SUBCLASS_DATAACQ_DPIO 0x00
#define PCI_SUBCLASS_DATAACQ_MISC 0x80
/* Header */
#define PCI_HEADER_MISC 0x0c
#define PCI_HEADER_MULTIFUNCTION 0x00800000
/* Interrupt configration register */
#define PCI_INTERRUPT_REG 0x3c
#define PCI_INTERRUPT_PIN_MASK 0x0000ff00
#define PCI_INTERRUPT_PIN_EXTRACT(x) \
((((x) & PCI_INTERRUPT_PIN_MASK) >> 8) & 0xff)
#define PCI_INTERRUPT_PIN_NONE 0x00
#define PCI_INTERRUPT_PIN_A 0x01
#define PCI_INTERRUPT_PIN_B 0x02
#define PCI_INTERRUPT_PIN_C 0x03
#define PCI_INTERRUPT_PIN_D 0x04
#define PCI_INTERRUPT_LINE_MASK 0x000000ff
#define PCI_INTERRUPT_LINE_EXTRACT(x) \
((((x) & PCI_INTERRUPT_LINE_MASK) >> 0) & 0xff)
#define PCI_INTERRUPT_LINE_INSERT(x,v) \
(((x) & ~PCI_INTERRUPT_LINE_MASK) | ((v) << 0))
/* Base registers */
#define PCI_MAP_REG_START 0x10
#define PCI_MAP_REG_END 0x28
#define PCI_MAP_ROM_REG 0x30
#define PCI_MAP_MEMORY 0x00000000
#define PCI_MAP_IO 0x00000001
#define PCI_MAP_MEMORY_TYPE 0x00000007
#define PCI_MAP_IO_TYPE 0x00000003
#define PCI_MAP_MEMORY_TYPE_32BIT 0x00000000
#define PCI_MAP_MEMORY_TYPE_32BIT_1M 0x00000002
#define PCI_MAP_MEMORY_TYPE_64BIT 0x00000004
#define PCI_MAP_MEMORY_TYPE_MASK 0x00000006
#define PCI_MAP_MEMORY_CACHABLE 0x00000008
#define PCI_MAP_MEMORY_ATTR_MASK 0x0000000e
#define PCI_MAP_MEMORY_ADDRESS_MASK 0xfffffff0
#define PCI_MAP_IO_ATTR_MASK 0x00000003
#define PCI_MAP_IS_IO(b) ((b) & PCI_MAP_IO)
#define PCI_MAP_IS_MEM(b) (!PCI_MAP_IS_IO(b))
#define PCI_MAP_IS64BITMEM(b) \
(((b) & PCI_MAP_MEMORY_TYPE) == PCI_MAP_MEMORY_TYPE_64BIT)
#define PCIGETMEMORY(b) ((b) & PCI_MAP_MEMORY_ADDRESS_MASK)
#define PCIGETMEMORY64HIGH(b) (*((CARD32*)&(b) + 1))
#define PCIGETMEMORY64(b) \
(PCIGETMEMORY(b) | ((CARD64)PCIGETMEMORY64HIGH(b) << 32))
#define PCI_MAP_IO_ADDRESS_MASK 0xfffffffc
#define PCIGETIO(b) ((b) & PCI_MAP_IO_ADDRESS_MASK)
#define PCI_MAP_ROM_DECODE_ENABLE 0x00000001
#define PCI_MAP_ROM_ADDRESS_MASK 0xfffff800
#define PCIGETROM(b) ((b) & PCI_MAP_ROM_ADDRESS_MASK)
/* PCI-PCI bridge mapping registers */
#define PCI_PCI_BRIDGE_BUS_REG 0x18
#define PCI_SUBORDINATE_BUS_MASK 0x00ff0000
@ -354,12 +213,6 @@
#define PCI_PCI_BRIDGE_MEM_REG 0x20
#define PCI_PCI_BRIDGE_PMEM_REG 0x24
#define PCI_PPB_IOBASE_EXTRACT(x) (((x) << 8) & 0xFF00)
#define PCI_PPB_IOLIMIT_EXTRACT(x) (((x) << 0) & 0xFF00)
#define PCI_PPB_MEMBASE_EXTRACT(x) (((x) << 16) & 0xFFFF0000)
#define PCI_PPB_MEMLIMIT_EXTRACT(x) (((x) << 0) & 0xFFFF0000)
#define PCI_PCI_BRIDGE_CONTROL_REG 0x3E
#define PCI_PCI_BRIDGE_PARITY_EN 0x01
#define PCI_PCI_BRIDGE_SERR_EN 0x02
@ -368,31 +221,6 @@
#define PCI_PCI_BRIDGE_MASTER_ABORT_EN 0x20
#define PCI_PCI_BRIDGE_SECONDARY_RESET 0x40
#define PCI_PCI_BRIDGE_FAST_B2B_EN 0x80
/* header type 2 extensions */
#define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */
#define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
#define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400
#define PCI_CB_SEC_STATUS_REG 0x16 /* Secondary status */
#define PCI_CB_PRIMARY_BUS_REG 0x18 /* PCI bus number */
#define PCI_CB_CARD_BUS_REG 0x19 /* CardBus bus number */
#define PCI_CB_SUBORDINATE_BUS_REG 0x1a /* Subordinate bus number */
#define PCI_CB_LATENCY_TIMER_REG 0x1b /* CardBus latency timer */
#define PCI_CB_MEM_BASE_0_REG 0x1c
#define PCI_CB_MEM_LIMIT_0_REG 0x20
#define PCI_CB_MEM_BASE_1_REG 0x24
#define PCI_CB_MEM_LIMIT_1_REG 0x28
#define PCI_CB_IO_BASE_0_REG 0x2c
#define PCI_CB_IO_LIMIT_0_REG 0x30
#define PCI_CB_IO_BASE_1_REG 0x34
#define PCI_CB_IO_LIMIT_1_REG 0x38
#define PCI_CB_BRIDGE_CONTROL_REG 0x3E
#define PCI_CB_IO_RANGE_MASK ~0x03
#define PCI_CB_IOBASE(x) (x & PCI_CB_IO_RANGE_MASK)
#define PCI_CB_IOLIMIT(x) ((x & PCI_CB_IO_RANGE_MASK) + 3)
/* Subsystem identification register */
#define PCI_SUBSYSTEM_ID_REG 0x2c
@ -410,258 +238,6 @@ typedef unsigned long ADDRESS; /* Memory/PCI address */
typedef unsigned long IOADDRESS; /* Must be large enough for a pointer */
typedef unsigned long PCITAG;
/*
* PCI configuration space
*/
typedef struct pci_cfg_regs {
/* start of official PCI config space header */
union { /* Offset 0x0 - 0x3 */
CARD32 device_vendor;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 device;
CARD16 vendor;
#else
CARD16 vendor;
CARD16 device;
#endif
} dv;
} dv_id;
union { /* Offset 0x4 - 0x8 */
CARD32 status_command;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 status;
CARD16 command;
#else
CARD16 command;
CARD16 status;
#endif
} sc;
} stat_cmd;
union { /* Offset 0x8 - 0xb */
CARD32 class_revision;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD8 base_class;
CARD8 sub_class;
CARD8 prog_if;
CARD8 rev_id;
#else
CARD8 rev_id;
CARD8 prog_if;
CARD8 sub_class;
CARD8 base_class;
#endif
} cr;
} class_rev;
union { /* Offset 0xc - 0xf */
CARD32 bist_header_latency_cache;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD8 bist;
CARD8 header_type;
CARD8 latency_timer;
CARD8 cache_line_size;
#else
CARD8 cache_line_size;
CARD8 latency_timer;
CARD8 header_type;
CARD8 bist;
#endif
} bhlc;
} bhlc;
union { /* Offset 0x10 - 0x3b */
struct { /* header type 2 */
CARD32 cg_rsrvd1; /* 0x10 */
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 secondary_status; /* 0x16 */
CARD16 cg_rsrvd2; /* 0x14 */
union {
CARD32 cg_bus_reg;
struct {
CARD8 latency_timer; /* 0x1b */
CARD8 subordinate_bus_number; /* 0x1a */
CARD8 cardbus_bus_number; /* 0x19 */
CARD8 primary_bus_number; /* 0x18 */
} cgbr;
} cgbr;
#else
CARD16 cg_rsrvd2; /* 0x14 */
CARD16 secondary_status; /* 0x16 */
union {
CARD32 cg_bus_reg;
struct {
CARD8 primary_bus_number; /* 0x18 */
CARD8 cardbus_bus_number; /* 0x19 */
CARD8 subordinate_bus_number; /* 0x1a */
CARD8 latency_timer; /* 0x1b */
} cgbr;
} cgbr;
#endif
CARD32 mem_base0; /* 0x1c */
CARD32 mem_limit0; /* 0x20 */
CARD32 mem_base1; /* 0x24 */
CARD32 mem_limit1; /* 0x28 */
CARD32 io_base0; /* 0x2c */
CARD32 io_limit0; /* 0x30 */
CARD32 io_base1; /* 0x34 */
CARD32 io_limit1; /* 0x38 */
} cg;
struct {
union { /* Offset 0x10 - 0x27 */
struct { /* header type 0 */
CARD32 dv_base0;
CARD32 dv_base1;
CARD32 dv_base2;
CARD32 dv_base3;
CARD32 dv_base4;
CARD32 dv_base5;
} dv;
struct { /* header type 1 */
CARD32 bg_rsrvd[2];
#if X_BYTE_ORDER == X_BIG_ENDIAN
union {
CARD32 pp_bus_reg;
struct {
CARD8 secondary_latency_timer;
CARD8 subordinate_bus_number;
CARD8 secondary_bus_number;
CARD8 primary_bus_number;
} ppbr;
} ppbr;
CARD16 secondary_status;
CARD8 io_limit;
CARD8 io_base;
CARD16 mem_limit;
CARD16 mem_base;
CARD16 prefetch_mem_limit;
CARD16 prefetch_mem_base;
#else
union {
CARD32 pp_bus_reg;
struct {
CARD8 primary_bus_number;
CARD8 secondary_bus_number;
CARD8 subordinate_bus_number;
CARD8 secondary_latency_timer;
} ppbr;
} ppbr;
CARD8 io_base;
CARD8 io_limit;
CARD16 secondary_status;
CARD16 mem_base;
CARD16 mem_limit;
CARD16 prefetch_mem_base;
CARD16 prefetch_mem_limit;
#endif
} bg;
} bc;
union { /* Offset 0x28 - 0x2b */
CARD32 rsvd1;
CARD32 pftch_umem_base;
CARD32 cardbus_cis_ptr;
} um_c_cis;
union { /* Offset 0x2c - 0x2f */
CARD32 subsys_card_vendor;
CARD32 pftch_umem_limit;
CARD32 rsvd2;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 subsys_card;
CARD16 subsys_vendor;
#else
CARD16 subsys_vendor;
CARD16 subsys_card;
#endif
} ssys;
} um_ssys_id;
union { /* Offset 0x30 - 0x33 */
CARD32 baserom;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 io_ulimit;
CARD16 io_ubase;
#else
CARD16 io_ubase;
CARD16 io_ulimit;
#endif
} b_u_io;
} uio_rom;
struct {
CARD32 rsvd3; /* Offset 0x34 - 0x37 */
CARD32 rsvd4; /* Offset 0x38 - 0x3b */
} rsvd;
} cd;
} cx;
union { /* Offset 0x3c - 0x3f */
union { /* header type 0 */
CARD32 max_min_ipin_iline;
struct {
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD8 max_lat;
CARD8 min_gnt;
CARD8 int_pin;
CARD8 int_line;
#else
CARD8 int_line;
CARD8 int_pin;
CARD8 min_gnt;
CARD8 max_lat;
#endif
} mmii;
} mmii;
struct { /* header type 1 */
#if X_BYTE_ORDER == X_BIG_ENDIAN
CARD16 bridge_control; /* upper 8 bits reserved */
CARD8 rsvd2;
CARD8 rsvd1;
#else
CARD8 rsvd1;
CARD8 rsvd2;
CARD16 bridge_control; /* upper 8 bits reserved */
#endif
} bctrl;
} bm;
union { /* Offset 0x40 - 0xff */
CARD32 dwords[48];
CARD8 bytes[192];
} devspf;
} pciCfgRegs;
typedef union pci_cfg_spc {
pciCfgRegs regs;
CARD32 dwords[256/sizeof(CARD32)];
CARD8 bytes[256/sizeof(CARD8)];
} pciCfgSpc;
/*
* Data structure returned by xf86scanpci including contents of
* PCI config space header
*/
typedef struct pci_device {
PCITAG tag;
int busnum;
int devnum;
int funcnum;
pciCfgSpc cfgspc;
int basesize[7]; /* number of bits in base addr allocations */
Bool minBasesize;
pointer businfo; /* pointer to secondary's bus info structure */
Bool fakeDevice; /* Device added by system chipset support */
} pciDevice, *pciConfigPtr;
typedef enum {
PCI_MEM,
PCI_MEM_SIZE,
@ -673,130 +249,17 @@ typedef enum {
PCI_IO_SPARSE_MASK
} PciAddrType;
#define pci_device_vendor cfgspc.regs.dv_id.device_vendor
#define pci_vendor cfgspc.regs.dv_id.dv.vendor
#define pci_device cfgspc.regs.dv_id.dv.device
#define pci_status_command cfgspc.regs.stat_cmd.status_command
#define pci_command cfgspc.regs.stat_cmd.sc.command
#define pci_status cfgspc.regs.stat_cmd.sc.status
#define pci_class_revision cfgspc.regs.class_rev.class_revision
#define pci_rev_id cfgspc.regs.class_rev.cr.rev_id
#define pci_prog_if cfgspc.regs.class_rev.cr.prog_if
#define pci_sub_class cfgspc.regs.class_rev.cr.sub_class
#define pci_base_class cfgspc.regs.class_rev.cr.base_class
#define pci_bist_header_latency_cache cfgspc.regs.bhlc.bist_header_latency_cache
#define pci_cache_line_size cfgspc.regs.bhlc.bhlc.cache_line_size
#define pci_latency_timer cfgspc.regs.bhlc.bhlc.latency_timer
#define pci_header_type cfgspc.regs.bhlc.bhlc.header_type
#define pci_bist cfgspc.regs.bhlc.bhlc.bist
#define pci_cb_secondary_status cfgspc.regs.cx.cg.secondary_status
#define pci_cb_bus_register cfgspc.regs.cx.cg.cgbr.cg_bus_reg
#define pci_cb_primary_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.primary_bus_number
#define pci_cb_cardbus_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.cardbus_bus_number
#define pci_cb_subordinate_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.subordinate_bus_number
#define pci_cb_latency_timer cfgspc.regs.cx.cg.cgbr.cgbr.latency_timer
#define pci_cb_membase0 cfgspc.regs.cx.cg.mem_base0
#define pci_cb_memlimit0 cfgspc.regs.cx.cg.mem_limit0
#define pci_cb_membase1 cfgspc.regs.cx.cg.mem_base1
#define pci_cb_memlimit1 cfgspc.regs.cx.cg.mem_limit1
#define pci_cb_iobase0 cfgspc.regs.cx.cg.io_base0
#define pci_cb_iolimit0 cfgspc.regs.cx.cg.io_limit0
#define pci_cb_iobase1 cfgspc.regs.cx.cg.io_base1
#define pci_cb_iolimit1 cfgspc.regs.cx.cg.io_limit1
#define pci_base0 cfgspc.regs.cx.cd.bc.dv.dv_base0
#define pci_base1 cfgspc.regs.cx.cd.bc.dv.dv_base1
#define pci_base2 cfgspc.regs.cx.cd.bc.dv.dv_base2
#define pci_base3 cfgspc.regs.cx.cd.bc.dv.dv_base3
#define pci_base4 cfgspc.regs.cx.cd.bc.dv.dv_base4
#define pci_base5 cfgspc.regs.cx.cd.bc.dv.dv_base5
#define pci_cardbus_cis_ptr cfgspc.regs.cx.cd.umem_c_cis.cardbus_cis_ptr
#define pci_subsys_card_vendor cfgspc.regs.cx.cd.um_ssys_id.subsys_card_vendor
#define pci_subsys_vendor cfgspc.regs.cx.cd.um_ssys_id.ssys.subsys_vendor
#define pci_subsys_card cfgspc.regs.cx.cd.um_ssys_id.ssys.subsys_card
#define pci_baserom cfgspc.regs.cx.cd.uio_rom.baserom
#define pci_pp_bus_register cfgspc.regs.cx.cd.bc.bg.ppbr.pp_bus_reg
#define pci_primary_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.primary_bus_number
#define pci_secondary_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.secondary_bus_number
#define pci_subordinate_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.subordinate_bus_number
#define pci_secondary_latency_timer cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.secondary_latency_timer
#define pci_io_base cfgspc.regs.cx.cd.bc.bg.io_base
#define pci_io_limit cfgspc.regs.cx.cd.bc.bg.io_limit
#define pci_secondary_status cfgspc.regs.cx.cd.bc.bg.secondary_status
#define pci_mem_base cfgspc.regs.cx.cd.bc.bg.mem_base
#define pci_mem_limit cfgspc.regs.cx.cd.bc.bg.mem_limit
#define pci_prefetch_mem_base cfgspc.regs.cx.cd.bc.bg.prefetch_mem_base
#define pci_prefetch_mem_limit cfgspc.regs.cx.cd.bc.bg.prefetch_mem_limit
#define pci_rsvd1 cfgspc.regs.cx.cd.um_c_cis.rsvd1
#define pci_rsvd2 cfgspc.regs.cx.cd.um_ssys_id.rsvd2
#define pci_prefetch_upper_mem_base cfgspc.regs.cx.cd.um_c_cis.pftch_umem_base
#define pci_prefetch_upper_mem_limit cfgspc.regs.cx.cd.um_ssys_id.pftch_umem_limit
#define pci_upper_io_base cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ubase
#define pci_upper_io_limit cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ulimit
#define pci_int_line cfgspc.regs.bm.mmii.mmii.int_line
#define pci_int_pin cfgspc.regs.bm.mmii.mmii.int_pin
#define pci_min_gnt cfgspc.regs.bm.mmii.mmii.min_gnt
#define pci_max_lat cfgspc.regs.bm.mmii.mmii.max_lat
#define pci_max_min_ipin_iline cfgspc.regs.bm.mmii.max_min_ipin_iline
#define pci_bridge_control cfgspc.regs.bm.bctrl.bridge_control
#define pci_user_config cfgspc.regs.devspf.dwords[0]
#define pci_user_config_0 cfgspc.regs.devspf.bytes[0]
#define pci_user_config_1 cfgspc.regs.devspf.bytes[1]
#define pci_user_config_2 cfgspc.regs.devspf.bytes[2]
#define pci_user_config_3 cfgspc.regs.devspf.bytes[3]
typedef enum {
PCI_BIOS_PC = 0,
PCI_BIOS_OPEN_FIRMWARE,
PCI_BIOS_HP_PA_RISC,
PCI_BIOS_OTHER
} PciBiosType;
/* Public PCI access functions */
void pciInit(void);
PCITAG pciFindFirst(CARD32 id, CARD32 mask);
PCITAG pciFindNext(void);
CARD32 pciReadLong(PCITAG tag, int offset);
CARD16 pciReadWord(PCITAG tag, int offset);
CARD8 pciReadByte(PCITAG tag, int offset);
void pciWriteLong(PCITAG tag, int offset, CARD32 val);
void pciWriteWord(PCITAG tag, int offset, CARD16 val);
void pciWriteByte(PCITAG tag, int offset, CARD8 val);
void pciSetBitsLong(PCITAG tag, int offset, CARD32 mask, CARD32 val);
void pciSetBitsByte(PCITAG tag, int offset, CARD8 mask, CARD8 val);
ADDRESS pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr);
ADDRESS pciHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr);
PCITAG pciTag(int busnum, int devnum, int funcnum);
PCITAG pciDomTag(int domnum, int busnum, int devnum, int funcnum);
int pciGetBaseSize(PCITAG tag, int indx, Bool destructive, Bool *min);
CARD32 pciCheckForBrokenBase(PCITAG tag,int basereg);
pointer xf86MapPciMem(int ScreenNum, int Flags, PCITAG Tag,
ADDRESS Base, unsigned long Size);
int xf86ReadPciBIOS(unsigned long Offset, PCITAG Tag, int basereg,
unsigned char *Buf, int Len);
pciConfigPtr *xf86scanpci(int flags);
pciConfigPtr xf86GetPciConfigFromTag(PCITAG Tag);
Bool xf86scanpci(void);
extern int pciNumBuses;
/* Domain access functions. Some of these probably shouldn't be public */
int xf86GetPciDomain(PCITAG tag);
pointer xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
ADDRESS Base, unsigned long Size);
IOADDRESS xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
IOADDRESS Base, unsigned long Size);
int xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len,
unsigned char *Buf);
typedef enum {
ROM_BASE_PRESET = -2,
ROM_BASE_BIOS,
ROM_BASE_MEM0 = 0,
ROM_BASE_MEM1,
ROM_BASE_MEM2,
ROM_BASE_MEM3,
ROM_BASE_MEM4,
ROM_BASE_MEM5,
ROM_BASE_FIND
} romBaseSource;
pointer xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev,
ADDRESS Base, unsigned long Size);
IOADDRESS xf86MapLegacyIO(struct pci_device *dev);
#endif /* _XF86PCI_H */

8
hw/xfree86/os-support/bus/zx1PCI.c
View File

@ -1073,13 +1073,13 @@ xf86PostScanZX1(void)
xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
"ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n",
pPCI->busnum, pPCI->devnum, pPCI->funcnum,
pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id,
pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_rev_id,
pPCI->pci_base_class, pPCI->pci_sub_class);
#else
xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x"
" card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n",
pPCI->busnum, pPCI->devnum, pPCI->funcnum,
pPCI->pci_vendor, pPCI->pci_device,
pPCI->pci_vendor, pPCI->_pci_device,
pPCI->pci_subsys_vendor, pPCI->pci_subsys_card,
pPCI->pci_rev_id, pPCI->pci_base_class,
pPCI->pci_sub_class, pPCI->pci_prog_if,
@ -1122,13 +1122,13 @@ xf86PostScanZX1(void)
xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
"ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n",
pPCI->busnum, pPCI->devnum, pPCI->funcnum,
pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id,
pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_rev_id,
pPCI->pci_base_class, pPCI->pci_sub_class);
#else
xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x"
" card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n",
pPCI->busnum, pPCI->devnum, pPCI->funcnum,
pPCI->pci_vendor, pPCI->pci_device,
pPCI->pci_vendor, pPCI->_pci_device,
pPCI->pci_subsys_vendor, pPCI->pci_subsys_card,
pPCI->pci_rev_id, pPCI->pci_base_class,
pPCI->pci_sub_class, pPCI->pci_prog_if,

18
hw/xfree86/os-support/linux/int10/linux.c
View File

@ -89,7 +89,6 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
memType cs;
legacyVGARec vga;
Bool videoBiosMapped = FALSE;
pciVideoPtr pvp;
if (int10Generation != serverGeneration) {
counter = 0;
@ -151,8 +150,8 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
pInt = (xf86Int10InfoPtr)xnfcalloc(1, sizeof(xf86Int10InfoRec));
pInt->scrnIndex = screen;
pInt->entityIndex = entityIndex;
pvp = xf86GetPciInfoForEntity(entityIndex);
if (pvp) pInt->Tag = pciTag(pvp->bus, pvp->device, pvp->func);
pInt->dev = xf86GetPciInfoForEntity(entityIndex);
if (!xf86Int10ExecSetup(pInt))
goto error0;
pInt->mem = &linuxMem;
@ -275,12 +274,17 @@ xf86ExtendedInitInt10(int entityIndex, int Flags)
switch (location_type) {
case BUS_PCI: {
const int pci_entity = pInt->entityIndex;
if (!mapPciRom(pci_entity, (unsigned char *)(V_BIOS))) {
xf86DrvMsg(screen, X_ERROR, "Cannot read V_BIOS\n");
int err;
struct pci_device *rom_device =
xf86GetPciInfoForEntity(pInt->entityIndex);
err = pci_device_read_rom(rom_device, (unsigned char *)(V_BIOS));
if (err) {
xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (%s)\n",
strerror(err));
goto error3;
}
pInt->BIOSseg = V_BIOS >> 4;
break;
}

2
hw/xfree86/os-support/linux/lnx_axp.c
View File

@ -183,7 +183,7 @@ _alpha_iobase_query(unsigned flags, int hose, int bus, int devfn)
/*
* Only take over the inx/outx functions if this is a dense I/O
* system *and* addressing domains are being used. The dense I/O
* routines expect I/O to be mapped (as done in xf86MapDomainIO)
* routines expect I/O to be mapped (as done in xf86MapLegacyIO)
*/
_alpha_outb = _dense_outb;
_alpha_outw = _dense_outw;

44
hw/xfree86/os-support/linux/lnx_pci.c
View File

@ -13,6 +13,7 @@
#define XF86_OS_PRIVS
#include "xf86_OSproc.h"
#include "xf86Pci.h"
#include "Pci.h"
#ifdef __sparc__
#define PCIADDR_TYPE long long
@ -162,8 +163,8 @@ xf86GetPciSizeFromOS(PCITAG tag, int index, int* bits)
return FALSE;
for (device = xf86OSLinuxPCIDevs; device; device = device->next) {
if (tag == pciDomTag (device->domain, device->bus,
device->dev, device->fn)) {
if (tag == PCI_MAKE_TAG(PCI_MAKE_BUS(device->domain, device->bus),
device->dev, device->fn)) {
if (device->size[index] != 0) {
Size = device->size[index] - ((PCIADDR_TYPE) 1);
while (Size & ((PCIADDR_TYPE) 0x01)) {
@ -197,8 +198,8 @@ xf86GetPciOffsetFromOS(PCITAG tag, int index, unsigned long* bases)
return FALSE;
for (device = xf86OSLinuxPCIDevs; device; device = device->next) {
if (tag == pciDomTag (device->domain, device->bus,
device->dev, device->fn)) {
if (tag == PCI_MAKE_TAG(PCI_MAKE_BUS(device->domain, device->bus),
device->dev, device->fn)) {
/* return the offset for the index requested */
*bases = device->offset[index];
return TRUE;
@ -215,6 +216,7 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base)
{
unsigned int ndx;
struct pci_dev *device;
struct pci_device *dev;
if (!xf86OSLinuxPCIDevs) {
xf86OSLinuxPCIDevs = xf86OSLinuxGetPciDevs();
@ -224,25 +226,31 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base)
}
for (device = xf86OSLinuxPCIDevs; device; device = device->next) {
if (tag == pciDomTag (device->domain, device->bus,
device->dev, device->fn)) {
dev = pci_device_find_by_slot(device->domain, device->bus,
device->dev, device->fn);
if (dev != NULL) {
/* ok now look through all the BAR values of this device */
pciConfigPtr pDev = xf86GetPciConfigFromTag(tag);
for (ndx=0; ndx<7; ndx++) {
unsigned long savePtr, flagMask;
if (ndx == 6)
savePtr = pDev->pci_baserom;
else /* this the ROM bar */
savePtr = (&pDev->pci_base0)[ndx];
/* Ignore unset base addresses. The kernel may
* have reported non-zero size and address even
* if they are disabled (e.g. disabled ROM BAR).
uint32_t savePtr;
uint32_t flagMask;
/* The ROM BAR isn't with the other BARs.
*/
const pciaddr_t offset = (ndx == 6)
? (4 * 12) : (4 * ndx) + 16;
pci_device_cfg_read_u32(dev, &savePtr, offset);
/* Ignore unset base addresses. The kernel may have reported
* non-zero size and address even if they are disabled (e.g.,
* disabled ROM BAR).
*/
if (savePtr == 0)
continue;
/* Remove memory attribute bits, different for IO
* and memory ranges. */
* and memory ranges.
*/
flagMask = (savePtr & 0x1) ? ~0x3UL : ~0xFUL;
savePtr &= flagMask;
@ -252,7 +260,7 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base)
}
}
}
};
}
return 0;
}

2
hw/xfree86/os-support/shared/ia64Pci.c
View File

@ -55,7 +55,7 @@
* space of a given PCI domain; reads and writes are used to do port I/O.
* The file descriptor for the file is stored in the upper bits of the
* value passed in by the caller, and is created and populated by
* xf86MapDomainIO.
* xf86MapLegacyIO.
*
* If the legacy_io interface doesn't exist, we fall back to the glibc in/out
* routines, which are prefixed by an underscore (e.g. _outb).

32
hw/xfree86/scanpci/Makefile.am
View File

@ -1,32 +0,0 @@
module_LTLIBRARIES = libscanpci.la libpcidata.la
libpcidata_la_LDFLAGS = -avoid-version
libscanpci_la_LDFLAGS = -avoid-version
libpcidata_la_SOURCES = xf86PciData.c
libscanpci_la_SOURCES = xf86ScanPci.c
INCLUDES = $(XORG_INCS)
AM_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS)
BUILT_SOURCES = xf86PciIds.h
EXTRA_DIST = \
xf86PciData.h \
xf86PciIds.h \
xf86PciStdIds.h \
xf86PciStr.h \
xf86ScanPci.h \
pci.ids \
extrapci.ids \
pciid2c.pl
xf86PciData.c:
echo "#define PCIDATA" > $@
echo "#include \"$(srcdir)/xf86ScanPci.c\"" >> $@
xf86PciIds.h: $(srcdir)/../common/xf86PciInfo.h
cat $(srcdir)/pci.ids $(srcdir)/extrapci.ids | $(PERL) $(srcdir)/pciid2c.pl $(srcdir)/../common/xf86PciInfo.h > xf86PciIds.h
DISTCLEANFILES = xf86PciData.c xf86PciIds.h

69
hw/xfree86/scanpci/xf86PciData.h
View File

@ -1,69 +0,0 @@
/*
* Copyright (c) 2000-2002 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
#ifndef PCI_DATA_H_
#define PCI_DATA_H_
#define NOVENDOR 0xFFFF
#define NODEVICE 0xFFFF
#define NOSUBSYS 0xFFFF
typedef Bool (*ScanPciSetupProcPtr)(void);
typedef void (*ScanPciCloseProcPtr)(void);
typedef int (*ScanPciFindByDeviceProcPtr)(
unsigned short vendor, unsigned short device,
unsigned short svendor, unsigned short subsys,
const char **vname, const char **dname,
const char **svname, const char **sname);
typedef int (*ScanPciFindBySubsysProcPtr)(
unsigned short svendor, unsigned short subsys,
const char **svname, const char **sname);
/*
* Whoever loads this module needs to define these and initialise them
* after loading.
*/
extern ScanPciSetupProcPtr xf86SetupPciIds;
extern ScanPciCloseProcPtr xf86ClosePciIds;
extern ScanPciFindByDeviceProcPtr xf86FindPciNamesByDevice;
extern ScanPciFindBySubsysProcPtr xf86FindPciNamesBySubsys;
Bool ScanPciSetupPciIds(void);
void ScanPciClosePciIds(void);
int ScanPciFindPciNamesByDevice(unsigned short vendor, unsigned short device,
unsigned short svendor, unsigned short subsys,
const char **vname, const char **dname,
const char **svname, const char **sname);
int ScanPciFindPciNamesBySubsys(unsigned short svendor, unsigned short subsys,
const char **svname, const char **sname);
#endif

66
hw/xfree86/scanpci/xf86PciStr.h
View File

@ -1,66 +0,0 @@
/*
* Copyright (c) 2002 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
/*
* Structs used to hold the pre-parsed pci.ids data. These are private
* to the scanpci and pcidata modules.
*/
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
#ifndef _XF86_PCISTR_H
#define _XF86_PCISTR_H
typedef struct {
unsigned short VendorID;
unsigned short SubsystemID;
const char *SubsystemName;
unsigned short class;
} pciSubsystemInfo;
typedef struct {
unsigned short DeviceID;
const char *DeviceName;
const pciSubsystemInfo **Subsystem;
unsigned short class;
} pciDeviceInfo;
typedef struct {
unsigned short VendorID;
const char *VendorName;
const pciDeviceInfo **Device;
} pciVendorInfo;
typedef struct {
unsigned short VendorID;
const char *VendorName;
const pciSubsystemInfo **Subsystem;
} pciVendorSubsysInfo;
#endif /* _XF86_PCISTR_H */

346
hw/xfree86/scanpci/xf86ScanPci.c
View File

@ -1,346 +0,0 @@
/*
* Display the Subsystem Vendor Id and Subsystem Id in order to identify
* the cards installed in this computer
*
* A lot of this comes from Robin Cutshaw's scanpci
*
*/
/*
* Copyright (c) 1995-2002 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
/*
* This file is used to build both the scanpci and pcidata modules.
* The interfaces have changed compared with XFree86 4.2.0 and earlier.
* The data is no longer exported directly. Lookup functions are provided.
* This means that the data format can change in the future without affecting
* the exported interfaces.
*
* The namespaces for pcidata and scanpci clash, so both modules can't be
* loaded at the same time. The X server should only load the scanpci module
* when run with the '-scanpci' flag. The main difference between the
* two modules is size. pcidata only holds the subset of data that is
* "interesting" to the X server. "Interesting" is determined by the
* PCI_VENDOR_* defines in ../common/xf86PciInfo.h.
*/
/* XXX This is including a lot of stuff that modules should not include! */
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
#include <X11/X.h>
#include "os.h"
#include "xf86.h"
#include "xf86Priv.h"
#include "xf86Pci.h"
#include "xf86_OSproc.h"
#include <ctype.h>
#include <stdlib.h>
#ifndef PCIDATA
#define VENDOR_INCLUDE_NONVIDEO
#endif
#define INIT_SUBSYS_INFO
#define INIT_VENDOR_SUBSYS_INFO
#include "xf86PciStr.h"
#include "xf86PciIds.h"
#include "xf86ScanPci.h"
#include "xf86Module.h"
#ifdef PCIDATA
static XF86ModuleVersionInfo pciDataVersRec = {
"pcidata",
MODULEVENDORSTRING,
MODINFOSTRING1,
MODINFOSTRING2,
XORG_VERSION_CURRENT,
1, 0, 0,
ABI_CLASS_VIDEODRV,
ABI_VIDEODRV_VERSION,
NULL,
{0, 0, 0, 0}
};
_X_EXPORT XF86ModuleData pcidataModuleData = { &pciDataVersRec, NULL, NULL };
#else
static XF86ModuleVersionInfo scanPciVersRec = {
"scanpci",
MODULEVENDORSTRING,
MODINFOSTRING1,
MODINFOSTRING2,
XORG_VERSION_CURRENT,
1, 0, 0,
ABI_CLASS_VIDEODRV,
ABI_VIDEODRV_VERSION,
NULL,
{0, 0, 0, 0}
};
_X_EXPORT XF86ModuleData scanpciModuleData = { &scanPciVersRec, NULL, NULL };
#endif /* PCIDATA */
/* Initialisation/Close hooks, in case they're ever needed. */
Bool
ScanPciSetupPciIds(void)
{
return TRUE;
}
void
ScanPciClosePciIds(void)
{
return;
}
/*
* The return value is the number of strings found, or -1 for an error.
* Requested strings that aren't found are set to NULL.
*/
int
ScanPciFindPciNamesByDevice(unsigned short vendor, unsigned short device,
unsigned short svendor, unsigned short subsys,
const char **vname, const char **dname,
const char **svname, const char **sname)
{
int i, j, k;
const pciDeviceInfo **pDev;
const pciSubsystemInfo **pSub;
/* It's an error to not provide the Vendor */
if (vendor == NOVENDOR)
return -1;
/* Initialise returns requested/provided to NULL */
if (vname)
*vname = NULL;
if (device != NODEVICE && dname)
*dname = NULL;
if (svendor != NOVENDOR && svname)
*svname = NULL;
if (subsys != NOSUBSYS && sname)
*sname = NULL;
for (i = 0; pciVendorInfoList[i].VendorName; i++) {
if (vendor == pciVendorInfoList[i].VendorID) {
if (vname) {
*vname = pciVendorInfoList[i].VendorName;
}
if (device == NODEVICE) {
return 1;
}
pDev = pciVendorInfoList[i].Device;
if (!pDev) {
return 1;
}
for (j = 0; pDev[j]; j++) {
if (device == pDev[j]->DeviceID) {
if (dname) {
*dname = pDev[j]->DeviceName;
}
if (svendor == NOVENDOR) {
return 2;
}
for (k = 0; pciVendorInfoList[k].VendorName; k++) {
if (svendor &&
svendor == pciVendorInfoList[k].VendorID) {
if (svname) {
*svname = pciVendorInfoList[k].VendorName;
}
if (subsys == NOSUBSYS) {
return 3;
}
break;
}
}
if (!pciVendorInfoList[k].VendorName) {
return 2;
}
pSub = pDev[j]->Subsystem;
if (!pSub) {
return 3;
}
for (k = 0; pSub[k]; k++) {
if (svendor == pSub[k]->VendorID &&
subsys == pSub[k]->SubsystemID) {
if (sname)
*sname = pSub[k]->SubsystemName;
return 4;
}
}
/* No vendor/subsys match */
return 3;
}
}
/* No device match */
return 1;
}
}
/* No vendor match */
return 0;
}
Bool
ScanPciFindPciNamesBySubsys(unsigned short svendor, unsigned short subsys,
const char **svname, const char **sname)
{
int i, j;
const pciSubsystemInfo **pSub;
/* It's an error to not provide the Vendor */
if (svendor == NOVENDOR)
return -1;
/* Initialise returns requested/provided to NULL */
if (svname)
*svname = NULL;
if (subsys != NOSUBSYS && sname)
*sname = NULL;
for (i = 0; pciVendorSubsysInfoList[i].VendorName; i++) {
if (svendor == pciVendorSubsysInfoList[i].VendorID) {
if (svname) {
*svname = pciVendorSubsysInfoList[i].VendorName;
}
if (subsys == NOSUBSYS) {
return 1;
}
pSub = pciVendorSubsysInfoList[i].Subsystem;
if (!pSub) {
return 1;
}
for (j = 0; pSub[j]; j++) {
if (subsys == pSub[j]->SubsystemID) {
if (sname) {
*sname = pSub[j]->SubsystemName;
}
}
}
/* No subsys match */
return 1;
}
}
/* No vendor match */
return 0;
}
#ifndef PCIDATA
void
ScanPciDisplayPCICardInfo(int verbosity)
{
pciConfigPtr pcrp, *pcrpp;
int i;
xf86EnableIO();
pcrpp = xf86scanpci(0);
if (pcrpp == NULL) {
xf86MsgVerb(X_NONE,0,"No PCI info available\n");
return;
}
xf86MsgVerb(X_NONE,0,"Probing for PCI devices (Bus:Device:Function)\n\n");
for (i = 0; (pcrp = pcrpp[i]); i++) {
const char *svendorname = NULL, *subsysname = NULL;
const char *vendorname = NULL, *devicename = NULL;
Bool noCard = FALSE;
const char *prefix1 = "", *prefix2 = "";
xf86MsgVerb(X_NONE, -verbosity, "(%d:%d:%d) ",
pcrp->busnum, pcrp->devnum, pcrp->funcnum);
/*
* Lookup as much as we can about the device.
*/
if (pcrp->pci_subsys_vendor || pcrp->pci_subsys_card) {
ScanPciFindPciNamesByDevice(pcrp->pci_vendor, pcrp->pci_device,
NOVENDOR, NOSUBSYS,
&vendorname, &devicename, NULL, NULL);
} else {
ScanPciFindPciNamesByDevice(pcrp->pci_vendor, pcrp->pci_device,
pcrp->pci_subsys_vendor,
pcrp->pci_subsys_card,
&vendorname, &devicename,
&svendorname, &subsysname);
}
if (svendorname)
xf86MsgVerb(X_NONE, -verbosity, "%s ", svendorname);
if (subsysname)
xf86MsgVerb(X_NONE, -verbosity, "%s ", subsysname);
if (svendorname && !subsysname) {
if (pcrp->pci_subsys_card && pcrp->pci_subsys_card != NOSUBSYS) {
xf86MsgVerb(X_NONE, -verbosity, "unknown card (0x%04x) ",
pcrp->pci_subsys_card);
} else {
xf86MsgVerb(X_NONE, -verbosity, "card ");
}
}
if (!svendorname && !subsysname) {
/*
* We didn't find a text representation of the information
* about the card.
*/
if (pcrp->pci_subsys_vendor || pcrp->pci_subsys_card) {
/*
* If there was information and we just couldn't interpret
* it, print it out as unknown, anyway.
*/
xf86MsgVerb(X_NONE, -verbosity,
"unknown card (0x%04x/0x%04x) ",
pcrp->pci_subsys_vendor, pcrp->pci_subsys_card);
} else
noCard = TRUE;
}
if (!noCard) {
prefix1 = "using a ";
prefix2 = "using an ";
}
if (vendorname && devicename) {
xf86MsgVerb(X_NONE, -verbosity,"%s%s %s\n", prefix1, vendorname,
devicename);
} else if (vendorname) {
xf86MsgVerb(X_NONE, -verbosity,
"%sunknown chip (DeviceId 0x%04x) from %s\n",
prefix2, pcrp->pci_device, vendorname);
} else {
xf86MsgVerb(X_NONE, -verbosity,
"%sunknown chipset(0x%04x/0x%04x)\n",
prefix2, pcrp->pci_vendor, pcrp->pci_device);
}
}
}
#endif

48
hw/xfree86/scanpci/xf86ScanPci.h
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@ -1,48 +0,0 @@
/*
* Copyright (c) 2000-2002 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
#ifndef SCANPCI_H_
#define SCANPCI_H_
#include "xf86PciData.h"
typedef void (*ScanPciDisplayCardInfoProcPtr)(int verbosity);
/*
* Whoever loads this module needs to define these and initialise them
* after loading.
*/
extern ScanPciDisplayCardInfoProcPtr xf86DisplayPCICardInfo;
void ScanPciDisplayPCICardInfo(int verbosity);
#endif

2
hw/xfree86/utils/Makefile.am
View File

@ -3,7 +3,5 @@ SUBDIRS = \
cvt \
ioport \
kbd_mode \
pcitweak \
scanpci \
xorgcfg \
xorgconfig

3
hw/xfree86/utils/pcitweak/.gitignore vendored
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@ -1,3 +0,0 @@
pcitweak.1
pcitweak.1x

60
hw/xfree86/utils/pcitweak/Makefile.am
View File

@ -1,60 +0,0 @@
# Copyright 2005 Sun Microsystems, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, and/or sell copies of the Software, and to permit persons
# to whom the Software is furnished to do so, provided that the above
# copyright notice(s) and this permission notice appear in all copies of
# the Software and that both the above copyright notice(s) and this
# permission notice appear in supporting documentation.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
# OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL
# INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING
# FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
# WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
# Except as contained in this notice, the name of a copyright holder
# shall not be used in advertising or otherwise to promote the sale, use
# or other dealings in this Software without prior written authorization
# of the copyright holder.
#
bin_PROGRAMS = pcitweak
XFREE86_SRCDIR = $(top_srcdir)/hw/xfree86
DUMMYLIB_SRCDIR = $(XFREE86_SRCDIR)/dummylib
INCLUDES = $(XORG_INCS) -I$(DUMMYLIB_SRCDIR)
pcitweak_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS)
pcitweak_LDADD = \
../../os-support/libxorgos.la \
../../dummylib/libdummy-nonserver.a \
${SYS_LIBS}
pcitweak_SOURCES = \
pcitweak.c
appmandir = $(APP_MAN_DIR)
appman_PRE = pcitweak.man
appman_DATA = $(appman_PRE:man=@APP_MAN_SUFFIX@)
include $(top_srcdir)/cpprules.in
EXTRA_DIST = pcitweak.man.pre
BUILT_SOURCES = $(appman_PRE)
CLEANFILES = $(appman_PRE) $(appman_DATA)
SUFFIXES += .$(APP_MAN_SUFFIX) .man
.man.$(APP_MAN_SUFFIX):
-rm -f $@
$(LN_S) $< $@

241
hw/xfree86/utils/pcitweak/pcitweak.c
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@ -1,241 +0,0 @@
/*
* Copyright (c) 1999-2002 by The XFree86 Project, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of the copyright holder(s)
* and author(s) shall not be used in advertising or otherwise to promote
* the sale, use or other dealings in this Software without prior written
* authorization from the copyright holder(s) and author(s).
*/
/*
* pcitweak.c
*
* Author: David Dawes <dawes@xfree86.org>
*/
#include <X11/X.h>
#include "os.h"
#include "xf86.h"
#include "xf86Priv.h"
#include "xf86_OSproc.h"
#include "xf86Pci.h"
#ifdef __CYGWIN__
#include <getopt.h>
#endif
#include <stdarg.h>
#include <stdlib.h>
#ifdef __linux__
/* to get getopt on Linux */
#ifndef __USE_POSIX2
#define __USE_POSIX2
#endif
#endif
#include <unistd.h>
#if defined(ISC) || defined(Lynx)
extern char *optarg;
extern int optind, opterr;
#endif
pciVideoPtr *xf86PciVideoInfo = NULL;
static void usage(void);
static Bool parsePciBusString(const char *id, int *bus, int *device, int *func);
static char *myname = NULL;
int
main(int argc, char *argv[])
{
int c;
PCITAG tag;
int bus, device, func;
Bool list = FALSE, rd = FALSE, wr = FALSE;
Bool byte = FALSE, halfword = FALSE;
int offset = 0;
CARD32 value = 0;
char *id = NULL, *end;
myname = argv[0];
while ((c = getopt(argc, argv, "bhlr:w:")) != -1) {
switch (c) {
case 'b':
byte = TRUE;
break;
case 'h':
halfword = TRUE;
break;
case 'l':
list = TRUE;
break;
case 'r':
rd = TRUE;
id = optarg;
break;
case 'w':
wr = TRUE;
id = optarg;
break;
case '?':
default:
usage();
}
}
argc -= optind;
argv += optind;
if (list) {
xf86Verbose = 2;
xf86EnableIO();
xf86scanpci(0);
xf86DisableIO();
exit(0);
}
if (rd && wr)
usage();
if (wr && argc != 2)
usage();
if (rd && argc != 1)
usage();
if (byte && halfword)
usage();
if (rd || wr) {
if (!parsePciBusString(id, &bus, &device, &func)) {
fprintf(stderr, "%s: Bad PCI ID string\n", myname);
usage();
}
offset = strtoul(argv[0], &end, 0);
if (*end != '\0') {
fprintf(stderr, "%s: Bad offset\n", myname);
usage();
}
if (halfword) {
if (offset % 2) {
fprintf(stderr, "%s: offset must be a multiple of two\n",
myname);
exit(1);
}
} else if (!byte) {
if (offset % 4) {
fprintf(stderr, "%s: offset must be a multiple of four\n",
myname);
exit(1);
}
}
} else {
usage();
}
if (wr) {
value = strtoul(argv[1], &end, 0);
if (*end != '\0') {
fprintf(stderr, "%s: Bad value\n", myname);
usage();
}
}
xf86EnableIO();
/*
* This is needed to setup all the buses. Otherwise secondary buses
* can't be accessed.
*/
xf86scanpci(0);
tag = pciTag(bus, device, func);
if (rd) {
if (byte) {
printf("0x%02x\n", (unsigned int)pciReadByte(tag, offset) & 0xFF);
} else if (halfword) {
printf("0x%04x\n", (unsigned int)pciReadWord(tag, offset) & 0xFFFF);
} else {
printf("0x%08lx\n", (unsigned long)pciReadLong(tag, offset));
}
} else if (wr) {
if (byte) {
pciWriteByte(tag, offset, value & 0xFF);
} else if (halfword) {
pciWriteWord(tag, offset, value & 0xFFFF);
} else {
pciWriteLong(tag, offset, value);
}
}
xf86DisableIO();
exit(0);
}
static void
usage()
{
fprintf(stderr, "usage:\tpcitweak -l\n"
"\tpcitweak -r ID [-b | -h] offset\n"
"\tpcitweak -w ID [-b | -h] offset value\n"
"\n"
"\t\t-l -- list\n"
"\t\t-r -- read\n"
"\t\t-w -- write\n"
"\t\t-b -- read/write a single byte\n"
"\t\t-h -- read/write a single halfword (16 bit)\n"
"\t\tID -- PCI ID string in form bus:dev:func "
"(all in hex)\n");
exit(1);
}
Bool
parsePciBusString(const char *busID, int *bus, int *device, int *func)
{
/*
* The format is assumed to be "bus:device:func", where bus, device
* and func are hexadecimal integers. func may be omitted and assumed to
* be zero, although it doing this isn't encouraged.
*/
char *p, *s, *end;
s = strdup(busID);
p = strtok(s, ":");
if (p == NULL || *p == 0)
return FALSE;
*bus = strtoul(p, &end, 16);
if (*end != '\0')
return FALSE;
p = strtok(NULL, ":");
if (p == NULL || *p == 0)
return FALSE;
*device = strtoul(p, &end, 16);
if (*end != '\0')
return FALSE;
*func = 0;
p = strtok(NULL, ":");
if (p == NULL || *p == 0)
return TRUE;
*func = strtoul(p, &end, 16);
if (*end != '\0')
return FALSE;
return TRUE;
}
#include "xf86getpagesize.c"

64
hw/xfree86/utils/pcitweak/pcitweak.man.pre
View File

@ -1,64 +0,0 @@
.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.man,v 3.3 2001/01/27 18:20:56 dawes Exp $
.TH PCITWEAK 1 __vendorversion__
.SH NAME
pcitweak - read/write PCI config space
.SH SYNOPSIS
.B pcitweak
.B \-l
.br
.B pcitweak
.B \-r
.I PCI-ID
.RB [ \-b | \-h ]
.I offset
.br
.B pcitweak
.B \-w
.I PCI-ID
.RB [ \-b | \-h ]
.I offset
.I value
.SH DESCRIPTION
.I Pcitweak
is a utility that can be used to examine or change registers in the PCI
configuration space. On most platforms
.I pcitweak
can only be run by the root user.
.SH OPTIONS
.TP 8
.B \-l
Probe the PCI buses and print a line for each detected device. Each line
contains the bus location (bus:device:function), chip vendor/device, card
(subsystem) vendor/card, revision, class and header type. All values
printed are in hexadecimal.
.TP 8
.BI "\-r " PCI-ID
Read the PCI configuration space register at
.I offset
for the PCI device at bus location
.IR PCI-ID .
.I PCI-ID
should be given in the form bus:device:function, with each value in
hexadecimal. By default, a 32-bit register is read.
.TP 8
.BI "\-w " PCI-ID
Write
.I value
to the PCI configuration space register at
.I offset
for the PCI device at bus location
.IR PCI-ID .
.I PCI-ID
should be given in the form bus:device:function, with each value in
hexadecimal. By default, a 32-bit register is written.
.TP 8
.B \-b
Read or write an 8-bit value (byte).
.TP 8
.B \-h
Read or write a 16-bit value (halfword).
.SH "SEE ALSO"
scanpci(1)
.SH AUTHORS
David Dawes
.RI ( dawes@xfree86.org ).

2
hw/xfree86/utils/scanpci/.gitignore vendored
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@ -1,2 +0,0 @@
scanpci.1
scanpci.1x

62
hw/xfree86/utils/scanpci/Makefile.am
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@ -1,62 +0,0 @@
# Copyright 2005 Sun Microsystems, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, and/or sell copies of the Software, and to permit persons
# to whom the Software is furnished to do so, provided that the above
# copyright notice(s) and this permission notice appear in all copies of
# the Software and that both the above copyright notice(s) and this
# permission notice appear in supporting documentation.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
# OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL
# INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING
# FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
# WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
# Except as contained in this notice, the name of a copyright holder
# shall not be used in advertising or otherwise to promote the sale, use
# or other dealings in this Software without prior written authorization
# of the copyright holder.
#
bin_PROGRAMS = scanpci
XFREE86_SRCDIR = $(top_srcdir)/hw/xfree86
SCANPCI_SRCDIR = $(XFREE86_SRCDIR)/scanpci
DUMMYLIB_SRCDIR = $(XFREE86_SRCDIR)/dummylib
INCLUDES = $(XORG_INCS) -I$(SCANPCI_SRCDIR) -I$(DUMMYLIB_SRCDIR)
scanpci_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS)
scanpci_LDADD = \
../../scanpci/libscanpci.la \
../../os-support/libxorgos.la \
../../dummylib/libdummy-nonserver.a \
${SYS_LIBS}
scanpci_SOURCES = \
scanpci.c
appmandir = $(APP_MAN_DIR)
appman_PRE = scanpci.man
appman_DATA = $(appman_PRE:man=@APP_MAN_SUFFIX@)
include $(top_srcdir)/cpprules.in
EXTRA_DIST = scanpci.man.pre
BUILT_SOURCES = $(appman_PRE)
CLEANFILES = $(appman_PRE) $(appman_DATA)
SUFFIXES += .$(APP_MAN_SUFFIX) .man
.man.$(APP_MAN_SUFFIX):
-rm -f $@
$(LN_S) $< $@

779
hw/xfree86/utils/scanpci/scanpci.c
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@ -1,779 +0,0 @@
/*
* Copyright 2000 by Egbert Eich
* Copyright 1995 by Robin Cutshaw <robin@XFree86.Org>
* Copyright 2002 by David Dawes
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
* the above copyright notice appear in all copies and that both that
* copyright notice and this permission notice appear in supporting
* documentation, and that the names of the above listed copyright holder(s)
* not be used in advertising or publicity pertaining to distribution of
* the software without specific, written prior permission. The above listed
* copyright holder(s) make(s) no representations about the suitability of this
* software for any purpose. It is provided "as is" without express or
* implied warranty.
*
* THE ABOVE LISTED COPYRIGHT HOLDER(S) DISCLAIM(S) ALL WARRANTIES WITH REGARD
* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS, IN NO EVENT SHALL THE ABOVE LISTED COPYRIGHT HOLDER(S) BE
* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
* IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
* OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <X11/X.h>
#include "os.h"
#include "xf86.h"
#include "xf86Priv.h"
#include "xf86_OSproc.h"
#include "xf86Pci.h"
#include "xf86PciInfo.h"
#include "xf86ScanPci.h"
#include "dummylib.h"
#include <stdarg.h>
#include <stdlib.h>
#ifdef __linux__
/* to get getopt on Linux */
#ifndef __USE_POSIX2
#define __USE_POSIX2
#endif
#endif
#include <unistd.h>
#if defined(ISC) || defined(Lynx)
extern char *optarg;
extern int optind, opterr;
#endif
pciVideoPtr *xf86PciVideoInfo = NULL;
static void usage(void);
static void identify_card(pciConfigPtr pcr, int verbose);
static void print_default_class(pciConfigPtr pcr);
static void print_bridge_pci_class(pciConfigPtr pcr);
static void print_mach64(pciConfigPtr pcr);
static void print_i128(pciConfigPtr pcr);
static void print_dc21050(pciConfigPtr pcr);
static void print_simba(pciConfigPtr pcr);
static void print_460gx_sac(pciConfigPtr pcr);
static void print_460gx_pxb(pciConfigPtr pcr);
static void print_460gx_gxb(pciConfigPtr pcr);
#define MAX_DEV_PER_VENDOR 40
typedef struct {
unsigned int Vendor;
struct {
int DeviceID;
void(*func)(pciConfigPtr);
} Device[MAX_DEV_PER_VENDOR];
} pciVendorDevFuncInfo;
static pciVendorDevFuncInfo vendorDeviceFuncInfo[] = {
{ PCI_VENDOR_ATI, {
{ PCI_CHIP_MACH64CT, print_mach64 },
{ PCI_CHIP_MACH64CX, print_mach64 },
{ PCI_CHIP_MACH64ET, print_mach64 },
{ PCI_CHIP_MACH64GB, print_mach64 },
{ PCI_CHIP_MACH64GD, print_mach64 },
{ PCI_CHIP_MACH64GI, print_mach64 },
{ PCI_CHIP_MACH64GL, print_mach64 },
{ PCI_CHIP_MACH64GM, print_mach64 },
{ PCI_CHIP_MACH64GN, print_mach64 },
{ PCI_CHIP_MACH64GO, print_mach64 },
{ PCI_CHIP_MACH64GP, print_mach64 },
{ PCI_CHIP_MACH64GQ, print_mach64 },
{ PCI_CHIP_MACH64GR, print_mach64 },
{ PCI_CHIP_MACH64GS, print_mach64 },
{ PCI_CHIP_MACH64GT, print_mach64 },
{ PCI_CHIP_MACH64GU, print_mach64 },
{ PCI_CHIP_MACH64GV, print_mach64 },
{ PCI_CHIP_MACH64GW, print_mach64 },
{ PCI_CHIP_MACH64GX, print_mach64 },
{ PCI_CHIP_MACH64GY, print_mach64 },
{ PCI_CHIP_MACH64GZ, print_mach64 },
{ PCI_CHIP_MACH64LB, print_mach64 },
{ PCI_CHIP_MACH64LD, print_mach64 },
{ PCI_CHIP_MACH64LG, print_mach64 },
{ PCI_CHIP_MACH64LI, print_mach64 },
{ PCI_CHIP_MACH64LM, print_mach64 },
{ PCI_CHIP_MACH64LN, print_mach64 },
{ PCI_CHIP_MACH64LP, print_mach64 },
{ PCI_CHIP_MACH64LQ, print_mach64 },
{ PCI_CHIP_MACH64LR, print_mach64 },
{ PCI_CHIP_MACH64LS, print_mach64 },
{ PCI_CHIP_MACH64VT, print_mach64 },
{ PCI_CHIP_MACH64VU, print_mach64 },
{ PCI_CHIP_MACH64VV, print_mach64 },
{ 0x0000, NULL } } },
{ PCI_VENDOR_DIGITAL, {
{ PCI_CHIP_DC21050, print_dc21050},
{ 0x0000, NULL } } },
{ PCI_VENDOR_NUMNINE, {
{ PCI_CHIP_I128, print_i128 },
{ PCI_CHIP_I128_2, print_i128 },
{ PCI_CHIP_I128_T2R, print_i128 },
{ PCI_CHIP_I128_T2R4, print_i128 },
{ 0x0000, NULL } } },
{ PCI_VENDOR_SUN, {
{ PCI_CHIP_SIMBA, print_simba },
{ 0x0000, NULL } } },
{ PCI_VENDOR_INTEL, {
{ PCI_CHIP_460GX_SAC, print_460gx_sac },
{ PCI_CHIP_460GX_PXB, print_460gx_pxb },
{ PCI_CHIP_460GX_GXB_1, print_460gx_gxb },
{ PCI_CHIP_460GX_WXB, print_460gx_pxb }, /* Uncertain */
{ 0x0000, NULL } } },
{ 0x0000, {
{ 0x0000, NULL } } }
};
static void
usage(void)
{
printf("Usage: scanpci [-v12OfV]\n");
printf(" -v print config space\n");
printf(" -1 config type 1\n");
printf(" -2 config type 2\n");
printf(" -O use OS config support\n");
printf(" -f force config type\n");
printf(" -V set message verbosity level\n");
}
int
main(int argc, char *argv[])
{
pciConfigPtr *pcrpp = NULL;
int Verbose = 0;
int i = 0;
int force = 0;
int c;
xf86Info.pciFlags = PCIProbe1;
while ((c = getopt(argc, argv, "?v12OfV:")) != -1)
switch(c) {
case 'v':
Verbose = 1;
break;
case '1':
xf86Info.pciFlags = PCIProbe1;
break;
case '2':
xf86Info.pciFlags = PCIProbe2;
break;
case 'O':
xf86Info.pciFlags = PCIOsConfig;
break;
case 'f':
force = 1;
break;
case 'V':
xf86Verbose = atoi(optarg);
break;
case '?':
default:
usage();
exit (1);
break;
}
if (force)
switch (xf86Info.pciFlags) {
case PCIProbe1:
xf86Info.pciFlags = PCIForceConfig1;
break;
case PCIProbe2:
xf86Info.pciFlags = PCIForceConfig2;
break;
default:
break;
}
pcrpp = xf86scanpci(0);
if (!pcrpp) {
printf("No PCI devices found\n");
xf86DisableIO();
exit (1);
}
while (pcrpp[i])
identify_card(pcrpp[i++],Verbose);
xf86DisableIO();
exit(0);
}
static void
identify_card(pciConfigPtr pcr, int verbose)
{
int i, j;
int foundit = 0;
int foundvendor = 0;
const char *vname = NULL, *dname = NULL, *svname = NULL, *sname = NULL;
pciVendorDevFuncInfo *vdf = vendorDeviceFuncInfo;
if (!ScanPciSetupPciIds()) {
fprintf(stderr, "xf86SetupPciIds() failed\n");
exit(1);
}
printf("\npci bus 0x%04x cardnum 0x%02x function 0x%02x:"
" vendor 0x%04x device 0x%04x\n",
pcr->busnum, pcr->devnum, pcr->funcnum,
pcr->pci_vendor, pcr->pci_device);
ScanPciFindPciNamesByDevice(pcr->pci_vendor, pcr->pci_device,
pcr->pci_subsys_vendor, pcr->pci_subsys_card,
&vname, &dname, &svname, &sname);
if (vname) {
printf(" %s ", vname);
if (dname) {
printf("%s", dname);
foundit = 1;
}
}
if (!foundit)
printf(" Device unknown\n");
else {
printf("\n");
if (verbose) {
for (i = 0; vdf[i].Vendor; i++) {
if (vdf[i].Vendor == pcr->pci_vendor) {
for (j = 0; vdf[i].Device[j].DeviceID; j++) {
if (vdf[i].Device[j].DeviceID == pcr->pci_device) {
(*vdf[i].Device[j].func)(pcr);
return;
}
}
break;
}
}
}
}
if (verbose && !(pcr->pci_header_type & 0x7f) &&
(pcr->pci_subsys_vendor != 0 || pcr->pci_subsys_card != 0) &&
((pcr->pci_subsys_vendor != NOVENDOR)
|| (pcr->pci_subsys_card != NOSUBSYS)) &&
(pcr->pci_vendor != pcr->pci_subsys_vendor ||
pcr->pci_device != pcr->pci_subsys_card)) {
foundit = 0;
foundvendor = 0;
printf(" CardVendor 0x%04x card 0x%04x",
pcr->pci_subsys_vendor, pcr->pci_subsys_card);
if (svname) {
printf(" (%s", svname);
foundvendor = 1;
if (sname) {
printf(" %s)", sname);
foundit = 1;
}
}
if (!foundit) {
if (!foundvendor)
printf(" (");
else
printf(", ");
printf("Card unknown)");
}
printf("\n");
}
if (verbose) {
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
if ((pcr->pci_base_class == PCI_CLASS_BRIDGE) &&
(pcr->pci_sub_class == PCI_SUBCLASS_BRIDGE_PCI))
print_bridge_pci_class(pcr);
else
print_default_class(pcr);
}
}
static void
print_default_class(pciConfigPtr pcr)
{
printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
pcr->pci_cache_line_size);
if (pcr->pci_base0) {
if ((pcr->pci_base0 & 0x7) == 0x4) {
printf(" BASE0 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n",
(int)pcr->pci_base1, (int)pcr->pci_base0,
(int)pcr->pci_base1,
(int)(pcr->pci_base0 &
(pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base0 & 0x8) ? " PREFETCHABLE" :"");
} else {
printf(" BASE0 0x%08x addr 0x%08x %s%s\n",
(int)pcr->pci_base0,
(int)(pcr->pci_base0 &
(pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base0 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
}
}
if ((pcr->pci_base1) && ((pcr->pci_base0 & 0x7) != 0x4)) {
if ((pcr->pci_base1 & 0x7) == 0x4) {
printf(" BASE1 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n",
(int)pcr->pci_base2, (int)pcr->pci_base1,
(int)pcr->pci_base2,
(int)(pcr->pci_base1 &
(pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base1 & 0x8) ? " PREFETCHABLE" :"");
} else {
printf(" BASE1 0x%08x addr 0x%08x %s%s\n",
(int)pcr->pci_base1,
(int)(pcr->pci_base1 &
(pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base1 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base1 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
}
}
if ((pcr->pci_base2) && ((pcr->pci_base1 & 0x7) != 0x4)) {
if ((pcr->pci_base2 & 0x7) == 0x4) {
printf(" BASE2 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n",
(int)pcr->pci_base3, (int)pcr->pci_base2,
(int)pcr->pci_base3,
(int)(pcr->pci_base2 &
(pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base2 & 0x8) ? " PREFETCHABLE" :"");
} else {
printf(" BASE2 0x%08x addr 0x%08x %s%s\n",
(int)pcr->pci_base2,
(int)(pcr->pci_base2 &
(pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base2 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base2 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
}
}
if ((pcr->pci_base3) && ((pcr->pci_base2 & 0x7) != 0x4)) {
if ((pcr->pci_base3 & 0x7) == 0x4) {
printf(" BASE3 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n",
(int)pcr->pci_base4, (int)pcr->pci_base3,
(int)pcr->pci_base4,
(int)(pcr->pci_base3 &
(pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base3 & 0x8) ? " PREFETCHABLE" :"");
} else {
printf(" BASE3 0x%08x addr 0x%08x %s%s\n",
(int)pcr->pci_base3,
(int)(pcr->pci_base3 &
(pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base3 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base3 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
}
}
if ((pcr->pci_base4) && ((pcr->pci_base3 & 0x7) != 0x4)) {
if ((pcr->pci_base4 & 0x7) == 0x4) {
printf(" BASE4 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n",
(int)pcr->pci_base5, (int)pcr->pci_base4,
(int)pcr->pci_base5,
(int)(pcr->pci_base4 &
(pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base4 & 0x8) ? " PREFETCHABLE" :"");
} else {
printf(" BASE4 0x%08x addr 0x%08x %s%s\n",
(int)pcr->pci_base4,
(int)(pcr->pci_base4 &
(pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base4 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base4 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
}
}
if ((pcr->pci_base5) && ((pcr->pci_base4 & 0x7) != 0x4)) {
printf(" BASE5 0x%08x addr 0x%08x %s%s%s\n",
(int)pcr->pci_base5,
(int)(pcr->pci_base5 &
(pcr->pci_base5 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
(pcr->pci_base5 & 0x1) ? "I/O" : "MEM",
((pcr->pci_base5 & 0x9) == 0x8) ? " PREFETCHABLE" :"",
((pcr->pci_base5 & 0x7) == 0x4) ? " 64BIT" : "");
}
if (pcr->pci_baserom)
printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n",
(int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
pcr->pci_baserom & 0x1 ? "" : "not-");
if (pcr->pci_max_min_ipin_iline)
printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x"
" INT_PIN 0x%02x INT_LINE 0x%02x\n",
pcr->pci_max_lat, pcr->pci_min_gnt,
pcr->pci_int_pin, pcr->pci_int_line);
if (pcr->pci_user_config)
printf(" BYTE_0 0x%02x BYTE_1 0x%02x"
" BYTE_2 0x%02x BYTE_3 0x%02x\n",
(int)pcr->pci_user_config_0, (int)pcr->pci_user_config_1,
(int)pcr->pci_user_config_2, (int)pcr->pci_user_config_3);
}
#define PCI_B_FAST_B_B 0x80
#define PCI_B_SB_RESET 0x40
#define PCI_B_M_ABORT 0x20
#define PCI_B_VGA_EN 0x08
#define PCI_B_ISA_EN 0x04
#define PCI_B_SERR_EN 0x02
#define PCI_B_P_ERR 0x01
static void
print_bridge_pci_class(pciConfigPtr pcr)
{
printf(" HEADER 0x%02x LATENCY 0x%02x\n",
pcr->pci_header_type, pcr->pci_latency_timer);
printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x\n",
pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
pcr->pci_subordinate_bus_number);
printf(" SECLT 0x%02x SECSTATUS 0x%04x\n",
pcr->pci_secondary_latency_timer, pcr->pci_secondary_status);
if (pcr->pci_io_base || pcr->pci_io_limit ||
pcr->pci_upper_io_base || pcr->pci_upper_io_limit) {
if (((pcr->pci_io_base & 0x0f) == 0x01) ||
((pcr->pci_io_limit & 0x0f) == 0x01)) {
printf(" IOBASE 0x%04x%04x IOLIM 0x%04x%04x\n",
pcr->pci_upper_io_base, (pcr->pci_io_base & 0x00f0) << 8,
pcr->pci_upper_io_limit, (pcr->pci_io_limit << 8) | 0x0fff);
} else {
printf(" IOBASE 0x%04x IOLIM 0x%04x\n",
(pcr->pci_io_base & 0x00f0) << 8,
(pcr->pci_io_limit << 8) | 0x0fff);
}
}
if (pcr->pci_mem_base || pcr->pci_mem_limit)
printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n",
(pcr->pci_mem_base & 0x00fff0) << 16,
(pcr->pci_mem_limit << 16) | 0x0fffff);
if (pcr->pci_prefetch_mem_base || pcr->pci_prefetch_mem_limit ||
pcr->pci_prefetch_upper_mem_base ||
pcr->pci_prefetch_upper_mem_limit) {
if (((pcr->pci_prefetch_mem_base & 0x0f) == 0x01) ||
((pcr->pci_prefetch_mem_limit & 0x0f) == 0x01)) {
printf(" PREFETCH_MEMBASE 0x%08x%08x MEMLIM 0x%08x%08x\n",
(int)pcr->pci_prefetch_upper_mem_base,
(pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
(int)pcr->pci_prefetch_upper_mem_limit,
(pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
} else {
printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n",
(pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
(pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
}
}
printf(" %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
" %sSERR_EN %sPERR_EN\n",
(pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_");
}
static void
print_mach64(pciConfigPtr pcr)
{
CARD32 sparse_io = 0;
printf(" CardVendor 0x%04x card 0x%04x\n",
pcr->pci_subsys_vendor, pcr->pci_subsys_card);
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class,
pcr->pci_prog_if, pcr->pci_rev_id);
printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
pcr->pci_cache_line_size);
if (pcr->pci_base0)
printf(" APBASE 0x%08x addr 0x%08x\n",
(int)pcr->pci_base0, (int)(pcr->pci_base0 &
(pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
if (pcr->pci_base1)
printf(" BLOCKIO 0x%08x addr 0x%08x\n",
(int)pcr->pci_base1, (int)(pcr->pci_base1 &
(pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
if (pcr->pci_base2)
printf(" REGBASE 0x%08x addr 0x%08x\n",
(int)pcr->pci_base2, (int)(pcr->pci_base2 &
(pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
if (pcr->pci_baserom)
printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n",
(int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
pcr->pci_baserom & 0x1 ? "" : "not-");
if (pcr->pci_max_min_ipin_iline)
printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x"
" INT_PIN 0x%02x INT_LINE 0x%02x\n",
pcr->pci_max_lat, pcr->pci_min_gnt,
pcr->pci_int_pin, pcr->pci_int_line);
switch (pcr->pci_user_config_0 & 0x03) {
case 0:
sparse_io = 0x2ec;
break;
case 1:
sparse_io = 0x1cc;
break;
case 2:
sparse_io = 0x1c8;
break;
}
printf(" SPARSEIO 0x%03x %s IO enabled %sable 0x46E8\n",
(int)sparse_io, pcr->pci_user_config_0 & 0x04 ? "Block" : "Sparse",
pcr->pci_user_config_0 & 0x08 ? "Dis" : "En");
}
static void
print_i128(pciConfigPtr pcr)
{
printf(" CardVendor 0x%04x card 0x%04x\n",
pcr->pci_subsys_vendor, pcr->pci_subsys_card);
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
pcr->pci_cache_line_size);
printf(" MW0_AD 0x%08x addr 0x%08x %spre-fetchable\n",
(int)pcr->pci_base0, (int)(pcr->pci_base0 & 0xFFC00000),
pcr->pci_base0 & 0x8 ? "" : "not-");
printf(" MW1_AD 0x%08x addr 0x%08x %spre-fetchable\n",
(int)pcr->pci_base1, (int)(pcr->pci_base1 & 0xFFC00000),
pcr->pci_base1 & 0x8 ? "" : "not-");
printf(" XYW_AD(A) 0x%08x addr 0x%08x\n",
(int)pcr->pci_base2, (int)(pcr->pci_base2 & 0xFFC00000));
printf(" XYW_AD(B) 0x%08x addr 0x%08x\n",
(int)pcr->pci_base3, (int)(pcr->pci_base3 & 0xFFC00000));
printf(" RBASE_G 0x%08x addr 0x%08x\n",
(int)pcr->pci_base4, (int)(pcr->pci_base4 & 0xFFFF0000));
printf(" IO 0x%08x addr 0x%08x\n",
(int)pcr->pci_base5, (int)(pcr->pci_base5 & 0xFFFFFF00));
printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n",
(int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
pcr->pci_baserom & 0x1 ? "" : "not-");
if (pcr->pci_max_min_ipin_iline)
printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x"
" INT_PIN 0x%02x INT_LINE 0x%02x\n",
pcr->pci_max_lat, pcr->pci_min_gnt,
pcr->pci_int_pin, pcr->pci_int_line);
}
static void
print_dc21050(pciConfigPtr pcr)
{
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
pcr->pci_cache_line_size);
printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n",
pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer);
printf(" IOBASE 0x%02x IOLIM 0x%02x SECSTATUS 0x%04x\n",
pcr->pci_io_base << 8, (pcr->pci_io_limit << 8) | 0xfff,
pcr->pci_secondary_status);
printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n",
pcr->pci_mem_base << 16, (pcr->pci_mem_limit << 16) | 0xfffff);
printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n",
pcr->pci_prefetch_mem_base << 16,
(pcr->pci_prefetch_mem_limit << 16) | 0xfffff);
printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n",
(int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
pcr->pci_baserom & 0x1 ? "" : "not-");
if (pcr->pci_max_min_ipin_iline)
printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x"
" INT_PIN 0x%02x INT_LINE 0x%02x\n",
pcr->pci_max_lat, pcr->pci_min_gnt,
pcr->pci_int_pin, pcr->pci_int_line);
}
static void
print_simba(pciConfigPtr pcr)
{
int i;
CARD8 io, mem;
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
printf(" HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
pcr->pci_header_type, pcr->pci_latency_timer,
pcr->pci_cache_line_size);
printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n",
pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer);
printf(" SECSTATUS 0x%04x\n",
pcr->pci_secondary_status);
printf(" %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
" %sSERR_EN %sPERR_EN\n",
(pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_",
(pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_");
printf(" TICK 0x%08lx SECCNTL 0x%02x\n", (long)
pciReadLong(pcr->tag, 0x00b0), pciReadByte(pcr->tag, 0x00dd));
printf(" MASTER RETRIES: PRIMARY 0x%02x, SECONDARY 0x%02x\n",
pciReadByte(pcr->tag, 0x00c0), pciReadByte(pcr->tag, 0x00dc));
printf(" TARGET RETRIES: PIO 0x%02x, DMA 0x%02x\n",
pciReadByte(pcr->tag, 0x00d8), pciReadByte(pcr->tag, 0x00da));
printf(" TARGET LATENCY: PIO 0x%02x, DMA 0x%02x\n",
pciReadByte(pcr->tag, 0x00d9), pciReadByte(pcr->tag, 0x00db));
printf(" DMA AFSR 0x%08lx%08lx AFAR 0x%08lx%08lx\n",
(long)pciReadLong(pcr->tag, 0x00cc),
(long)pciReadLong(pcr->tag, 0x00c8),
(long)pciReadLong(pcr->tag, 0x00d4),
(long)pciReadLong(pcr->tag, 0x00d0));
printf(" PIO AFSR 0x%08lx%08lx AFAR 0x%08lx%08lx\n",
(long)pciReadLong(pcr->tag, 0x00ec),
(long)pciReadLong(pcr->tag, 0x00e8),
(long)pciReadLong(pcr->tag, 0x00f4),
(long)pciReadLong(pcr->tag, 0x00f0));
printf(" PCI CNTL 0x%08lx%08lx DIAG 0x%08lx%08lx\n",
(long)pciReadLong(pcr->tag, 0x00e4),
(long)pciReadLong(pcr->tag, 0x00e0),
(long)pciReadLong(pcr->tag, 0x00fc),
(long)pciReadLong(pcr->tag, 0x00f8));
printf(" MAPS: I/O 0x%02x, MEM 0x%02x\n",
(io = pciReadByte(pcr->tag, 0x00de)),
(mem = pciReadByte(pcr->tag, 0x00df)));
for (i = 0; i < 8; i++)
if (io & (1 << i))
printf(" BUS I/O 0x%06x-0x%06x\n", i << 21, ((i + 1) << 21) - 1);
for (i = 0; i < 8; i++)
if (mem & (1 << i))
printf(" BUS MEM 0x%08x-0x%08x\n", i << 29, ((i + 1) << 29) - 1);
}
static int cbn_460gx = -1;
static void
print_460gx_sac(pciConfigPtr pcr)
{
CARD32 tmp;
/* Print generalities */
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
tmp = pcr->pci_user_config;
pcr->pci_user_config = 0;
print_default_class(pcr);
pcr->pci_user_config = tmp;
/* Only print what XFree86 might be interested in */
if (pcr->busnum == 0) {
if ((pcr->devnum != 0x10) || (pcr->funcnum != 0))
return;
/* Get Chipset Bus Number */
cbn_460gx = (unsigned int)pciReadByte(pcr->tag, 0x0040);
printf(" CBN 0x%02x CBUSES 0x%02x\n",
cbn_460gx, pciReadByte(pcr->tag, 0x0044));
return;
}
if ((pcr->busnum != cbn_460gx) || (pcr->funcnum != 0))
return;
switch (pcr->devnum) {
case 0:
printf(" F16NUM 0x%02x F16CPL 0x%02x DEVNPRES 0x%08lx\n",
pciReadByte(pcr->tag, 0x0060), pciReadByte(pcr->tag, 0x0078),
(long)pciReadLong(pcr->tag, 0x0070));
return;
case 0x10:
printf(" TOM 0x%04x IORD 0x%04x\n",
pciReadWord(pcr->tag, 0x0050), pciReadWord(pcr->tag, 0x008E));
/* Fall through */
case 0x11: case 0x12: case 0x13:
case 0x14: case 0x15: case 0x16: case 0x17:
printf(" BUSNO 0x%02x SUBNO 0x%02x\n",
pciReadByte(pcr->tag, 0x0048), pciReadByte(pcr->tag, 0x0049));
printf(" VGASE 0x%02x PCIS 0x%02x IOR 0x%02x\n",
pciReadByte(pcr->tag, 0x0080), pciReadByte(pcr->tag, 0x0084),
pciReadByte(pcr->tag, 0x008C));
/* Fall through */
default:
return;
}
}
static void
print_460gx_pxb(pciConfigPtr pcr)
{
CARD32 tmp;
/* Print generalities */
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
tmp = pcr->pci_user_config;
pcr->pci_user_config = 0;
print_default_class(pcr);
pcr->pci_user_config = tmp;
/* Only print what XFree86 might be interested in */
printf(" ERRCMD 0x%02x GAPEN 0x%02x\n",
pciReadByte(pcr->tag, 0x0046), pciReadByte(pcr->tag, 0x0060));
}
static void
print_460gx_gxb(pciConfigPtr pcr)
{
CARD32 tmp;
/* Print generalities */
printf(" STATUS 0x%04x COMMAND 0x%04x\n",
pcr->pci_status, pcr->pci_command);
printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
pcr->pci_rev_id);
tmp = pcr->pci_user_config;
pcr->pci_user_config = 0;
print_default_class(pcr);
pcr->pci_user_config = tmp;
/* Only print what XFree86 might be interested in */
printf(" BAPBASE 0x%08lx%08lx AGPSIZ 0x%02x VGAGE 0x%02x\n",
(long)pciReadLong(pcr->tag, 0x009C),
(long)pciReadLong(pcr->tag, 0x0098),
pciReadByte(pcr->tag, 0x00A2), pciReadByte(pcr->tag, 0x0060));
}
#include "xf86getpagesize.c"

42
hw/xfree86/utils/scanpci/scanpci.man.pre
View File

@ -1,42 +0,0 @@
.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.man,v 3.2 2000/12/11 20:18:45 dawes Exp $
.TH SCANPCI 1 __vendorversion__
.SH NAME
scanpci - scan/probe PCI buses
.SH SYNOPSIS
.B scanpci
.RB [ \-v12OfV ]
.SH DESCRIPTION
.I Scanpci
is a utility that can be used to scan PCI buses and report information
about the configuration space settings for each PCI device.
On most platforms,
.I scanpci
can only be run by the root user.
.SH OPTIONS
.TP 8
.B \-v
Print the configuration space information for each device in a verbose
format. Without this option, only a brief description is printed for
each device.
.TP 8
.B \-1
Use PCI config type 1.
.TP 8
.B \-2
Use PCI config type 2.
.TP 8
.B \-f
Used in conjunction with the above two options, this forces the specified
configuration type to be used for config space access.
.TP 8
.B \-O
Use the OS's PCI config space access mechanism to access the PCI config
space (when available).
.TP 8
.BI "\-V " n
Set the verbosity level to
.I n
for the internal PCI scanner. This is primarily for debugging use.
.SH "SEE ALSO"
pcitweak(1)
.SH AUTHORS

26
hw/xfree86/utils/xorgcfg/loadmod.c
View File

@ -69,15 +69,13 @@ void xf86Msg(int, const char*, ...);
void xf86MsgVerb(int, int, const char*, ...);
void xf86PrintChipsets(const char*, const char*, SymTabPtr);
void xf86ErrorFVerb(int verb, const char *format, ...);
pciVideoPtr *xf86GetPciVideoInfo(void);
int xf86MatchDevice(const char*, GDevPtr**);
int xf86MatchPciInstances(const char*, int, SymTabPtr, PciChipsets*, GDevPtr*, int, DriverPtr,int**);
int xf86MatchIsaInstances(const char*, SymTabPtr, pointer*, DriverPtr, pointer, GDevPtr*, int, int**);
void *xf86LoadDrvSubModule(DriverPtr drv, const char*);
void xf86DrvMsg(int, int, const char*, ...);
pciConfigPtr *xf86GetPciConfigInfo(void);
Bool xf86IsPrimaryPci(pcVideoPtr*);
Bool xf86CheckPciSlot(int bus, int device, int func);
Bool xf86CheckPciSlot( const struct pci_device * );
#endif
extern char *loaderPath, **loaderList, **ploaderList;
@ -306,14 +304,12 @@ LOOKUP xfree86LookupTab[] = {
SYMFUNC(ErrorF)
SYMFUNC(xf86PrintChipsets)
SYMFUNC(xf86ErrorFVerb)
SYMFUNC(xf86GetPciVideoInfo)
SYMFUNC(xf86MatchDevice)
SYMFUNC(xf86MatchPciInstances)
SYMFUNC(xf86MatchIsaInstances)
SYMFUNC(Xfree)
SYMFUNC(xf86LoadDrvSubModule)
SYMFUNC(xf86DrvMsg)
SYMFUNC(xf86GetPciConfigInfo)
SYMFUNC(xf86IsPrimaryPci)
SYMFUNC(xf86CheckPciSlot)
SYMFUNC(XNFalloc)
@ -607,17 +603,6 @@ xf86PrintChipsets(const char *name, const char *msg, SymTabPtr chipsets)
chips = chipsets;
}
_X_EXPORT pciVideoPtr *
xf86GetPciVideoInfo(void)
{
static pciVideoRec pci_video;
static pciVideoPtr pci_video_ptr[2] = { &pci_video };
memset(&pci_video, 0, sizeof(pciVideoRec));
return (pci_video_ptr);
}
_X_EXPORT int
xf86MatchDevice(const char *name, GDevPtr **gdev)
{
@ -661,12 +646,6 @@ xf86LoadDrvSubModule(DriverPtr drv, const char *name)
return (ret);
}
_X_EXPORT pciConfigPtr *
xf86GetPciConfigInfo(void)
{
return (NULL);
}
_X_EXPORT Bool
xf86IsPrimaryPci(pciVideoPtr pPci)
{
@ -674,8 +653,9 @@ xf86IsPrimaryPci(pciVideoPtr pPci)
}
_X_EXPORT Bool
xf86CheckPciSlot(int bus, int device, int func)
xf86CheckPciSlot( const struct pci_device * d )
{
(void) d;
return (False);
}
#endif

8
hw/xfree86/vgahw/vgaHW.c
View File

@ -30,6 +30,8 @@
#include "xf86cmap.h"
#include "Pci.h"
#ifndef SAVE_FONT1
#define SAVE_FONT1 1
#endif
@ -1636,7 +1638,6 @@ vgaHWGetHWRec(ScrnInfoPtr scrp)
{
vgaRegPtr regp;
vgaHWPtr hwp;
pciVideoPtr pvp;
int i;
/*
@ -1722,8 +1723,7 @@ vgaHWGetHWRec(ScrnInfoPtr scrp)
vgaHWSetStdFuncs(hwp);
hwp->PIOOffset = scrp->domainIOBase;
if ((pvp = xf86GetPciInfoForEntity(scrp->entityList[0])))
hwp->Tag = pciTag(pvp->bus, pvp->device, pvp->func);
hwp->dev = xf86GetPciInfoForEntity(scrp->entityList[0]);
return TRUE;
}
@ -1775,7 +1775,7 @@ vgaHWMapMem(ScrnInfoPtr scrp)
#ifdef DEBUG
ErrorF("Mapping VGAMem\n");
#endif
hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO_32BIT, hwp->Tag,
hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO_32BIT, hwp->dev,
hwp->MapPhys, hwp->MapSize);
return hwp->Base != NULL;
}

2
hw/xfree86/vgahw/vgaHW.h
View File

@ -156,7 +156,7 @@ typedef struct _vgaHWRec {
= pioreg */
vgaHWReadProcPtr readEnable;
vgaHWWriteProcPtr writeEnable;
PCITAG Tag;
struct pci_device *dev;
} vgaHWRec;
/* Some macros that VGA drivers can use in their ChipProbe() function */